Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'sound-3.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"This contains a few fixes for HD-audio: yet another Dell headset pin
quirk, a fixup for Thinkpad T540P, and an improved fix for
Haswell/Broadwell HDMI clock setup"
* tag 'sound-3.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
ALSA: hda - restore BCLK M/N value as per CDCLK for HSW/BDW display HDA controller
drm/i915: provide interface for audio driver to query cdclk
ALSA: hda - Add a fixup for Thinkpad T540p
ALSA: hda - Add another headset pin quirk for some Dell machines
+101
-41
+21
drivers/gpu/drm/i915/intel_pm.c
+21
drivers/gpu/drm/i915/intel_pm.c
···
6038
6038
}
6039
6039
EXPORT_SYMBOL_GPL(i915_release_power_well);
6040
6040
6041
+
/*
6042
+
* Private interface for the audio driver to get CDCLK in kHz.
6043
+
*
6044
+
* Caller must request power well using i915_request_power_well() prior to
6045
+
* making the call.
6046
+
*/
6047
+
int i915_get_cdclk_freq(void)
6048
+
{
6049
+
struct drm_i915_private *dev_priv;
6050
+
6051
+
if (!hsw_pwr)
6052
+
return -ENODEV;
6053
+
6054
+
dev_priv = container_of(hsw_pwr, struct drm_i915_private,
6055
+
power_domains);
6056
+
6057
+
return intel_ddi_get_cdclk_freq(dev_priv);
6058
+
}
6059
+
EXPORT_SYMBOL_GPL(i915_get_cdclk_freq);
6060
+
6061
+
6041
6062
#define POWER_DOMAIN_MASK (BIT(POWER_DOMAIN_NUM) - 1)
6042
6063
6043
6064
#define HSW_ALWAYS_ON_POWER_DOMAINS ( \
+1
include/drm/i915_powerwell.h
+1
include/drm/i915_powerwell.h
+55
sound/pci/hda/hda_i915.c
+55
sound/pci/hda/hda_i915.c
···
20
20
#include <linux/module.h>
21
21
#include <sound/core.h>
22
22
#include <drm/i915_powerwell.h>
23
+
#include "hda_priv.h"
23
24
#include "hda_i915.h"
25
+
26
+
/* Intel HSW/BDW display HDA controller Extended Mode registers.
27
+
* EM4 (M value) and EM5 (N Value) are used to convert CDClk (Core Display
28
+
* Clock) to 24MHz BCLK: BCLK = CDCLK * M / N
29
+
* The values will be lost when the display power well is disabled.
30
+
*/
31
+
#define ICH6_REG_EM4 0x100c
32
+
#define ICH6_REG_EM5 0x1010
24
33
25
34
static int (*get_power)(void);
26
35
static int (*put_power)(void);
36
+
static int (*get_cdclk)(void);
27
37
28
38
int hda_display_power(bool enable)
29
39
{
···
47
37
else
48
38
return put_power();
49
39
}
40
+
41
+
void haswell_set_bclk(struct azx *chip)
42
+
{
43
+
int cdclk_freq;
44
+
unsigned int bclk_m, bclk_n;
45
+
46
+
if (!get_cdclk)
47
+
return;
48
+
49
+
cdclk_freq = get_cdclk();
50
+
switch (cdclk_freq) {
51
+
case 337500:
52
+
bclk_m = 16;
53
+
bclk_n = 225;
54
+
break;
55
+
56
+
case 450000:
57
+
default: /* default CDCLK 450MHz */
58
+
bclk_m = 4;
59
+
bclk_n = 75;
60
+
break;
61
+
62
+
case 540000:
63
+
bclk_m = 4;
64
+
bclk_n = 90;
65
+
break;
66
+
67
+
case 675000:
68
+
bclk_m = 8;
69
+
bclk_n = 225;
70
+
break;
71
+
}
72
+
73
+
azx_writew(chip, EM4, bclk_m);
74
+
azx_writew(chip, EM5, bclk_n);
75
+
}
76
+
50
77
51
78
int hda_i915_init(void)
52
79
{
···
102
55
return -ENODEV;
103
56
}
104
57
58
+
get_cdclk = symbol_request(i915_get_cdclk_freq);
59
+
if (!get_cdclk) /* may have abnormal BCLK and audio playback rate */
60
+
pr_warn("hda-i915: get_cdclk symbol get fail\n");
61
+
105
62
pr_debug("HDA driver get symbol successfully from i915 module\n");
106
63
107
64
return err;
···
120
69
if (put_power) {
121
70
symbol_put(i915_release_power_well);
122
71
put_power = NULL;
72
+
}
73
+
if (get_cdclk) {
74
+
symbol_put(i915_get_cdclk_freq);
75
+
get_cdclk = NULL;
123
76
}
124
77
125
78
return 0;
+2
sound/pci/hda/hda_i915.h
+2
sound/pci/hda/hda_i915.h
···
18
18
19
19
#ifdef CONFIG_SND_HDA_I915
20
20
int hda_display_power(bool enable);
21
+
void haswell_set_bclk(struct azx *chip);
21
22
int hda_i915_init(void);
22
23
int hda_i915_exit(void);
23
24
#else
24
25
static inline int hda_display_power(bool enable) { return 0; }
26
+
static inline void haswell_set_bclk(struct azx *chip) { return; }
25
27
static inline int hda_i915_init(void)
26
28
{
27
29
return -ENODEV;
+9
-41
sound/pci/hda/hda_intel.c
+9
-41
sound/pci/hda/hda_intel.c
···
62
62
#include <linux/vga_switcheroo.h>
63
63
#include <linux/firmware.h>
64
64
#include "hda_codec.h"
65
-
#include "hda_i915.h"
66
65
#include "hda_controller.h"
67
66
#include "hda_priv.h"
67
+
#include "hda_i915.h"
68
68
69
69
70
70
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
···
288
288
[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
289
289
};
290
290
291
-
292
-
/* Intel HSW/BDW display HDA controller Extended Mode registers.
293
-
* EM4 (M value) and EM5 (N Value) are used to convert CDClk (Core Display
294
-
* Clock) to 24MHz BCLK: BCLK = CDCLK * M / N
295
-
* The values will be lost when the display power well is disabled.
296
-
*/
297
-
#define ICH6_REG_EM4 0x100c
298
-
#define ICH6_REG_EM5 0x1010
299
-
300
291
struct hda_intel {
301
292
struct azx chip;
302
-
303
-
/* HSW/BDW display HDA controller to restore BCLK from CDCLK */
304
-
unsigned int bclk_m;
305
-
unsigned int bclk_n;
306
293
};
307
294
308
295
···
585
598
#define azx_del_card_list(chip) /* NOP */
586
599
#endif /* CONFIG_PM */
587
600
588
-
static void haswell_save_bclk(struct azx *chip)
589
-
{
590
-
struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
591
-
592
-
hda->bclk_m = azx_readw(chip, EM4);
593
-
hda->bclk_n = azx_readw(chip, EM5);
594
-
}
595
-
596
-
static void haswell_restore_bclk(struct azx *chip)
597
-
{
598
-
struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
599
-
600
-
azx_writew(chip, EM4, hda->bclk_m);
601
-
azx_writew(chip, EM5, hda->bclk_n);
602
-
}
603
-
604
601
#if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
605
602
/*
606
603
* power management
···
612
641
chip->irq = -1;
613
642
}
614
643
615
-
/* Save BCLK M/N values before they become invalid in D3.
616
-
* Will test if display power well can be released now.
617
-
*/
618
-
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
619
-
haswell_save_bclk(chip);
620
-
621
644
if (chip->msi)
622
645
pci_disable_msi(chip->pci);
623
646
pci_disable_device(pci);
···
633
668
634
669
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
635
670
hda_display_power(true);
636
-
haswell_restore_bclk(chip);
671
+
haswell_set_bclk(chip);
637
672
}
638
673
pci_set_power_state(pci, PCI_D0);
639
674
pci_restore_state(pci);
···
678
713
azx_stop_chip(chip);
679
714
azx_enter_link_reset(chip);
680
715
azx_clear_irq_pending(chip);
681
-
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
682
-
haswell_save_bclk(chip);
716
+
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
683
717
hda_display_power(false);
684
-
}
718
+
685
719
return 0;
686
720
}
687
721
···
700
736
701
737
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
702
738
hda_display_power(true);
703
-
haswell_restore_bclk(chip);
739
+
haswell_set_bclk(chip);
704
740
}
705
741
706
742
/* Read STATESTS before controller reset */
···
1390
1426
1391
1427
/* initialize chip */
1392
1428
azx_init_pci(chip);
1429
+
1430
+
if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1431
+
haswell_set_bclk(chip);
1432
+
1393
1433
azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1394
1434
1395
1435
/* codec detection */
+13
sound/pci/hda/patch_realtek.c
+13
sound/pci/hda/patch_realtek.c
···
4880
4880
SND_PCI_QUIRK(0x17aa, 0x2208, "Thinkpad T431s", ALC269_FIXUP_LENOVO_DOCK),
4881
4881
SND_PCI_QUIRK(0x17aa, 0x220c, "Thinkpad T440s", ALC292_FIXUP_TPT440_DOCK),
4882
4882
SND_PCI_QUIRK(0x17aa, 0x220e, "Thinkpad T440p", ALC292_FIXUP_TPT440_DOCK),
4883
+
SND_PCI_QUIRK(0x17aa, 0x2210, "Thinkpad T540p", ALC292_FIXUP_TPT440_DOCK),
4883
4884
SND_PCI_QUIRK(0x17aa, 0x2212, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
4884
4885
SND_PCI_QUIRK(0x17aa, 0x2214, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
4885
4886
SND_PCI_QUIRK(0x17aa, 0x2215, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
···
5082
5081
{0x16, 0x21014020},
5083
5082
{0x18, 0x411111f0},
5084
5083
{0x19, 0x21a19030},
5084
+
{0x1a, 0x411111f0},
5085
+
{0x1b, 0x411111f0},
5086
+
{0x1d, 0x40700001},
5087
+
{0x1e, 0x411111f0}),
5088
+
SND_HDA_PIN_QUIRK(0x10ec0293, 0x1028, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE,
5089
+
{0x12, 0x40000000},
5090
+
{0x13, 0x90a60140},
5091
+
{0x14, 0x90170110},
5092
+
{0x15, 0x0221401f},
5093
+
{0x16, 0x411111f0},
5094
+
{0x18, 0x411111f0},
5095
+
{0x19, 0x411111f0},
5085
5096
{0x1a, 0x411111f0},
5086
5097
{0x1b, 0x411111f0},
5087
5098
{0x1d, 0x40700001},