Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdgpu/vcn: Allow limiting ctx to instance 0 for AV1 at any time
There is no reason to require this to happen on first submitted IB only.
We need to wait for the queue to be idle, but it can be done at any
time (including when there are multiple video sessions active).
Signed-off-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
David Rosca
and committed by
Alex Deucher
8908fdce
dc8f9f0f
+16
-8
+8
-4
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+8
-4
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
···
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struct amdgpu_job *job)
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{
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struct drm_gpu_scheduler **scheds;
1889
-
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-
/* The create msg must be in the first IB submitted */
1891
-
if (atomic_read(&job->base.entity->fence_seq))
1892
-
return -EINVAL;
1889
+
struct dma_fence *fence;
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/* if VCN0 is harvested, we can't support AV1 */
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if (p->adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0)
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return -EINVAL;
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+
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+
/* wait for all jobs to finish before switching to instance 0 */
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+
fence = amdgpu_ctx_get_fence(p->ctx, job->base.entity, ~0ull);
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+
if (fence) {
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+
dma_fence_wait(fence, false);
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+
dma_fence_put(fence);
1900
+
}
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scheds = p->adev->gpu_sched[AMDGPU_HW_IP_VCN_DEC]
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[AMDGPU_RING_PRIO_DEFAULT].sched;
+8
-4
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+8
-4
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
···
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struct amdgpu_job *job)
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{
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struct drm_gpu_scheduler **scheds;
1807
-
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-
/* The create msg must be in the first IB submitted */
1809
-
if (atomic_read(&job->base.entity->fence_seq))
1810
-
return -EINVAL;
1807
+
struct dma_fence *fence;
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/* if VCN0 is harvested, we can't support AV1 */
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if (p->adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0)
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return -EINVAL;
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+
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+
/* wait for all jobs to finish before switching to instance 0 */
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+
fence = amdgpu_ctx_get_fence(p->ctx, job->base.entity, ~0ull);
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+
if (fence) {
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+
dma_fence_wait(fence, false);
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+
dma_fence_put(fence);
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+
}
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scheds = p->adev->gpu_sched[AMDGPU_HW_IP_VCN_ENC]
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[AMDGPU_RING_PRIO_0].sched;