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Merge tag 'drm-fixes-for-v4.16-rc3' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
"A bunch of fixes for rc3:

Exynos:
- fixes for using monotonic timestamps
- register definitions
- removal of unused file

ipu-v3L
- minor changes
- make some register arrays const+static
- fix some leaks

meson:
- fix for vsync

atomic:
- fix for memory leak

EDID parser:
- add quirks for some more non-desktop devices
- 6-bit panel fix.

drm_mm:
- fix a bug in the core drm mm hole handling

cirrus:
- fix lut loading regression

Lastly there is a deadlock fix around runtime suspend for secondary
GPUs.

There was a deadlock between one thread trying to wait for a workqueue
job to finish in the runtime suspend path, and the workqueue job it
was waiting for in turn waiting for a runtime_get_sync to return.

The fixes avoids it by not doing the runtime sync in the workqueue as
then we always wait for all those tasks to complete before we runtime
suspend"

* tag 'drm-fixes-for-v4.16-rc3' of git://people.freedesktop.org/~airlied/linux: (25 commits)
drm/tve200: fix kernel-doc documentation comment include
drm/edid: quirk Sony PlayStation VR headset as non-desktop
drm/edid: quirk Windows Mixed Reality headsets as non-desktop
drm/edid: quirk Oculus Rift headsets as non-desktop
drm/meson: fix vsync buffer update
drm: Handle unexpected holes in color-eviction
drm: exynos: Use proper macro definition for HDMI_I2S_PIN_SEL_1
drm/exynos: remove exynos_drm_rotator.h
drm/exynos: g2d: Delete an error message for a failed memory allocation in two functions
drm/exynos: fix comparison to bitshift when dealing with a mask
drm/exynos: g2d: use monotonic timestamps
drm/edid: Add 6 bpc quirk for CPT panel in Asus UX303LA
gpu: ipu-csi: add 10/12-bit grayscale support to mbus_code_to_bus_cfg
gpu: ipu-cpmem: add 16-bit grayscale support to ipu_cpmem_set_image
gpu: ipu-v3: prg: fix device node leak in ipu_prg_lookup_by_phandle
gpu: ipu-v3: pre: fix device node leak in ipu_pre_lookup_by_phandle
drm/amdgpu: Fix deadlock on runtime suspend
drm/radeon: Fix deadlock on runtime suspend
drm/nouveau: Fix deadlock on runtime suspend
drm: Allow determining if current task is output poll worker
...

+261 -107
+1 -1
Documentation/gpu/tve200.rst
··· 3 3 ================================== 4 4 5 5 .. kernel-doc:: drivers/gpu/drm/tve200/tve200_drv.c 6 - :doc: Faraday TV Encoder 200 6 + :doc: Faraday TV Encoder TVE200 DRM Driver
+38 -20
drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
··· 736 736 enum drm_connector_status ret = connector_status_disconnected; 737 737 int r; 738 738 739 - r = pm_runtime_get_sync(connector->dev->dev); 740 - if (r < 0) 741 - return connector_status_disconnected; 739 + if (!drm_kms_helper_is_poll_worker()) { 740 + r = pm_runtime_get_sync(connector->dev->dev); 741 + if (r < 0) 742 + return connector_status_disconnected; 743 + } 742 744 743 745 if (encoder) { 744 746 struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder); ··· 759 757 /* check acpi lid status ??? */ 760 758 761 759 amdgpu_connector_update_scratch_regs(connector, ret); 762 - pm_runtime_mark_last_busy(connector->dev->dev); 763 - pm_runtime_put_autosuspend(connector->dev->dev); 760 + 761 + if (!drm_kms_helper_is_poll_worker()) { 762 + pm_runtime_mark_last_busy(connector->dev->dev); 763 + pm_runtime_put_autosuspend(connector->dev->dev); 764 + } 765 + 764 766 return ret; 765 767 } 766 768 ··· 874 868 enum drm_connector_status ret = connector_status_disconnected; 875 869 int r; 876 870 877 - r = pm_runtime_get_sync(connector->dev->dev); 878 - if (r < 0) 879 - return connector_status_disconnected; 871 + if (!drm_kms_helper_is_poll_worker()) { 872 + r = pm_runtime_get_sync(connector->dev->dev); 873 + if (r < 0) 874 + return connector_status_disconnected; 875 + } 880 876 881 877 encoder = amdgpu_connector_best_single_encoder(connector); 882 878 if (!encoder) ··· 932 924 amdgpu_connector_update_scratch_regs(connector, ret); 933 925 934 926 out: 935 - pm_runtime_mark_last_busy(connector->dev->dev); 936 - pm_runtime_put_autosuspend(connector->dev->dev); 927 + if (!drm_kms_helper_is_poll_worker()) { 928 + pm_runtime_mark_last_busy(connector->dev->dev); 929 + pm_runtime_put_autosuspend(connector->dev->dev); 930 + } 937 931 938 932 return ret; 939 933 } ··· 998 988 enum drm_connector_status ret = connector_status_disconnected; 999 989 bool dret = false, broken_edid = false; 1000 990 1001 - r = pm_runtime_get_sync(connector->dev->dev); 1002 - if (r < 0) 1003 - return connector_status_disconnected; 991 + if (!drm_kms_helper_is_poll_worker()) { 992 + r = pm_runtime_get_sync(connector->dev->dev); 993 + if (r < 0) 994 + return connector_status_disconnected; 995 + } 1004 996 1005 997 if (!force && amdgpu_connector_check_hpd_status_unchanged(connector)) { 1006 998 ret = connector->status; ··· 1127 1115 amdgpu_connector_update_scratch_regs(connector, ret); 1128 1116 1129 1117 exit: 1130 - pm_runtime_mark_last_busy(connector->dev->dev); 1131 - pm_runtime_put_autosuspend(connector->dev->dev); 1118 + if (!drm_kms_helper_is_poll_worker()) { 1119 + pm_runtime_mark_last_busy(connector->dev->dev); 1120 + pm_runtime_put_autosuspend(connector->dev->dev); 1121 + } 1132 1122 1133 1123 return ret; 1134 1124 } ··· 1373 1359 struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector); 1374 1360 int r; 1375 1361 1376 - r = pm_runtime_get_sync(connector->dev->dev); 1377 - if (r < 0) 1378 - return connector_status_disconnected; 1362 + if (!drm_kms_helper_is_poll_worker()) { 1363 + r = pm_runtime_get_sync(connector->dev->dev); 1364 + if (r < 0) 1365 + return connector_status_disconnected; 1366 + } 1379 1367 1380 1368 if (!force && amdgpu_connector_check_hpd_status_unchanged(connector)) { 1381 1369 ret = connector->status; ··· 1445 1429 1446 1430 amdgpu_connector_update_scratch_regs(connector, ret); 1447 1431 out: 1448 - pm_runtime_mark_last_busy(connector->dev->dev); 1449 - pm_runtime_put_autosuspend(connector->dev->dev); 1432 + if (!drm_kms_helper_is_poll_worker()) { 1433 + pm_runtime_mark_last_busy(connector->dev->dev); 1434 + pm_runtime_put_autosuspend(connector->dev->dev); 1435 + } 1450 1436 1451 1437 return ret; 1452 1438 }
+23 -17
drivers/gpu/drm/cirrus/cirrus_mode.c
··· 294 294 { 295 295 } 296 296 297 - /* 298 - * This is called after a mode is programmed. It should reverse anything done 299 - * by the prepare function 300 - */ 301 - static void cirrus_crtc_commit(struct drm_crtc *crtc) 302 - { 303 - } 304 - 305 - /* 306 - * The core can pass us a set of gamma values to program. We actually only 307 - * use this for 8-bit mode so can't perform smooth fades on deeper modes, 308 - * but it's a requirement that we provide the function 309 - */ 310 - static int cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, 311 - u16 *blue, uint32_t size, 312 - struct drm_modeset_acquire_ctx *ctx) 297 + static void cirrus_crtc_load_lut(struct drm_crtc *crtc) 313 298 { 314 299 struct drm_device *dev = crtc->dev; 315 300 struct cirrus_device *cdev = dev->dev_private; ··· 302 317 int i; 303 318 304 319 if (!crtc->enabled) 305 - return 0; 320 + return; 306 321 307 322 r = crtc->gamma_store; 308 323 g = r + crtc->gamma_size; ··· 315 330 WREG8(PALETTE_DATA, *g++ >> 8); 316 331 WREG8(PALETTE_DATA, *b++ >> 8); 317 332 } 333 + } 334 + 335 + /* 336 + * This is called after a mode is programmed. It should reverse anything done 337 + * by the prepare function 338 + */ 339 + static void cirrus_crtc_commit(struct drm_crtc *crtc) 340 + { 341 + cirrus_crtc_load_lut(crtc); 342 + } 343 + 344 + /* 345 + * The core can pass us a set of gamma values to program. We actually only 346 + * use this for 8-bit mode so can't perform smooth fades on deeper modes, 347 + * but it's a requirement that we provide the function 348 + */ 349 + static int cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, 350 + u16 *blue, uint32_t size, 351 + struct drm_modeset_acquire_ctx *ctx) 352 + { 353 + cirrus_crtc_load_lut(crtc); 318 354 319 355 return 0; 320 356 }
+15
drivers/gpu/drm/drm_atomic_helper.c
··· 1878 1878 new_crtc_state->event->base.completion = &commit->flip_done; 1879 1879 new_crtc_state->event->base.completion_release = release_crtc_commit; 1880 1880 drm_crtc_commit_get(commit); 1881 + 1882 + commit->abort_completion = true; 1881 1883 } 1882 1884 1883 1885 for_each_oldnew_connector_in_state(state, conn, old_conn_state, new_conn_state, i) { ··· 3423 3421 void __drm_atomic_helper_crtc_destroy_state(struct drm_crtc_state *state) 3424 3422 { 3425 3423 if (state->commit) { 3424 + /* 3425 + * In the event that a non-blocking commit returns 3426 + * -ERESTARTSYS before the commit_tail work is queued, we will 3427 + * have an extra reference to the commit object. Release it, if 3428 + * the event has not been consumed by the worker. 3429 + * 3430 + * state->event may be freed, so we can't directly look at 3431 + * state->event->base.completion. 3432 + */ 3433 + if (state->event && state->commit->abort_completion) 3434 + drm_crtc_commit_put(state->commit); 3435 + 3426 3436 kfree(state->commit->event); 3427 3437 state->commit->event = NULL; 3438 + 3428 3439 drm_crtc_commit_put(state->commit); 3429 3440 } 3430 3441
+21
drivers/gpu/drm/drm_edid.c
··· 113 113 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */ 114 114 { "AEO", 0, EDID_QUIRK_FORCE_6BPC }, 115 115 116 + /* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */ 117 + { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC }, 118 + 116 119 /* Belinea 10 15 55 */ 117 120 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 118 121 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, ··· 165 162 166 163 /* HTC Vive VR Headset */ 167 164 { "HVR", 0xaa01, EDID_QUIRK_NON_DESKTOP }, 165 + 166 + /* Oculus Rift DK1, DK2, and CV1 VR Headsets */ 167 + { "OVR", 0x0001, EDID_QUIRK_NON_DESKTOP }, 168 + { "OVR", 0x0003, EDID_QUIRK_NON_DESKTOP }, 169 + { "OVR", 0x0004, EDID_QUIRK_NON_DESKTOP }, 170 + 171 + /* Windows Mixed Reality Headsets */ 172 + { "ACR", 0x7fce, EDID_QUIRK_NON_DESKTOP }, 173 + { "HPN", 0x3515, EDID_QUIRK_NON_DESKTOP }, 174 + { "LEN", 0x0408, EDID_QUIRK_NON_DESKTOP }, 175 + { "LEN", 0xb800, EDID_QUIRK_NON_DESKTOP }, 176 + { "FUJ", 0x1970, EDID_QUIRK_NON_DESKTOP }, 177 + { "DEL", 0x7fce, EDID_QUIRK_NON_DESKTOP }, 178 + { "SEC", 0x144a, EDID_QUIRK_NON_DESKTOP }, 179 + { "AUS", 0xc102, EDID_QUIRK_NON_DESKTOP }, 180 + 181 + /* Sony PlayStation VR Headset */ 182 + { "SNY", 0x0704, EDID_QUIRK_NON_DESKTOP }, 168 183 }; 169 184 170 185 /*
+18 -3
drivers/gpu/drm/drm_mm.c
··· 836 836 if (!mm->color_adjust) 837 837 return NULL; 838 838 839 - hole = list_first_entry(&mm->hole_stack, typeof(*hole), hole_stack); 840 - hole_start = __drm_mm_hole_node_start(hole); 841 - hole_end = hole_start + hole->hole_size; 839 + /* 840 + * The hole found during scanning should ideally be the first element 841 + * in the hole_stack list, but due to side-effects in the driver it 842 + * may not be. 843 + */ 844 + list_for_each_entry(hole, &mm->hole_stack, hole_stack) { 845 + hole_start = __drm_mm_hole_node_start(hole); 846 + hole_end = hole_start + hole->hole_size; 847 + 848 + if (hole_start <= scan->hit_start && 849 + hole_end >= scan->hit_end) 850 + break; 851 + } 852 + 853 + /* We should only be called after we found the hole previously */ 854 + DRM_MM_BUG_ON(&hole->hole_stack == &mm->hole_stack); 855 + if (unlikely(&hole->hole_stack == &mm->hole_stack)) 856 + return NULL; 842 857 843 858 DRM_MM_BUG_ON(hole_start > scan->hit_start); 844 859 DRM_MM_BUG_ON(hole_end < scan->hit_end);
+20
drivers/gpu/drm/drm_probe_helper.c
··· 654 654 } 655 655 656 656 /** 657 + * drm_kms_helper_is_poll_worker - is %current task an output poll worker? 658 + * 659 + * Determine if %current task is an output poll worker. This can be used 660 + * to select distinct code paths for output polling versus other contexts. 661 + * 662 + * One use case is to avoid a deadlock between the output poll worker and 663 + * the autosuspend worker wherein the latter waits for polling to finish 664 + * upon calling drm_kms_helper_poll_disable(), while the former waits for 665 + * runtime suspend to finish upon calling pm_runtime_get_sync() in a 666 + * connector ->detect hook. 667 + */ 668 + bool drm_kms_helper_is_poll_worker(void) 669 + { 670 + struct work_struct *work = current_work(); 671 + 672 + return work && work->func == output_poll_execute; 673 + } 674 + EXPORT_SYMBOL(drm_kms_helper_is_poll_worker); 675 + 676 + /** 657 677 * drm_kms_helper_poll_disable - disable output polling 658 678 * @dev: drm_device 659 679 *
+5 -7
drivers/gpu/drm/exynos/exynos_drm_g2d.c
··· 286 286 287 287 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL); 288 288 if (!node) { 289 - dev_err(dev, "failed to allocate memory\n"); 290 289 ret = -ENOMEM; 291 290 goto err; 292 291 } ··· 925 926 struct drm_device *drm_dev = g2d->subdrv.drm_dev; 926 927 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node; 927 928 struct drm_exynos_pending_g2d_event *e; 928 - struct timeval now; 929 + struct timespec64 now; 929 930 930 931 if (list_empty(&runqueue_node->event_list)) 931 932 return; ··· 933 934 e = list_first_entry(&runqueue_node->event_list, 934 935 struct drm_exynos_pending_g2d_event, base.link); 935 936 936 - do_gettimeofday(&now); 937 + ktime_get_ts64(&now); 937 938 e->event.tv_sec = now.tv_sec; 938 - e->event.tv_usec = now.tv_usec; 939 + e->event.tv_usec = now.tv_nsec / NSEC_PER_USEC; 939 940 e->event.cmdlist_no = cmdlist_no; 940 941 941 942 drm_send_event(drm_dev, &e->base); ··· 1357 1358 return -EFAULT; 1358 1359 1359 1360 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL); 1360 - if (!runqueue_node) { 1361 - dev_err(dev, "failed to allocate memory\n"); 1361 + if (!runqueue_node) 1362 1362 return -ENOMEM; 1363 - } 1363 + 1364 1364 run_cmdlist = &runqueue_node->run_cmdlist; 1365 1365 event_list = &runqueue_node->event_list; 1366 1366 INIT_LIST_HEAD(run_cmdlist);
-19
drivers/gpu/drm/exynos/exynos_drm_rotator.h
··· 1 - /* 2 - * Copyright (c) 2012 Samsung Electronics Co., Ltd. 3 - * 4 - * Authors: 5 - * YoungJun Cho <yj44.cho@samsung.com> 6 - * Eunchul Kim <chulspro.kim@samsung.com> 7 - * 8 - * This program is free software; you can redistribute it and/or modify it 9 - * under the terms of the GNU General Public License as published by the 10 - * Free Software Foundation; either version 2 of the License, or (at your 11 - * option) any later version. 12 - */ 13 - 14 - #ifndef _EXYNOS_DRM_ROTATOR_H_ 15 - #define _EXYNOS_DRM_ROTATOR_H_ 16 - 17 - /* TODO */ 18 - 19 - #endif
+5 -2
drivers/gpu/drm/exynos/exynos_hdmi.c
··· 1068 1068 /* Configuration I2S input ports. Configure I2S_PIN_SEL_0~4 */ 1069 1069 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_0, HDMI_I2S_SEL_SCLK(5) 1070 1070 | HDMI_I2S_SEL_LRCK(6)); 1071 - hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_1, HDMI_I2S_SEL_SDATA1(1) 1072 - | HDMI_I2S_SEL_SDATA2(4)); 1071 + 1072 + hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_1, HDMI_I2S_SEL_SDATA1(3) 1073 + | HDMI_I2S_SEL_SDATA0(4)); 1074 + 1073 1075 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_2, HDMI_I2S_SEL_SDATA3(1) 1074 1076 | HDMI_I2S_SEL_SDATA2(2)); 1077 + 1075 1078 hdmi_reg_writeb(hdata, HDMI_I2S_PIN_SEL_3, HDMI_I2S_SEL_DSD(0)); 1076 1079 1077 1080 /* I2S_CON_1 & 2 */
+1 -1
drivers/gpu/drm/exynos/regs-fimc.h
··· 569 569 #define EXYNOS_CIIMGEFF_FIN_EMBOSSING (4 << 26) 570 570 #define EXYNOS_CIIMGEFF_FIN_SILHOUETTE (5 << 26) 571 571 #define EXYNOS_CIIMGEFF_FIN_MASK (7 << 26) 572 - #define EXYNOS_CIIMGEFF_PAT_CBCR_MASK ((0xff < 13) | (0xff < 0)) 572 + #define EXYNOS_CIIMGEFF_PAT_CBCR_MASK ((0xff << 13) | (0xff << 0)) 573 573 574 574 /* Real input DMA size register */ 575 575 #define EXYNOS_CIREAL_ISIZE_AUTOLOAD_ENABLE (1 << 31)
+1 -1
drivers/gpu/drm/exynos/regs-hdmi.h
··· 464 464 465 465 /* I2S_PIN_SEL_1 */ 466 466 #define HDMI_I2S_SEL_SDATA1(x) (((x) & 0x7) << 4) 467 - #define HDMI_I2S_SEL_SDATA2(x) ((x) & 0x7) 467 + #define HDMI_I2S_SEL_SDATA0(x) ((x) & 0x7) 468 468 469 469 /* I2S_PIN_SEL_2 */ 470 470 #define HDMI_I2S_SEL_SDATA3(x) (((x) & 0x7) << 4)
+6
drivers/gpu/drm/meson/meson_crtc.c
··· 36 36 #include "meson_venc.h" 37 37 #include "meson_vpp.h" 38 38 #include "meson_viu.h" 39 + #include "meson_canvas.h" 39 40 #include "meson_registers.h" 40 41 41 42 /* CRTC definition */ ··· 192 191 meson_vpp_setup_interlace_vscaler_osd1(priv, &dest); 193 192 } else 194 193 meson_vpp_disable_interlace_vscaler_osd1(priv); 194 + 195 + meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, 196 + priv->viu.osd1_addr, priv->viu.osd1_stride, 197 + priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE, 198 + MESON_CANVAS_BLKMODE_LINEAR); 195 199 196 200 /* Enable OSD1 */ 197 201 writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND,
+3
drivers/gpu/drm/meson/meson_drv.h
··· 43 43 bool osd1_commit; 44 44 uint32_t osd1_ctrl_stat; 45 45 uint32_t osd1_blk0_cfg[5]; 46 + uint32_t osd1_addr; 47 + uint32_t osd1_stride; 48 + uint32_t osd1_height; 46 49 } viu; 47 50 48 51 struct {
+3 -4
drivers/gpu/drm/meson/meson_plane.c
··· 164 164 /* Update Canvas with buffer address */ 165 165 gem = drm_fb_cma_get_gem_obj(fb, 0); 166 166 167 - meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1, 168 - gem->paddr, fb->pitches[0], 169 - fb->height, MESON_CANVAS_WRAP_NONE, 170 - MESON_CANVAS_BLKMODE_LINEAR); 167 + priv->viu.osd1_addr = gem->paddr; 168 + priv->viu.osd1_stride = fb->pitches[0]; 169 + priv->viu.osd1_height = fb->height; 171 170 172 171 spin_unlock_irqrestore(&priv->drm->event_lock, flags); 173 172 }
+13 -5
drivers/gpu/drm/nouveau/nouveau_connector.c
··· 570 570 nv_connector->edid = NULL; 571 571 } 572 572 573 - ret = pm_runtime_get_sync(connector->dev->dev); 574 - if (ret < 0 && ret != -EACCES) 575 - return conn_status; 573 + /* Outputs are only polled while runtime active, so acquiring a 574 + * runtime PM ref here is unnecessary (and would deadlock upon 575 + * runtime suspend because it waits for polling to finish). 576 + */ 577 + if (!drm_kms_helper_is_poll_worker()) { 578 + ret = pm_runtime_get_sync(connector->dev->dev); 579 + if (ret < 0 && ret != -EACCES) 580 + return conn_status; 581 + } 576 582 577 583 nv_encoder = nouveau_connector_ddc_detect(connector); 578 584 if (nv_encoder && (i2c = nv_encoder->i2c) != NULL) { ··· 653 647 654 648 out: 655 649 656 - pm_runtime_mark_last_busy(connector->dev->dev); 657 - pm_runtime_put_autosuspend(connector->dev->dev); 650 + if (!drm_kms_helper_is_poll_worker()) { 651 + pm_runtime_mark_last_busy(connector->dev->dev); 652 + pm_runtime_put_autosuspend(connector->dev->dev); 653 + } 658 654 659 655 return conn_status; 660 656 }
+49 -25
drivers/gpu/drm/radeon/radeon_connectors.c
··· 899 899 enum drm_connector_status ret = connector_status_disconnected; 900 900 int r; 901 901 902 - r = pm_runtime_get_sync(connector->dev->dev); 903 - if (r < 0) 904 - return connector_status_disconnected; 902 + if (!drm_kms_helper_is_poll_worker()) { 903 + r = pm_runtime_get_sync(connector->dev->dev); 904 + if (r < 0) 905 + return connector_status_disconnected; 906 + } 905 907 906 908 if (encoder) { 907 909 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); ··· 926 924 /* check acpi lid status ??? */ 927 925 928 926 radeon_connector_update_scratch_regs(connector, ret); 929 - pm_runtime_mark_last_busy(connector->dev->dev); 930 - pm_runtime_put_autosuspend(connector->dev->dev); 927 + 928 + if (!drm_kms_helper_is_poll_worker()) { 929 + pm_runtime_mark_last_busy(connector->dev->dev); 930 + pm_runtime_put_autosuspend(connector->dev->dev); 931 + } 932 + 931 933 return ret; 932 934 } 933 935 ··· 1045 1039 enum drm_connector_status ret = connector_status_disconnected; 1046 1040 int r; 1047 1041 1048 - r = pm_runtime_get_sync(connector->dev->dev); 1049 - if (r < 0) 1050 - return connector_status_disconnected; 1042 + if (!drm_kms_helper_is_poll_worker()) { 1043 + r = pm_runtime_get_sync(connector->dev->dev); 1044 + if (r < 0) 1045 + return connector_status_disconnected; 1046 + } 1051 1047 1052 1048 encoder = radeon_best_single_encoder(connector); 1053 1049 if (!encoder) ··· 1116 1108 radeon_connector_update_scratch_regs(connector, ret); 1117 1109 1118 1110 out: 1119 - pm_runtime_mark_last_busy(connector->dev->dev); 1120 - pm_runtime_put_autosuspend(connector->dev->dev); 1111 + if (!drm_kms_helper_is_poll_worker()) { 1112 + pm_runtime_mark_last_busy(connector->dev->dev); 1113 + pm_runtime_put_autosuspend(connector->dev->dev); 1114 + } 1121 1115 1122 1116 return ret; 1123 1117 } ··· 1183 1173 if (!radeon_connector->dac_load_detect) 1184 1174 return ret; 1185 1175 1186 - r = pm_runtime_get_sync(connector->dev->dev); 1187 - if (r < 0) 1188 - return connector_status_disconnected; 1176 + if (!drm_kms_helper_is_poll_worker()) { 1177 + r = pm_runtime_get_sync(connector->dev->dev); 1178 + if (r < 0) 1179 + return connector_status_disconnected; 1180 + } 1189 1181 1190 1182 encoder = radeon_best_single_encoder(connector); 1191 1183 if (!encoder) ··· 1199 1187 if (ret == connector_status_connected) 1200 1188 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false); 1201 1189 radeon_connector_update_scratch_regs(connector, ret); 1202 - pm_runtime_mark_last_busy(connector->dev->dev); 1203 - pm_runtime_put_autosuspend(connector->dev->dev); 1190 + 1191 + if (!drm_kms_helper_is_poll_worker()) { 1192 + pm_runtime_mark_last_busy(connector->dev->dev); 1193 + pm_runtime_put_autosuspend(connector->dev->dev); 1194 + } 1195 + 1204 1196 return ret; 1205 1197 } 1206 1198 ··· 1267 1251 enum drm_connector_status ret = connector_status_disconnected; 1268 1252 bool dret = false, broken_edid = false; 1269 1253 1270 - r = pm_runtime_get_sync(connector->dev->dev); 1271 - if (r < 0) 1272 - return connector_status_disconnected; 1254 + if (!drm_kms_helper_is_poll_worker()) { 1255 + r = pm_runtime_get_sync(connector->dev->dev); 1256 + if (r < 0) 1257 + return connector_status_disconnected; 1258 + } 1273 1259 1274 1260 if (radeon_connector->detected_hpd_without_ddc) { 1275 1261 force = true; ··· 1454 1436 } 1455 1437 1456 1438 exit: 1457 - pm_runtime_mark_last_busy(connector->dev->dev); 1458 - pm_runtime_put_autosuspend(connector->dev->dev); 1439 + if (!drm_kms_helper_is_poll_worker()) { 1440 + pm_runtime_mark_last_busy(connector->dev->dev); 1441 + pm_runtime_put_autosuspend(connector->dev->dev); 1442 + } 1459 1443 1460 1444 return ret; 1461 1445 } ··· 1708 1688 if (radeon_dig_connector->is_mst) 1709 1689 return connector_status_disconnected; 1710 1690 1711 - r = pm_runtime_get_sync(connector->dev->dev); 1712 - if (r < 0) 1713 - return connector_status_disconnected; 1691 + if (!drm_kms_helper_is_poll_worker()) { 1692 + r = pm_runtime_get_sync(connector->dev->dev); 1693 + if (r < 0) 1694 + return connector_status_disconnected; 1695 + } 1714 1696 1715 1697 if (!force && radeon_check_hpd_status_unchanged(connector)) { 1716 1698 ret = connector->status; ··· 1799 1777 } 1800 1778 1801 1779 out: 1802 - pm_runtime_mark_last_busy(connector->dev->dev); 1803 - pm_runtime_put_autosuspend(connector->dev->dev); 1780 + if (!drm_kms_helper_is_poll_worker()) { 1781 + pm_runtime_mark_last_busy(connector->dev->dev); 1782 + pm_runtime_put_autosuspend(connector->dev->dev); 1783 + } 1804 1784 1805 1785 return ret; 1806 1786 }
+2 -2
drivers/gpu/ipu-v3/ipu-common.c
··· 1089 1089 { 1090 1090 struct ipu_soc *ipu = irq_desc_get_handler_data(desc); 1091 1091 struct irq_chip *chip = irq_desc_get_chip(desc); 1092 - const int int_reg[] = { 0, 1, 2, 3, 10, 11, 12, 13, 14}; 1092 + static const int int_reg[] = { 0, 1, 2, 3, 10, 11, 12, 13, 14}; 1093 1093 1094 1094 chained_irq_enter(chip, desc); 1095 1095 ··· 1102 1102 { 1103 1103 struct ipu_soc *ipu = irq_desc_get_handler_data(desc); 1104 1104 struct irq_chip *chip = irq_desc_get_chip(desc); 1105 - const int int_reg[] = { 4, 5, 8, 9}; 1105 + static const int int_reg[] = { 4, 5, 8, 9}; 1106 1106 1107 1107 chained_irq_enter(chip, desc); 1108 1108
+2
drivers/gpu/ipu-v3/ipu-cpmem.c
··· 788 788 case V4L2_PIX_FMT_SGBRG8: 789 789 case V4L2_PIX_FMT_SGRBG8: 790 790 case V4L2_PIX_FMT_SRGGB8: 791 + case V4L2_PIX_FMT_GREY: 791 792 offset = image->rect.left + image->rect.top * pix->bytesperline; 792 793 break; 793 794 case V4L2_PIX_FMT_SBGGR16: 794 795 case V4L2_PIX_FMT_SGBRG16: 795 796 case V4L2_PIX_FMT_SGRBG16: 796 797 case V4L2_PIX_FMT_SRGGB16: 798 + case V4L2_PIX_FMT_Y16: 797 799 offset = image->rect.left * 2 + 798 800 image->rect.top * pix->bytesperline; 799 801 break;
+2
drivers/gpu/ipu-v3/ipu-csi.c
··· 288 288 case MEDIA_BUS_FMT_SGBRG10_1X10: 289 289 case MEDIA_BUS_FMT_SGRBG10_1X10: 290 290 case MEDIA_BUS_FMT_SRGGB10_1X10: 291 + case MEDIA_BUS_FMT_Y10_1X10: 291 292 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; 292 293 cfg->mipi_dt = MIPI_DT_RAW10; 293 294 cfg->data_width = IPU_CSI_DATA_WIDTH_10; ··· 297 296 case MEDIA_BUS_FMT_SGBRG12_1X12: 298 297 case MEDIA_BUS_FMT_SGRBG12_1X12: 299 298 case MEDIA_BUS_FMT_SRGGB12_1X12: 299 + case MEDIA_BUS_FMT_Y12_1X12: 300 300 cfg->data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER; 301 301 cfg->mipi_dt = MIPI_DT_RAW12; 302 302 cfg->data_width = IPU_CSI_DATA_WIDTH_12;
+3
drivers/gpu/ipu-v3/ipu-pre.c
··· 129 129 if (pre_node == pre->dev->of_node) { 130 130 mutex_unlock(&ipu_pre_list_mutex); 131 131 device_link_add(dev, pre->dev, DL_FLAG_AUTOREMOVE); 132 + of_node_put(pre_node); 132 133 return pre; 133 134 } 134 135 } 135 136 mutex_unlock(&ipu_pre_list_mutex); 137 + 138 + of_node_put(pre_node); 136 139 137 140 return NULL; 138 141 }
+3
drivers/gpu/ipu-v3/ipu-prg.c
··· 102 102 mutex_unlock(&ipu_prg_list_mutex); 103 103 device_link_add(dev, prg->dev, DL_FLAG_AUTOREMOVE); 104 104 prg->id = ipu_id; 105 + of_node_put(prg_node); 105 106 return prg; 106 107 } 107 108 } 108 109 mutex_unlock(&ipu_prg_list_mutex); 110 + 111 + of_node_put(prg_node); 109 112 110 113 return NULL; 111 114 }
+9
include/drm/drm_atomic.h
··· 134 134 * &drm_pending_vblank_event pointer to clean up private events. 135 135 */ 136 136 struct drm_pending_vblank_event *event; 137 + 138 + /** 139 + * @abort_completion: 140 + * 141 + * A flag that's set after drm_atomic_helper_setup_commit takes a second 142 + * reference for the completion of $drm_crtc_state.event. It's used by 143 + * the free code to remove the second reference if commit fails. 144 + */ 145 + bool abort_completion; 137 146 }; 138 147 139 148 struct __drm_planes_state {
+1
include/drm/drm_crtc_helper.h
··· 77 77 78 78 void drm_kms_helper_poll_disable(struct drm_device *dev); 79 79 void drm_kms_helper_poll_enable(struct drm_device *dev); 80 + bool drm_kms_helper_is_poll_worker(void); 80 81 81 82 #endif
+1
include/linux/workqueue.h
··· 465 465 466 466 extern void workqueue_set_max_active(struct workqueue_struct *wq, 467 467 int max_active); 468 + extern struct work_struct *current_work(void); 468 469 extern bool current_is_workqueue_rescuer(void); 469 470 extern bool workqueue_congested(int cpu, struct workqueue_struct *wq); 470 471 extern unsigned int work_busy(struct work_struct *work);
+16
kernel/workqueue.c
··· 4180 4180 EXPORT_SYMBOL_GPL(workqueue_set_max_active); 4181 4181 4182 4182 /** 4183 + * current_work - retrieve %current task's work struct 4184 + * 4185 + * Determine if %current task is a workqueue worker and what it's working on. 4186 + * Useful to find out the context that the %current task is running in. 4187 + * 4188 + * Return: work struct if %current task is a workqueue worker, %NULL otherwise. 4189 + */ 4190 + struct work_struct *current_work(void) 4191 + { 4192 + struct worker *worker = current_wq_worker(); 4193 + 4194 + return worker ? worker->current_work : NULL; 4195 + } 4196 + EXPORT_SYMBOL(current_work); 4197 + 4198 + /** 4183 4199 * current_is_workqueue_rescuer - is %current workqueue rescuer? 4184 4200 * 4185 4201 * Determine whether %current is a workqueue rescuer. Can be used from