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ASoC: Update rtq9128 document and source file

Merge series from cy_huang@richtek.com:

This patch series include two parts
- Update initial setting for rtq9128 specific feature
- Add rtq9154 backward compatible with rtq9128

+117 -9
+10 -2
Documentation/devicetree/bindings/sound/richtek,rtq9128.yaml
··· 14 14 class-D audio power amplifier and delivering 4x75W into 4OHm at 10% 15 15 THD+N from a 25V supply in automotive applications. 16 16 17 + The RTQ9154 is the family series of RTQ9128. The major change is to modify 18 + the package size. Beside this, whole functions are almost all the same. 19 + 17 20 allOf: 18 21 - $ref: dai-common.yaml# 19 22 20 23 properties: 21 24 compatible: 22 - enum: 23 - - richtek,rtq9128 25 + oneOf: 26 + - enum: 27 + - richtek,rtq9128 28 + - items: 29 + - enum: 30 + - richtek,rtq9154 31 + - const: richtek,rtq9128 24 32 25 33 reg: 26 34 maxItems: 1
+107 -7
sound/soc/codecs/rtq9128.c
··· 40 40 #define RTQ9128_REG_EFUSE_DATA 0xE0 41 41 #define RTQ9128_REG_VENDOR_ID 0xF9 42 42 43 + #define RTQ9154_REG_CH1_VOL 0x34 44 + #define RTQ9154_REG_CH2_VOL 0x33 45 + #define RTQ9154_REG_CH3_VOL 0x32 46 + #define RTQ9154_REG_CH4_VOL 0x31 47 + #define RTQ9154_REG_AUTOULQM 0xAD 48 + 43 49 #define RTQ9128_CHSTAT_VAL_MASK GENMASK(1, 0) 44 50 #define RTQ9128_DOLEN_MASK GENMASK(7, 6) 45 51 #define RTQ9128_TDMSRCIN_MASK GENMASK(5, 4) ··· 54 48 #define RTQ9128_MSMUTE_MASK BIT(0) 55 49 #define RTQ9128_DIE_CHECK_MASK GENMASK(4, 0) 56 50 #define RTQ9128_VENDOR_ID_MASK GENMASK(19, 8) 51 + #define RTQ9128_MODEL_ID_MASK GENMASK(7, 4) 57 52 58 53 #define RTQ9128_SOFT_RESET_VAL 0x80 59 54 #define RTQ9128_VENDOR_ID_VAL 0x470 ··· 63 56 #define RTQ9128_TKA470B_VAL 0 64 57 #define RTQ9128_RTQ9128DH_VAL 0x0F 65 58 #define RTQ9128_RTQ9128DL_VAL 0x10 59 + #define RTQ9154_MODEL_ID 0x08 60 + 61 + #define RTQ9154_AUTOULQM_VAL 0x82 62 + 63 + enum rtq9128_chip_model { 64 + CHIP_MODEL_RTQ9128 = 0, 65 + CHIP_MODEL_RTQ9154, 66 + CHIP_MODEL_MAX 67 + }; 66 68 67 69 struct rtq9128_data { 68 70 struct gpio_desc *enable; ··· 79 63 int tdm_slots; 80 64 int tdm_slot_width; 81 65 bool tdm_input_data2_select; 66 + enum rtq9128_chip_model chip_model; 82 67 }; 83 68 84 69 struct rtq9128_init_reg { ··· 268 251 SOC_ENUM_SINGLE(RTQ9128_REG_PLLTRI_GEN2, 0, ARRAY_SIZE(phase_select_text), 269 252 phase_select_text); 270 253 254 + static const struct soc_enum rtq9154_ch1_si_enum = 255 + SOC_ENUM_SINGLE(RTQ9128_REG_SDI_SEL, 0, ARRAY_SIZE(source_select_text), 256 + source_select_text); 257 + static const struct soc_enum rtq9154_ch2_si_enum = 258 + SOC_ENUM_SINGLE(RTQ9128_REG_SDI_SEL, 2, ARRAY_SIZE(source_select_text), 259 + source_select_text); 260 + static const struct soc_enum rtq9154_ch3_si_enum = 261 + SOC_ENUM_SINGLE(RTQ9128_REG_SDI_SEL, 4, ARRAY_SIZE(source_select_text), 262 + source_select_text); 263 + static const struct soc_enum rtq9154_ch4_si_enum = 264 + SOC_ENUM_SINGLE(RTQ9128_REG_SDI_SEL, 6, ARRAY_SIZE(source_select_text), 265 + source_select_text); 266 + static const struct soc_enum rtq9154_out1_phase_enum = 267 + SOC_ENUM_SINGLE(RTQ9128_REG_PLLTRI_GEN2, 0, ARRAY_SIZE(phase_select_text), 268 + phase_select_text); 269 + static const struct soc_enum rtq9154_out2_phase_enum = 270 + SOC_ENUM_SINGLE(RTQ9128_REG_PLLTRI_GEN2, 4, ARRAY_SIZE(phase_select_text), 271 + phase_select_text); 272 + static const struct soc_enum rtq9154_out3_phase_enum = 273 + SOC_ENUM_SINGLE(RTQ9128_REG_PLLTRI_GEN1, 0, ARRAY_SIZE(phase_select_text), 274 + phase_select_text); 275 + 271 276 /* 272 277 * In general usage, DVDD could be 1P8V, 3P0V or 3P3V. 273 278 * This DVDD undervoltage protection is to prevent from the abnormal power ··· 322 283 SOC_ENUM("DVDD UV Threshold Select", rtq9128_dvdduv_select_enum), 323 284 }; 324 285 286 + static const struct snd_kcontrol_new rtq9154_snd_ctrls[] = { 287 + SOC_SINGLE_TLV("MS Volume", RTQ9128_REG_MS_VOL, 2, 511, 1, dig_tlv), 288 + SOC_SINGLE_TLV("CH1 Volume", RTQ9154_REG_CH1_VOL, 2, 511, 1, dig_tlv), 289 + SOC_SINGLE_TLV("CH2 Volume", RTQ9154_REG_CH2_VOL, 2, 511, 1, dig_tlv), 290 + SOC_SINGLE_TLV("CH3 Volume", RTQ9154_REG_CH3_VOL, 2, 511, 1, dig_tlv), 291 + SOC_SINGLE_TLV("CH4 Volume", RTQ9154_REG_CH4_VOL, 2, 511, 1, dig_tlv), 292 + SOC_SINGLE_TLV("SPK Gain Volume", RTQ9128_REG_MISC, 0, 5, 0, spkgain_tlv), 293 + SOC_SINGLE("PBTL12 Switch", RTQ9128_REG_MISC, 4, 1, 0), 294 + SOC_SINGLE("PBTL34 Switch", RTQ9128_REG_MISC, 5, 1, 0), 295 + SOC_SINGLE("Spread Spectrum Switch", RTQ9128_REG_PWM_SS_OPT, 7, 1, 0), 296 + SOC_SINGLE("SDO Select", RTQ9128_REG_SDO_SEL, 0, 15, 0), 297 + SOC_ENUM("CH1 SI Select", rtq9154_ch1_si_enum), 298 + SOC_ENUM("CH2 SI Select", rtq9154_ch2_si_enum), 299 + SOC_ENUM("CH3 SI Select", rtq9154_ch3_si_enum), 300 + SOC_ENUM("CH4 SI Select", rtq9154_ch4_si_enum), 301 + SOC_ENUM("PWM FREQ Select", rtq9128_pwm_freq_enum), 302 + SOC_ENUM("OUT1 Phase Select", rtq9154_out1_phase_enum), 303 + SOC_ENUM("OUT2 Phase Select", rtq9154_out2_phase_enum), 304 + SOC_ENUM("OUT3 Phase Select", rtq9154_out3_phase_enum), 305 + SOC_ENUM("DVDD UV Threshold Select", rtq9128_dvdduv_select_enum), 306 + }; 307 + 325 308 static int rtq9128_dac_power_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, 326 309 int event) 327 310 { 328 311 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); 312 + struct rtq9128_data *data = snd_soc_component_get_drvdata(comp); 329 313 unsigned int shift, mask; 330 314 int ret; 331 315 ··· 362 300 shift = 2; 363 301 else 364 302 shift = 0; 303 + 304 + /* Compared to RTQ9128, RTQ9154 use the reverse order for DACx bitfield location */ 305 + if (data->chip_model == CHIP_MODEL_RTQ9154) 306 + shift = 6 - shift; 365 307 366 308 mask = RTQ9128_CHSTAT_VAL_MASK << shift; 367 309 ··· 418 352 static const struct rtq9128_init_reg rtq9128_tka470b_tables[] = { 419 353 { 0xA0, 0xEF }, 420 354 { 0x0D, 0x00 }, 421 - { 0x03, 0x05 }, 355 + { 0x03, 0x45 }, 422 356 { 0x05, 0x31 }, 423 357 { 0x06, 0x23 }, 424 358 { 0x70, 0x11 }, ··· 433 367 434 368 static const struct rtq9128_init_reg rtq9128_dh_tables[] = { 435 369 { 0x0F, 0x00 }, 436 - { 0x03, 0x0D }, 370 + { 0x03, 0x4D }, 437 371 { 0xB2, 0xFF }, 438 372 { 0xB3, 0xFF }, 439 373 { 0x30, 0x180 }, ··· 444 378 445 379 static const struct rtq9128_init_reg rtq9128_dl_tables[] = { 446 380 { 0x0F, 0x00 }, 447 - { 0x03, 0x0D }, 381 + { 0x03, 0x4D }, 448 382 { 0x30, 0x180 }, 449 383 { 0x8A, 0x55 }, 450 384 { 0x72, 0x00 }, ··· 453 387 454 388 static int rtq9128_component_probe(struct snd_soc_component *comp) 455 389 { 390 + struct rtq9128_data *data = snd_soc_component_get_drvdata(comp); 456 391 const struct rtq9128_init_reg *table, *curr; 457 392 size_t table_size; 458 393 unsigned int val; ··· 488 421 return ret; 489 422 } 490 423 424 + 425 + if (data->chip_model == CHIP_MODEL_RTQ9154) { 426 + /* Enable RTQ9154 Specific AUTO ULQM feature */ 427 + ret = snd_soc_component_write(comp, RTQ9154_REG_AUTOULQM, RTQ9154_AUTOULQM_VAL); 428 + if (ret < 0) 429 + return ret; 430 + } 431 + 491 432 pm_runtime_mark_last_busy(comp->dev); 492 433 pm_runtime_put(comp->dev); 493 434 ··· 506 431 .probe = rtq9128_component_probe, 507 432 .controls = rtq9128_snd_ctrls, 508 433 .num_controls = ARRAY_SIZE(rtq9128_snd_ctrls), 434 + .dapm_widgets = rtq9128_dapm_widgets, 435 + .num_dapm_widgets = ARRAY_SIZE(rtq9128_dapm_widgets), 436 + .dapm_routes = rtq9128_dapm_routes, 437 + .num_dapm_routes = ARRAY_SIZE(rtq9128_dapm_routes), 438 + .use_pmdown_time = 1, 439 + .endianness = 1, 440 + }; 441 + 442 + static const struct snd_soc_component_driver rtq9154_comp_driver = { 443 + .probe = rtq9128_component_probe, 444 + .controls = rtq9154_snd_ctrls, 445 + .num_controls = ARRAY_SIZE(rtq9154_snd_ctrls), 509 446 .dapm_widgets = rtq9128_dapm_widgets, 510 447 .num_dapm_widgets = ARRAY_SIZE(rtq9128_dapm_widgets), 511 448 .dapm_routes = rtq9128_dapm_routes, ··· 766 679 struct device *dev = &i2c->dev; 767 680 struct rtq9128_data *data; 768 681 struct regmap *regmap; 769 - unsigned int venid; 682 + unsigned int veninfo, venid, chip_model; 683 + const struct snd_soc_component_driver *comp_drv; 770 684 int ret; 771 685 772 686 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ··· 800 712 if (IS_ERR(regmap)) 801 713 return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); 802 714 803 - ret = regmap_read(regmap, RTQ9128_REG_VENDOR_ID, &venid); 715 + ret = regmap_read(regmap, RTQ9128_REG_VENDOR_ID, &veninfo); 804 716 if (ret) 805 717 return dev_err_probe(dev, ret, "Failed to get vendor id\n"); 806 718 807 - venid = FIELD_GET(RTQ9128_VENDOR_ID_MASK, venid); 719 + venid = FIELD_GET(RTQ9128_VENDOR_ID_MASK, veninfo); 808 720 if (venid != RTQ9128_VENDOR_ID_VAL) 809 721 return dev_err_probe(dev, -ENODEV, "Vendor ID not match (0x%x)\n", venid); 722 + 723 + chip_model = FIELD_GET(RTQ9128_MODEL_ID_MASK, veninfo); 724 + switch (chip_model) { 725 + case RTQ9154_MODEL_ID: 726 + data->chip_model = CHIP_MODEL_RTQ9154; 727 + comp_drv = &rtq9154_comp_driver; 728 + break; 729 + default: 730 + data->chip_model = CHIP_MODEL_RTQ9128; 731 + comp_drv = &rtq9128_comp_driver; 732 + break; 733 + } 810 734 811 735 pm_runtime_set_active(dev); 812 736 pm_runtime_mark_last_busy(dev); ··· 826 726 if (ret) 827 727 return dev_err_probe(dev, ret, "Failed to enable pm runtime\n"); 828 728 829 - return devm_snd_soc_register_component(dev, &rtq9128_comp_driver, &rtq9128_dai, 1); 729 + return devm_snd_soc_register_component(dev, comp_drv, &rtq9128_dai, 1); 830 730 } 831 731 832 732 static int rtq9128_pm_runtime_suspend(struct device *dev)