Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
reset: tenstorrent: Add reset controller for Atlantis
Adds Atlantis Reset Controller driver, which shares the same regmap as
prcm ( clock controller).
This version of the reset controller driver covers resets from the RCPU
prcm.
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com>
Reviewed-by: Drew Fustini <fustini@kernel.org>
Signed-off-by: Drew Fustini <fustini@kernel.org>
authored by
Anirudh Srinivasan
and committed by
Drew Fustini
89b23af1
1227a8f6
+186
+1
MAINTAINERS
+1
MAINTAINERS
···
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F: Documentation/devicetree/bindings/clock/tenstorrent,atlantis-prcm-rcpu.yaml
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F: Documentation/devicetree/bindings/riscv/tenstorrent.yaml
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F: arch/riscv/boot/dts/tenstorrent/
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F: drivers/reset/reset-tenstorrent-atlantis.c
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F: include/dt-bindings/clock/tenstorrent,atlantis-prcm-rcpu.h
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RISC-V THEAD SoC SUPPORT
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drivers/reset/Kconfig
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drivers/reset/Kconfig
···
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help
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This enables the reset driver for Allwinner SoCs.
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config RESET_TENSTORRENT_ATLANTIS
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tristate "Tenstorrent atlantis reset driver"
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depends on ARCH_TENSTORRENT || COMPILE_TEST
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select AUXILIARY_BUS
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default ARCH_TENSTORRENT
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help
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This enables the driver for the reset controller
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present in the Tenstorrent Atlantis SoC.
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Enable this option to be able to use hardware
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resets on Atalantis based systems.
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config RESET_TH1520
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tristate "T-HEAD TH1520 reset controller"
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depends on ARCH_THEAD || COMPILE_TEST
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drivers/reset/Makefile
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drivers/reset/Makefile
···
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obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
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obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
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obj-$(CONFIG_RESET_TENSTORRENT_ATLANTIS) += reset-tenstorrent-atlantis.o
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obj-$(CONFIG_RESET_TH1520) += reset-th1520.o
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obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o
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obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
+173
drivers/reset/reset-tenstorrent-atlantis.c
+173
drivers/reset/reset-tenstorrent-atlantis.c
···
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Tenstorrent Atlantis PRCM Reset Driver
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*
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* Copyright (c) 2026 Tenstorrent
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*/
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#include <dt-bindings/clock/tenstorrent,atlantis-prcm-rcpu.h>
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#include <linux/auxiliary_bus.h>
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#include <linux/reset-controller.h>
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#include <linux/regmap.h>
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+
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/* RCPU Reset Register Offsets */
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#define RCPU_BLK_RST_REG 0x001c
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#define LSIO_BLK_RST_REG 0x0020
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#define HSIO_BLK_RST_REG 0x000c
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#define PCIE_SUBS_RST_REG 0x0000
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#define MM_RSTN_REG 0x0014
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struct atlantis_reset_data {
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u8 bit;
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u16 reg;
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bool active_low;
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};
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struct atlantis_reset_controller_data {
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const struct atlantis_reset_data *reset_data;
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size_t count;
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};
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struct atlantis_reset_controller {
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struct reset_controller_dev rcdev;
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const struct atlantis_reset_controller_data *data;
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struct regmap *regmap;
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};
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static inline struct atlantis_reset_controller *
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to_atlantis_reset_controller(struct reset_controller_dev *rcdev)
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{
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return container_of(rcdev, struct atlantis_reset_controller, rcdev);
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}
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#define RESET_DATA(_reg, _bit, _active_low) \
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{ \
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.bit = _bit, .reg = _reg, .active_low = _active_low, \
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}
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static const struct atlantis_reset_data atlantis_rcpu_resets[] = {
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[RST_SMNDMA0] = RESET_DATA(RCPU_BLK_RST_REG, 0, true),
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[RST_SMNDMA1] = RESET_DATA(RCPU_BLK_RST_REG, 1, true),
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[RST_WDT0] = RESET_DATA(RCPU_BLK_RST_REG, 2, true),
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[RST_WDT1] = RESET_DATA(RCPU_BLK_RST_REG, 3, true),
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[RST_TMR] = RESET_DATA(RCPU_BLK_RST_REG, 4, true),
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[RST_PVTC] = RESET_DATA(RCPU_BLK_RST_REG, 12, true),
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[RST_PMU] = RESET_DATA(RCPU_BLK_RST_REG, 13, true),
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[RST_MAILBOX] = RESET_DATA(RCPU_BLK_RST_REG, 14, true),
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[RST_SPACC] = RESET_DATA(RCPU_BLK_RST_REG, 26, true),
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[RST_OTP] = RESET_DATA(RCPU_BLK_RST_REG, 28, true),
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[RST_TRNG] = RESET_DATA(RCPU_BLK_RST_REG, 29, true),
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[RST_CRC] = RESET_DATA(RCPU_BLK_RST_REG, 30, true),
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[RST_QSPI] = RESET_DATA(LSIO_BLK_RST_REG, 0, true),
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[RST_I2C0] = RESET_DATA(LSIO_BLK_RST_REG, 1, true),
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[RST_I2C1] = RESET_DATA(LSIO_BLK_RST_REG, 2, true),
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[RST_I2C2] = RESET_DATA(LSIO_BLK_RST_REG, 3, true),
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[RST_I2C3] = RESET_DATA(LSIO_BLK_RST_REG, 4, true),
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[RST_I2C4] = RESET_DATA(LSIO_BLK_RST_REG, 5, true),
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[RST_UART0] = RESET_DATA(LSIO_BLK_RST_REG, 6, true),
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[RST_UART1] = RESET_DATA(LSIO_BLK_RST_REG, 7, true),
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[RST_UART2] = RESET_DATA(LSIO_BLK_RST_REG, 8, true),
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[RST_UART3] = RESET_DATA(LSIO_BLK_RST_REG, 9, true),
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[RST_UART4] = RESET_DATA(LSIO_BLK_RST_REG, 10, true),
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[RST_SPI0] = RESET_DATA(LSIO_BLK_RST_REG, 11, true),
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[RST_SPI1] = RESET_DATA(LSIO_BLK_RST_REG, 12, true),
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[RST_SPI2] = RESET_DATA(LSIO_BLK_RST_REG, 13, true),
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[RST_SPI3] = RESET_DATA(LSIO_BLK_RST_REG, 14, true),
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[RST_GPIO] = RESET_DATA(LSIO_BLK_RST_REG, 15, true),
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[RST_CAN0] = RESET_DATA(LSIO_BLK_RST_REG, 17, true),
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[RST_CAN1] = RESET_DATA(LSIO_BLK_RST_REG, 18, true),
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[RST_I2S0] = RESET_DATA(LSIO_BLK_RST_REG, 19, true),
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[RST_I2S1] = RESET_DATA(LSIO_BLK_RST_REG, 20, true),
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};
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static const struct atlantis_reset_controller_data atlantis_rcpu_reset_data = {
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.reset_data = atlantis_rcpu_resets,
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.count = ARRAY_SIZE(atlantis_rcpu_resets),
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};
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static int atlantis_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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unsigned int val;
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struct atlantis_reset_controller *rst =
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to_atlantis_reset_controller(rcdev);
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const struct atlantis_reset_data *data = &rst->data->reset_data[id];
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unsigned int mask = BIT(data->bit);
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struct regmap *regmap = rst->regmap;
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if (data->active_low ^ assert)
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val = mask;
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else
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val = 0;
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return regmap_update_bits(regmap, data->reg, mask, val);
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}
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static int atlantis_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return atlantis_reset_update(rcdev, id, true);
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}
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static int atlantis_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return atlantis_reset_update(rcdev, id, false);
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}
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static const struct reset_control_ops atlantis_reset_control_ops = {
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.assert = atlantis_reset_assert,
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.deassert = atlantis_reset_deassert,
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};
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static int
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atlantis_reset_controller_register(struct device *dev,
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struct atlantis_reset_controller *controller)
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{
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struct reset_controller_dev *rcdev = &controller->rcdev;
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rcdev->ops = &atlantis_reset_control_ops;
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rcdev->owner = THIS_MODULE;
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rcdev->of_node = dev->of_node;
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rcdev->nr_resets = controller->data->count;
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return devm_reset_controller_register(dev, &controller->rcdev);
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}
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static int atlantis_reset_probe(struct auxiliary_device *adev,
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const struct auxiliary_device_id *id)
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{
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struct atlantis_reset_controller *controller;
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struct device *dev = &adev->dev;
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struct regmap *regmap;
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regmap = dev_get_regmap(dev->parent, NULL);
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if (!regmap)
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return -ENODEV;
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controller = devm_kzalloc(dev, sizeof(*controller), GFP_KERNEL);
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if (!controller)
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return -ENOMEM;
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controller->data =
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(const struct atlantis_reset_controller_data *)id->driver_data;
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controller->regmap = regmap;
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return atlantis_reset_controller_register(dev, controller);
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}
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static const struct auxiliary_device_id atlantis_reset_ids[] = {
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{ .name = "atlantis_prcm.rcpu-reset",
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.driver_data = (kernel_ulong_t)&atlantis_rcpu_reset_data },
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{},
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};
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MODULE_DEVICE_TABLE(auxiliary, atlantis_reset_ids);
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static struct auxiliary_driver atlantis_reset_driver = {
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.probe = atlantis_reset_probe,
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.id_table = atlantis_reset_ids,
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};
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module_auxiliary_driver(atlantis_reset_driver);
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MODULE_AUTHOR("Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com>");
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MODULE_DESCRIPTION("Atlantis PRCM reset controller driver");
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MODULE_LICENSE("GPL");