Merge branch 'enetc-fixes' · tjh.dev/kernel@8a00946

+44 -43

drivers/net/ethernet/freescale/enetc/enetc.c

··· 281 281 int work_done; 282 282 int i; 283 283 284 + enetc_lock_mdio(); 285 + 284 286 for (i = 0; i < v->count_tx_rings; i++) 285 287 if (!enetc_clean_tx_ring(&v->tx_ring[i], budget)) 286 288 complete = false; ··· 293 291 if (work_done) 294 292 v->rx_napi_work = true; 295 293 296 - if (!complete) 294 + if (!complete) { 295 + enetc_unlock_mdio(); 297 296 return budget; 297 + } 298 298 299 299 napi_complete_done(napi, work_done); 300 300 ··· 304 300 enetc_rx_net_dim(v); 305 301 306 302 v->rx_napi_work = false; 307 - 308 - enetc_lock_mdio(); 309 303 310 304 /* enable interrupts */ 311 305 enetc_wr_reg_hot(v->rbier, ENETC_RBIER_RXTIE); ··· 329 327 { 330 328 u32 lo, hi, tstamp_lo; 331 329 332 - lo = enetc_rd(hw, ENETC_SICTR0); 333 - hi = enetc_rd(hw, ENETC_SICTR1); 330 + lo = enetc_rd_hot(hw, ENETC_SICTR0); 331 + hi = enetc_rd_hot(hw, ENETC_SICTR1); 334 332 tstamp_lo = le32_to_cpu(txbd->wb.tstamp); 335 333 if (lo <= tstamp_lo) 336 334 hi -= 1; ··· 360 358 i = tx_ring->next_to_clean; 361 359 tx_swbd = &tx_ring->tx_swbd[i]; 362 360 363 - enetc_lock_mdio(); 364 361 bds_to_clean = enetc_bd_ready_count(tx_ring, i); 365 - enetc_unlock_mdio(); 366 362 367 363 do_tstamp = false; 368 364 ··· 403 403 tx_swbd = tx_ring->tx_swbd; 404 404 } 405 405 406 - enetc_lock_mdio(); 407 - 408 406 /* BD iteration loop end */ 409 407 if (is_eof) { 410 408 tx_frm_cnt++; ··· 413 415 414 416 if (unlikely(!bds_to_clean)) 415 417 bds_to_clean = enetc_bd_ready_count(tx_ring, i); 416 - 417 - enetc_unlock_mdio(); 418 418 } 419 419 420 420 tx_ring->next_to_clean = i; ··· 523 527 static void enetc_get_offloads(struct enetc_bdr *rx_ring, 524 528 union enetc_rx_bd *rxbd, struct sk_buff *skb) 525 529 { 526 - #ifdef CONFIG_FSL_ENETC_PTP_CLOCK 527 530 struct enetc_ndev_priv *priv = netdev_priv(rx_ring->ndev); 528 - #endif 531 + 529 532 /* TODO: hashing */ 530 533 if (rx_ring->ndev->features & NETIF_F_RXCSUM) { 531 534 u16 inet_csum = le16_to_cpu(rxbd->r.inet_csum); ··· 533 538 skb->ip_summed = CHECKSUM_COMPLETE; 534 539 } 535 540 536 - /* copy VLAN to skb, if one is extracted, for now we assume it's a 537 - * standard TPID, but HW also supports custom values 538 - */ 539 - if (le16_to_cpu(rxbd->r.flags) & ENETC_RXBD_FLAG_VLAN) 540 - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 541 - le16_to_cpu(rxbd->r.vlan_opt)); 541 + if (le16_to_cpu(rxbd->r.flags) & ENETC_RXBD_FLAG_VLAN) { 542 + __be16 tpid = 0; 543 + 544 + switch (le16_to_cpu(rxbd->r.flags) & ENETC_RXBD_FLAG_TPID) { 545 + case 0: 546 + tpid = htons(ETH_P_8021Q); 547 + break; 548 + case 1: 549 + tpid = htons(ETH_P_8021AD); 550 + break; 551 + case 2: 552 + tpid = htons(enetc_port_rd(&priv->si->hw, 553 + ENETC_PCVLANR1)); 554 + break; 555 + case 3: 556 + tpid = htons(enetc_port_rd(&priv->si->hw, 557 + ENETC_PCVLANR2)); 558 + break; 559 + default: 560 + break; 561 + } 562 + 563 + __vlan_hwaccel_put_tag(skb, tpid, le16_to_cpu(rxbd->r.vlan_opt)); 564 + } 565 + 542 566 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK 543 567 if (priv->active_offloads & ENETC_F_RX_TSTAMP) 544 568 enetc_get_rx_tstamp(rx_ring->ndev, rxbd, skb); ··· 674 660 u32 bd_status; 675 661 u16 size; 676 662 677 - enetc_lock_mdio(); 678 - 679 663 if (cleaned_cnt >= ENETC_RXBD_BUNDLE) { 680 664 int count = enetc_refill_rx_ring(rx_ring, cleaned_cnt); 681 665 ··· 684 672 685 673 rxbd = enetc_rxbd(rx_ring, i); 686 674 bd_status = le32_to_cpu(rxbd->r.lstatus); 687 - if (!bd_status) { 688 - enetc_unlock_mdio(); 675 + if (!bd_status) 689 676 break; 690 - } 691 677 692 678 enetc_wr_reg_hot(rx_ring->idr, BIT(rx_ring->index)); 693 679 dma_rmb(); /* for reading other rxbd fields */ 694 680 size = le16_to_cpu(rxbd->r.buf_len); 695 681 skb = enetc_map_rx_buff_to_skb(rx_ring, i, size); 696 - if (!skb) { 697 - enetc_unlock_mdio(); 682 + if (!skb) 698 683 break; 699 - } 700 684 701 685 enetc_get_offloads(rx_ring, rxbd, skb); 702 686 ··· 704 696 705 697 if (unlikely(bd_status & 706 698 ENETC_RXBD_LSTATUS(ENETC_RXBD_ERR_MASK))) { 707 - enetc_unlock_mdio(); 708 699 dev_kfree_skb(skb); 709 700 while (!(bd_status & ENETC_RXBD_LSTATUS_F)) { 710 701 dma_rmb(); ··· 742 735 rx_byte_cnt += skb->len; 743 736 744 737 enetc_process_skb(rx_ring, skb); 745 - 746 - enetc_unlock_mdio(); 747 738 748 739 napi_gro_receive(napi, skb); 749 740 ··· 989 984 enetc_free_tx_ring(priv->tx_ring[i]); 990 985 } 991 986 992 - static int enetc_alloc_cbdr(struct device *dev, struct enetc_cbdr *cbdr) 987 + int enetc_alloc_cbdr(struct device *dev, struct enetc_cbdr *cbdr) 993 988 { 994 989 int size = cbdr->bd_count * sizeof(struct enetc_cbd); 995 990 ··· 1010 1005 return 0; 1011 1006 } 1012 1007 1013 - static void enetc_free_cbdr(struct device *dev, struct enetc_cbdr *cbdr) 1008 + void enetc_free_cbdr(struct device *dev, struct enetc_cbdr *cbdr) 1014 1009 { 1015 1010 int size = cbdr->bd_count * sizeof(struct enetc_cbd); 1016 1011 ··· 1018 1013 cbdr->bd_base = NULL; 1019 1014 } 1020 1015 1021 - static void enetc_setup_cbdr(struct enetc_hw *hw, struct enetc_cbdr *cbdr) 1016 + void enetc_setup_cbdr(struct enetc_hw *hw, struct enetc_cbdr *cbdr) 1022 1017 { 1023 1018 /* set CBDR cache attributes */ 1024 1019 enetc_wr(hw, ENETC_SICAR2, ··· 1038 1033 cbdr->cir = hw->reg + ENETC_SICBDRCIR; 1039 1034 } 1040 1035 1041 - static void enetc_clear_cbdr(struct enetc_hw *hw) 1036 + void enetc_clear_cbdr(struct enetc_hw *hw) 1042 1037 { 1043 1038 enetc_wr(hw, ENETC_SICBDRMR, 0); 1044 1039 } ··· 1063 1058 return 0; 1064 1059 } 1065 1060 1066 - static int enetc_configure_si(struct enetc_ndev_priv *priv) 1061 + int enetc_configure_si(struct enetc_ndev_priv *priv) 1067 1062 { 1068 1063 struct enetc_si *si = priv->si; 1069 1064 struct enetc_hw *hw = &si->hw; 1070 1065 int err; 1071 1066 1072 - enetc_setup_cbdr(hw, &si->cbd_ring); 1073 1067 /* set SI cache attributes */ 1074 1068 enetc_wr(hw, ENETC_SICAR0, 1075 1069 ENETC_SICAR_RD_COHERENT | ENETC_SICAR_WR_COHERENT); ··· 1116 1112 if (err) 1117 1113 return err; 1118 1114 1115 + enetc_setup_cbdr(&si->hw, &si->cbd_ring); 1116 + 1119 1117 priv->cls_rules = kcalloc(si->num_fs_entries, sizeof(*priv->cls_rules), 1120 1118 GFP_KERNEL); 1121 1119 if (!priv->cls_rules) { ··· 1125 1119 goto err_alloc_cls; 1126 1120 } 1127 1121 1128 - err = enetc_configure_si(priv); 1129 - if (err) 1130 - goto err_config_si; 1131 - 1132 1122 return 0; 1133 1123 1134 - err_config_si: 1135 - kfree(priv->cls_rules); 1136 1124 err_alloc_cls: 1137 1125 enetc_clear_cbdr(&si->hw); 1138 1126 enetc_free_cbdr(priv->dev, &si->cbd_ring); ··· 1212 1212 rx_ring->idr = hw->reg + ENETC_SIRXIDR; 1213 1213 1214 1214 enetc_refill_rx_ring(rx_ring, enetc_bd_unused(rx_ring)); 1215 - enetc_wr(hw, ENETC_SIRXIDR, rx_ring->next_to_use); 1215 + /* update ENETC's consumer index */ 1216 + enetc_rxbdr_wr(hw, idx, ENETC_RBCIR, rx_ring->next_to_use); 1216 1217 1217 1218 /* enable ring */ 1218 1219 enetc_rxbdr_wr(hw, idx, ENETC_RBMR, rbmr);

+5

drivers/net/ethernet/freescale/enetc/enetc.h

··· 292 292 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv); 293 293 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv); 294 294 void enetc_free_si_resources(struct enetc_ndev_priv *priv); 295 + int enetc_configure_si(struct enetc_ndev_priv *priv); 295 296 296 297 int enetc_open(struct net_device *ndev); 297 298 int enetc_close(struct net_device *ndev); ··· 310 309 void enetc_set_ethtool_ops(struct net_device *ndev); 311 310 312 311 /* control buffer descriptor ring (CBDR) */ 312 + int enetc_alloc_cbdr(struct device *dev, struct enetc_cbdr *cbdr); 313 + void enetc_free_cbdr(struct device *dev, struct enetc_cbdr *cbdr); 314 + void enetc_setup_cbdr(struct enetc_hw *hw, struct enetc_cbdr *cbdr); 315 + void enetc_clear_cbdr(struct enetc_hw *hw); 313 316 int enetc_set_mac_flt_entry(struct enetc_si *si, int index, 314 317 char *mac_addr, int si_map); 315 318 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);

+15 -3

drivers/net/ethernet/freescale/enetc/enetc_hw.h

··· 172 172 #define ENETC_PSIPMAR0(n) (0x0100 + (n) * 0x8) /* n = SI index */ 173 173 #define ENETC_PSIPMAR1(n) (0x0104 + (n) * 0x8) 174 174 #define ENETC_PVCLCTR 0x0208 175 + #define ENETC_PCVLANR1 0x0210 176 + #define ENETC_PCVLANR2 0x0214 175 177 #define ENETC_VLAN_TYPE_C BIT(0) 176 178 #define ENETC_VLAN_TYPE_S BIT(1) 177 179 #define ENETC_PVCLCTR_OVTPIDL(bmp) ((bmp) & 0xff) /* VLAN_TYPE */ ··· 238 236 #define ENETC_PM_IMDIO_BASE 0x8030 239 237 240 238 #define ENETC_PM0_IF_MODE 0x8300 241 - #define ENETC_PMO_IFM_RG BIT(2) 239 + #define ENETC_PM0_IFM_RG BIT(2) 242 240 #define ENETC_PM0_IFM_RLP (BIT(5) | BIT(11)) 243 - #define ENETC_PM0_IFM_RGAUTO (BIT(15) | ENETC_PMO_IFM_RG | BIT(1)) 244 - #define ENETC_PM0_IFM_XGMII BIT(12) 241 + #define ENETC_PM0_IFM_EN_AUTO BIT(15) 242 + #define ENETC_PM0_IFM_SSP_MASK GENMASK(14, 13) 243 + #define ENETC_PM0_IFM_SSP_1000 (2 << 13) 244 + #define ENETC_PM0_IFM_SSP_100 (0 << 13) 245 + #define ENETC_PM0_IFM_SSP_10 (1 << 13) 246 + #define ENETC_PM0_IFM_FULL_DPX BIT(12) 247 + #define ENETC_PM0_IFM_IFMODE_MASK GENMASK(1, 0) 248 + #define ENETC_PM0_IFM_IFMODE_XGMII 0 249 + #define ENETC_PM0_IFM_IFMODE_GMII 2 245 250 #define ENETC_PSIDCAPR 0x1b08 246 251 #define ENETC_PSIDCAPR_MSK GENMASK(15, 0) 247 252 #define ENETC_PSFCAPR 0x1b18 ··· 462 453 #define enetc_wr_reg(reg, val) _enetc_wr_reg_wa((reg), (val)) 463 454 #define enetc_rd(hw, off) enetc_rd_reg((hw)->reg + (off)) 464 455 #define enetc_wr(hw, off, val) enetc_wr_reg((hw)->reg + (off), val) 456 + #define enetc_rd_hot(hw, off) enetc_rd_reg_hot((hw)->reg + (off)) 457 + #define enetc_wr_hot(hw, off, val) enetc_wr_reg_hot((hw)->reg + (off), val) 465 458 #define enetc_rd64(hw, off) _enetc_rd_reg64_wa((hw)->reg + (off)) 466 459 /* port register accessors - PF only */ 467 460 #define enetc_port_rd(hw, off) enetc_rd_reg((hw)->port + (off)) ··· 579 568 #define ENETC_RXBD_LSTATUS(flags) ((flags) << 16) 580 569 #define ENETC_RXBD_FLAG_VLAN BIT(9) 581 570 #define ENETC_RXBD_FLAG_TSTMP BIT(10) 571 + #define ENETC_RXBD_FLAG_TPID GENMASK(1, 0) 582 572 583 573 #define ENETC_MAC_ADDR_FILT_CNT 8 /* # of supported entries per port */ 584 574 #define EMETC_MAC_ADDR_FILT_RES 3 /* # of reserved entries at the beginning */

+81 -17

drivers/net/ethernet/freescale/enetc/enetc_pf.c

··· 190 190 { 191 191 struct enetc_ndev_priv *priv = netdev_priv(ndev); 192 192 struct enetc_pf *pf = enetc_si_priv(priv->si); 193 - char vlan_promisc_simap = pf->vlan_promisc_simap; 194 193 struct enetc_hw *hw = &priv->si->hw; 195 194 bool uprom = false, mprom = false; 196 195 struct enetc_mac_filter *filter; ··· 202 203 psipmr = ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0); 203 204 uprom = true; 204 205 mprom = true; 205 - /* Enable VLAN promiscuous mode for SI0 (PF) */ 206 - vlan_promisc_simap |= BIT(0); 207 206 } else if (ndev->flags & IFF_ALLMULTI) { 208 207 /* enable multi cast promisc mode for SI0 (PF) */ 209 208 psipmr = ENETC_PSIPMR_SET_MP(0); 210 209 mprom = true; 211 210 } 212 - 213 - enetc_set_vlan_promisc(&pf->si->hw, vlan_promisc_simap); 214 211 215 212 /* first 2 filter entries belong to PF */ 216 213 if (!uprom) { ··· 315 320 u32 reg; 316 321 317 322 reg = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 318 - if (reg & ENETC_PMO_IFM_RG) { 323 + if (reg & ENETC_PM0_IFM_RG) { 319 324 /* RGMII mode */ 320 325 reg = (reg & ~ENETC_PM0_IFM_RLP) | 321 326 (en ? ENETC_PM0_IFM_RLP : 0); ··· 494 499 495 500 static void enetc_mac_config(struct enetc_hw *hw, phy_interface_t phy_mode) 496 501 { 497 - /* set auto-speed for RGMII */ 498 - if (enetc_port_rd(hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG || 499 - phy_interface_mode_is_rgmii(phy_mode)) 500 - enetc_port_wr(hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_RGAUTO); 502 + u32 val; 501 503 502 - if (phy_mode == PHY_INTERFACE_MODE_USXGMII) 503 - enetc_port_wr(hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_XGMII); 504 + if (phy_interface_mode_is_rgmii(phy_mode)) { 505 + val = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 506 + val &= ~ENETC_PM0_IFM_EN_AUTO; 507 + val &= ENETC_PM0_IFM_IFMODE_MASK; 508 + val |= ENETC_PM0_IFM_IFMODE_GMII | ENETC_PM0_IFM_RG; 509 + enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 510 + } 511 + 512 + if (phy_mode == PHY_INTERFACE_MODE_USXGMII) { 513 + val = ENETC_PM0_IFM_FULL_DPX | ENETC_PM0_IFM_IFMODE_XGMII; 514 + enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 515 + } 504 516 } 505 517 506 518 static void enetc_mac_enable(struct enetc_hw *hw, bool en) ··· 939 937 phylink_set_pcs(priv->phylink, &pf->pcs->pcs); 940 938 } 941 939 940 + static void enetc_force_rgmii_mac(struct enetc_hw *hw, int speed, int duplex) 941 + { 942 + u32 old_val, val; 943 + 944 + old_val = val = enetc_port_rd(hw, ENETC_PM0_IF_MODE); 945 + 946 + if (speed == SPEED_1000) { 947 + val &= ~ENETC_PM0_IFM_SSP_MASK; 948 + val |= ENETC_PM0_IFM_SSP_1000; 949 + } else if (speed == SPEED_100) { 950 + val &= ~ENETC_PM0_IFM_SSP_MASK; 951 + val |= ENETC_PM0_IFM_SSP_100; 952 + } else if (speed == SPEED_10) { 953 + val &= ~ENETC_PM0_IFM_SSP_MASK; 954 + val |= ENETC_PM0_IFM_SSP_10; 955 + } 956 + 957 + if (duplex == DUPLEX_FULL) 958 + val |= ENETC_PM0_IFM_FULL_DPX; 959 + else 960 + val &= ~ENETC_PM0_IFM_FULL_DPX; 961 + 962 + if (val == old_val) 963 + return; 964 + 965 + enetc_port_wr(hw, ENETC_PM0_IF_MODE, val); 966 + } 967 + 942 968 static void enetc_pl_mac_link_up(struct phylink_config *config, 943 969 struct phy_device *phy, unsigned int mode, 944 970 phy_interface_t interface, int speed, ··· 978 948 priv = netdev_priv(pf->si->ndev); 979 949 if (priv->active_offloads & ENETC_F_QBV) 980 950 enetc_sched_speed_set(priv, speed); 951 + 952 + if (!phylink_autoneg_inband(mode) && 953 + phy_interface_mode_is_rgmii(interface)) 954 + enetc_force_rgmii_mac(&pf->si->hw, speed, duplex); 981 955 982 956 enetc_mac_enable(&pf->si->hw, true); 983 957 } ··· 1075 1041 return err; 1076 1042 } 1077 1043 1044 + static void enetc_init_unused_port(struct enetc_si *si) 1045 + { 1046 + struct device *dev = &si->pdev->dev; 1047 + struct enetc_hw *hw = &si->hw; 1048 + int err; 1049 + 1050 + si->cbd_ring.bd_count = ENETC_CBDR_DEFAULT_SIZE; 1051 + err = enetc_alloc_cbdr(dev, &si->cbd_ring); 1052 + if (err) 1053 + return; 1054 + 1055 + enetc_setup_cbdr(hw, &si->cbd_ring); 1056 + 1057 + enetc_init_port_rfs_memory(si); 1058 + enetc_init_port_rss_memory(si); 1059 + 1060 + enetc_clear_cbdr(hw); 1061 + enetc_free_cbdr(dev, &si->cbd_ring); 1062 + } 1063 + 1078 1064 static int enetc_pf_probe(struct pci_dev *pdev, 1079 1065 const struct pci_device_id *ent) 1080 1066 { ··· 1104 1050 struct enetc_si *si; 1105 1051 struct enetc_pf *pf; 1106 1052 int err; 1107 - 1108 - if (node && !of_device_is_available(node)) { 1109 - dev_info(&pdev->dev, "device is disabled, skipping\n"); 1110 - return -ENODEV; 1111 - } 1112 1053 1113 1054 err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(*pf)); 1114 1055 if (err) { ··· 1116 1067 err = -ENODEV; 1117 1068 dev_err(&pdev->dev, "could not map PF space, probing a VF?\n"); 1118 1069 goto err_map_pf_space; 1070 + } 1071 + 1072 + if (node && !of_device_is_available(node)) { 1073 + enetc_init_unused_port(si); 1074 + dev_info(&pdev->dev, "device is disabled, skipping\n"); 1075 + err = -ENODEV; 1076 + goto err_device_disabled; 1119 1077 } 1120 1078 1121 1079 pf = enetc_si_priv(si); ··· 1164 1108 goto err_init_port_rss; 1165 1109 } 1166 1110 1111 + err = enetc_configure_si(priv); 1112 + if (err) { 1113 + dev_err(&pdev->dev, "Failed to configure SI\n"); 1114 + goto err_config_si; 1115 + } 1116 + 1167 1117 err = enetc_alloc_msix(priv); 1168 1118 if (err) { 1169 1119 dev_err(&pdev->dev, "MSIX alloc failed\n"); ··· 1198 1136 enetc_mdiobus_destroy(pf); 1199 1137 err_mdiobus_create: 1200 1138 enetc_free_msix(priv); 1139 + err_config_si: 1201 1140 err_init_port_rss: 1202 1141 err_init_port_rfs: 1203 1142 err_alloc_msix: ··· 1207 1144 si->ndev = NULL; 1208 1145 free_netdev(ndev); 1209 1146 err_alloc_netdev: 1147 + err_device_disabled: 1210 1148 err_map_pf_space: 1211 1149 enetc_pci_remove(pdev); 1212 1150

+7

drivers/net/ethernet/freescale/enetc/enetc_vf.c

··· 171 171 goto err_alloc_si_res; 172 172 } 173 173 174 + err = enetc_configure_si(priv); 175 + if (err) { 176 + dev_err(&pdev->dev, "Failed to configure SI\n"); 177 + goto err_config_si; 178 + } 179 + 174 180 err = enetc_alloc_msix(priv); 175 181 if (err) { 176 182 dev_err(&pdev->dev, "MSIX alloc failed\n"); ··· 193 187 194 188 err_reg_netdev: 195 189 enetc_free_msix(priv); 190 + err_config_si: 196 191 err_alloc_msix: 197 192 enetc_free_si_resources(priv); 198 193 err_alloc_si_res:

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