tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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scsi: lpfc: Add FDMI Vendor MIB support

Created new attribute lpfc_enable_mi, which by default is enabled.

Add command definition bits for SLI-4 parameters that recognize whether the
adapter has MIB information support and what revision of MIB data. Using
the adapter information, register vendor-specific MIB support with FDMI.
The registration will be done every link up.

During FDMI registration, encountered a couple of errors when reverting to
FDMI rev1. Code needed to exist once reverting. Fixed these.

Link: https://lore.kernel.org/r/20201020202719.54726-8-james.smart@broadcom.com
Co-developed-by: Dick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: James Smart <james.smart@broadcom.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

authored by

James Smart and committed by
Martin K. Petersen 8aaa7bcf 7c30bb62

+117 -6
+3 -1
drivers/scsi/lpfc/lpfc.h
··· 744 744 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */ 745 745 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */ 746 746 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */ 747 - #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 747 + #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */ 748 + #define LS_CT_VEN_RPA 0x20 /* Vendor RPA sent to switch */ 748 749 749 750 uint32_t hba_flag; /* hba generic flags */ 750 751 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */ ··· 923 922 #define LPFC_ENABLE_NVME 2 924 923 #define LPFC_ENABLE_BOTH 3 925 924 uint32_t cfg_enable_pbde; 925 + uint32_t cfg_enable_mi; 926 926 struct nvmet_fc_target_port *targetport; 927 927 lpfc_vpd_t vpd; /* vital product data */ 928 928
+10
drivers/scsi/lpfc/lpfc_attr.c
··· 6134 6134 */ 6135 6135 LPFC_ATTR_RW(enable_dpp, 1, 0, 1, "Enable Direct Packet Push"); 6136 6136 6137 + /* 6138 + * lpfc_enable_mi: Enable FDMI MIB 6139 + * 0 = disabled 6140 + * 1 = enabled (default) 6141 + * Value range is [0,1]. 6142 + */ 6143 + LPFC_ATTR_R(enable_mi, 1, 0, 1, "Enable MI"); 6144 + 6137 6145 struct device_attribute *lpfc_hba_attrs[] = { 6138 6146 &dev_attr_nvme_info, 6139 6147 &dev_attr_scsi_stat, ··· 6259 6251 &dev_attr_lpfc_ras_fwlog_func, 6260 6252 &dev_attr_lpfc_enable_bbcr, 6261 6253 &dev_attr_lpfc_enable_dpp, 6254 + &dev_attr_lpfc_enable_mi, 6262 6255 NULL, 6263 6256 }; 6264 6257 ··· 7364 7355 lpfc_irq_chann_init(phba, lpfc_irq_chann); 7365 7356 lpfc_enable_bbcr_init(phba, lpfc_enable_bbcr); 7366 7357 lpfc_enable_dpp_init(phba, lpfc_enable_dpp); 7358 + lpfc_enable_mi_init(phba, lpfc_enable_mi); 7367 7359 7368 7360 if (phba->sli_rev != LPFC_SLI_REV4) { 7369 7361 /* NVME only supported on SLI4 */
+60
drivers/scsi/lpfc/lpfc_ct.c
··· 1959 1959 vport->fdmi_port_mask = LPFC_FDMI1_PORT_ATTR; 1960 1960 /* Start over */ 1961 1961 lpfc_fdmi_cmd(vport, ndlp, cmd, 0); 1962 + return; 1962 1963 } 1963 1964 if (vport->fdmi_port_mask == LPFC_FDMI2_SMART_ATTR) { 1964 1965 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; ··· 1969 1968 return; 1970 1969 1971 1970 case SLI_MGMT_RPA: 1971 + /* No retry on Vendor RPA */ 1972 + if (phba->link_flag & LS_CT_VEN_RPA) { 1973 + lpfc_printf_vlog(vport, KERN_ERR, 1974 + LOG_DISCOVERY | LOG_ELS, 1975 + "6460 VEN FDMI RPA failure\n"); 1976 + phba->link_flag &= ~LS_CT_VEN_RPA; 1977 + return; 1978 + } 1972 1979 if (vport->fdmi_port_mask == LPFC_FDMI2_PORT_ATTR) { 1973 1980 /* Fallback to FDMI-1 */ 1974 1981 vport->fdmi_hba_mask = LPFC_FDMI1_HBA_ATTR; 1975 1982 vport->fdmi_port_mask = LPFC_FDMI1_PORT_ATTR; 1976 1983 /* Start over */ 1977 1984 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_DHBA, 0); 1985 + return; 1978 1986 } 1979 1987 if (vport->fdmi_port_mask == LPFC_FDMI2_SMART_ATTR) { 1980 1988 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; ··· 2013 2003 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_RHBA, 0); 2014 2004 else 2015 2005 lpfc_fdmi_cmd(vport, ndlp, SLI_MGMT_RPRT, 0); 2006 + break; 2007 + case SLI_MGMT_RPA: 2008 + if (vport->port_type == LPFC_PHYSICAL_PORT && 2009 + phba->cfg_enable_mi && 2010 + phba->sli4_hba.pc_sli4_params.mi_ver > LPFC_MIB1_SUPPORT) { 2011 + /* mi is only for the phyical port, no vports */ 2012 + if (phba->link_flag & LS_CT_VEN_RPA) { 2013 + lpfc_printf_vlog(vport, KERN_INFO, 2014 + LOG_DISCOVERY | LOG_ELS, 2015 + "6449 VEN RPA Success\n"); 2016 + break; 2017 + } 2018 + 2019 + if (lpfc_fdmi_cmd(vport, ndlp, cmd, 2020 + LPFC_FDMI_VENDOR_ATTR_mi) == 0) 2021 + phba->link_flag |= LS_CT_VEN_RPA; 2022 + lpfc_printf_vlog(vport, KERN_INFO, 2023 + LOG_DISCOVERY | LOG_ELS, 2024 + "6458 Send MI FDMI:%x Flag x%x\n", 2025 + phba->sli4_hba.pc_sli4_params.mi_value, 2026 + phba->link_flag); 2027 + } else { 2028 + lpfc_printf_vlog(vport, KERN_INFO, 2029 + LOG_DISCOVERY | LOG_ELS, 2030 + "6459 No FDMI VEN MI support - " 2031 + "RPA Success\n"); 2032 + } 2016 2033 break; 2017 2034 } 2018 2035 return; ··· 3011 2974 return size; 3012 2975 } 3013 2976 2977 + int 2978 + lpfc_fdmi_vendor_attr_mi(struct lpfc_vport *vport, 2979 + struct lpfc_fdmi_attr_def *ad) 2980 + { 2981 + struct lpfc_hba *phba = vport->phba; 2982 + struct lpfc_fdmi_attr_entry *ae; 2983 + uint32_t len, size; 2984 + char mibrevision[16]; 2985 + 2986 + ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; 2987 + memset(ae, 0, 256); 2988 + sprintf(mibrevision, "ELXE2EM:%04d", 2989 + phba->sli4_hba.pc_sli4_params.mi_value); 2990 + strncpy(ae->un.AttrString, &mibrevision[0], sizeof(ae->un.AttrString)); 2991 + len = strnlen(ae->un.AttrString, sizeof(ae->un.AttrString)); 2992 + len += (len & 3) ? (4 - (len & 3)) : 4; 2993 + size = FOURBYTES + len; 2994 + ad->AttrLen = cpu_to_be16(size); 2995 + ad->AttrType = cpu_to_be16(RPRT_VENDOR_MI); 2996 + return size; 2997 + } 2998 + 3014 2999 /* RHBA attribute jump table */ 3015 3000 int (*lpfc_fdmi_hba_action[]) 3016 3001 (struct lpfc_vport *vport, struct lpfc_fdmi_attr_def *ad) = { ··· 3084 3025 lpfc_fdmi_smart_attr_port_info, /* bit20 RPRT_SMART_PORT_INFO */ 3085 3026 lpfc_fdmi_smart_attr_qos, /* bit21 RPRT_SMART_QOS */ 3086 3027 lpfc_fdmi_smart_attr_security, /* bit22 RPRT_SMART_SECURITY */ 3028 + lpfc_fdmi_vendor_attr_mi, /* bit23 RPRT_VENDOR_MI */ 3087 3029 }; 3088 3030 3089 3031 /**
+6
drivers/scsi/lpfc/lpfc_els.c
··· 3335 3335 lpfc_els_free_iocb(phba, elsiocb); 3336 3336 return 1; 3337 3337 } 3338 + 3339 + /* Only keep the ndlp if RDF is being sent */ 3340 + if (!phba->cfg_enable_mi || 3341 + phba->sli4_hba.pc_sli4_params.mi_ver < LPFC_MIB3_SUPPORT) 3342 + return 0; 3343 + 3338 3344 /* This will cause the callback-function lpfc_cmpl_els_cmd to 3339 3345 * trigger the release of node. 3340 3346 */
+4 -2
drivers/scsi/lpfc/lpfc_hbadisc.c
··· 3205 3205 } 3206 3206 3207 3207 phba->fc_topology = bf_get(lpfc_mbx_read_top_topology, la); 3208 - phba->link_flag &= ~LS_NPIV_FAB_SUPPORTED; 3208 + phba->link_flag &= ~(LS_NPIV_FAB_SUPPORTED | LS_CT_VEN_RPA); 3209 3209 3210 3210 shost = lpfc_shost_from_vport(vport); 3211 3211 if (phba->fc_topology == LPFC_TOPOLOGY_LOOP) { ··· 4133 4133 /* Issue SCR just before NameServer GID_FT Query */ 4134 4134 lpfc_issue_els_scr(vport, 0); 4135 4135 4136 - lpfc_issue_els_rdf(vport, 0); 4136 + if (!phba->cfg_enable_mi || 4137 + phba->sli4_hba.pc_sli4_params.mi_ver < LPFC_MIB3_SUPPORT) 4138 + lpfc_issue_els_rdf(vport, 0); 4137 4139 } 4138 4140 4139 4141 vport->fc_ns_retry = 0;
+3 -1
drivers/scsi/lpfc/lpfc_hw.h
··· 1465 1465 #define LPFC_FDMI2_HBA_ATTR 0x0002efff 1466 1466 1467 1467 /* 1468 - * Port Attrubute Types 1468 + * Port Attribute Types 1469 1469 */ 1470 1470 #define RPRT_SUPPORTED_FC4_TYPES 0x1 /* 32 byte binary array */ 1471 1471 #define RPRT_SUPPORTED_SPEED 0x2 /* 32-bit unsigned int */ ··· 1483 1483 #define RPRT_PORT_STATE 0x101 /* 32-bit unsigned int */ 1484 1484 #define RPRT_DISC_PORT 0x102 /* 32-bit unsigned int */ 1485 1485 #define RPRT_PORT_ID 0x103 /* 32-bit unsigned int */ 1486 + #define RPRT_VENDOR_MI 0xf047 /* vendor ascii string */ 1486 1487 #define RPRT_SMART_SERVICE 0xf100 /* 4 to 256 byte ASCII string */ 1487 1488 #define RPRT_SMART_GUID 0xf101 /* 8 byte WWNN + 8 byte WWPN */ 1488 1489 #define RPRT_SMART_VERSION 0xf102 /* 4 to 256 byte ASCII string */ ··· 1516 1515 #define LPFC_FDMI_SMART_ATTR_port_info 0x00100000 /* Vendor specific */ 1517 1516 #define LPFC_FDMI_SMART_ATTR_qos 0x00200000 /* Vendor specific */ 1518 1517 #define LPFC_FDMI_SMART_ATTR_security 0x00400000 /* Vendor specific */ 1518 + #define LPFC_FDMI_VENDOR_ATTR_mi 0x00800000 /* Vendor specific */ 1519 1519 1520 1520 /* Bit mask for FDMI-1 defined PORT attributes */ 1521 1521 #define LPFC_FDMI1_PORT_ATTR 0x0000003f
+8 -2
drivers/scsi/lpfc/lpfc_hw4.h
··· 3506 3506 #define cfg_max_tow_xri_MASK 0x0000ffff 3507 3507 #define cfg_max_tow_xri_WORD word20 3508 3508 3509 - uint32_t word21; /* RESERVED */ 3510 - uint32_t word22; /* RESERVED */ 3509 + uint32_t word21; 3510 + #define cfg_mib_bde_cnt_SHIFT 16 3511 + #define cfg_mib_bde_cnt_MASK 0x000000ff 3512 + #define cfg_mib_bde_cnt_WORD word21 3513 + #define cfg_mi_ver_SHIFT 0 3514 + #define cfg_mi_ver_MASK 0x0000ffff 3515 + #define cfg_mi_ver_WORD word21 3516 + uint32_t mib_size; 3511 3517 uint32_t word23; /* RESERVED */ 3512 3518 3513 3519 uint32_t word24;
+15
drivers/scsi/lpfc/lpfc_init.c
··· 12314 12314 else 12315 12315 phba->nsler = 0; 12316 12316 12317 + /* Save PB info for use during HBA setup */ 12318 + sli4_params->mi_ver = bf_get(cfg_mi_ver, mbx_sli4_parameters); 12319 + sli4_params->mib_bde_cnt = bf_get(cfg_mib_bde_cnt, mbx_sli4_parameters); 12320 + sli4_params->mib_size = mbx_sli4_parameters->mib_size; 12321 + sli4_params->mi_value = LPFC_DFLT_MIB_VAL; 12322 + 12323 + /* Next we check for Vendor MIB support */ 12324 + if (sli4_params->mi_ver && phba->cfg_enable_mi) 12325 + phba->cfg_fdmi_on = LPFC_FDMI_SUPPORT; 12326 + 12327 + lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12328 + "6461 MIB attr %d enable %d FDMI %d buf %d:%d\n", 12329 + sli4_params->mi_ver, phba->cfg_enable_mi, 12330 + sli4_params->mi_value, sli4_params->mib_bde_cnt, 12331 + sli4_params->mib_size); 12317 12332 return 0; 12318 12333 } 12319 12334
+8
drivers/scsi/lpfc/lpfc_sli4.h
··· 549 549 uint32_t hdr_pp_align; 550 550 uint32_t sgl_pages_max; 551 551 uint32_t sgl_pp_align; 552 + uint32_t mib_size; 553 + uint16_t mi_ver; 554 + #define LPFC_MIB1_SUPPORT 1 555 + #define LPFC_MIB2_SUPPORT 2 556 + #define LPFC_MIB3_SUPPORT 3 557 + uint16_t mi_value; 558 + #define LPFC_DFLT_MIB_VAL 2 559 + uint8_t mib_bde_cnt; 552 560 uint8_t cqv; 553 561 uint8_t mqv; 554 562 uint8_t wqv;