ASoC: fsl_xcvr: use dev_err_probe() replacing dev_err() + return

+34 -52

1 changed file

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sound

soc

fsl

fsl_xcvr.c

+34 -52

sound/soc/fsl/fsl_xcvr.c

··· 1548 1548 xcvr->soc_data = of_device_get_match_data(&pdev->dev); 1549 1549 1550 1550 xcvr->ipg_clk = devm_clk_get(dev, "ipg"); 1551 - if (IS_ERR(xcvr->ipg_clk)) { 1552 - dev_err(dev, "failed to get ipg clock\n"); 1553 - return PTR_ERR(xcvr->ipg_clk); 1554 - } 1551 + if (IS_ERR(xcvr->ipg_clk)) 1552 + return dev_err_probe(dev, PTR_ERR(xcvr->ipg_clk), 1553 + "failed to get ipg clock\n"); 1555 1554 1556 1555 xcvr->phy_clk = devm_clk_get(dev, "phy"); 1557 - if (IS_ERR(xcvr->phy_clk)) { 1558 - dev_err(dev, "failed to get phy clock\n"); 1559 - return PTR_ERR(xcvr->phy_clk); 1560 - } 1556 + if (IS_ERR(xcvr->phy_clk)) 1557 + return dev_err_probe(dev, PTR_ERR(xcvr->phy_clk), 1558 + "failed to get phy clock\n"); 1561 1559 1562 1560 xcvr->spba_clk = devm_clk_get(dev, "spba"); 1563 - if (IS_ERR(xcvr->spba_clk)) { 1564 - dev_err(dev, "failed to get spba clock\n"); 1565 - return PTR_ERR(xcvr->spba_clk); 1566 - } 1561 + if (IS_ERR(xcvr->spba_clk)) 1562 + return dev_err_probe(dev, PTR_ERR(xcvr->spba_clk), 1563 + "failed to get spba clock\n"); 1567 1564 1568 1565 xcvr->pll_ipg_clk = devm_clk_get(dev, "pll_ipg"); 1569 - if (IS_ERR(xcvr->pll_ipg_clk)) { 1570 - dev_err(dev, "failed to get pll_ipg clock\n"); 1571 - return PTR_ERR(xcvr->pll_ipg_clk); 1572 - } 1566 + if (IS_ERR(xcvr->pll_ipg_clk)) 1567 + return dev_err_probe(dev, PTR_ERR(xcvr->pll_ipg_clk), 1568 + "failed to get pll_ipg clock\n"); 1573 1569 1574 1570 fsl_asoc_get_pll_clocks(dev, &xcvr->pll8k_clk, 1575 1571 &xcvr->pll11k_clk); ··· 1589 1593 1590 1594 xcvr->regmap = devm_regmap_init_mmio_clk(dev, NULL, regs, 1591 1595 &fsl_xcvr_regmap_cfg); 1592 - if (IS_ERR(xcvr->regmap)) { 1593 - dev_err(dev, "failed to init XCVR regmap: %ld\n", 1594 - PTR_ERR(xcvr->regmap)); 1595 - return PTR_ERR(xcvr->regmap); 1596 - } 1596 + if (IS_ERR(xcvr->regmap)) 1597 + return dev_err_probe(dev, PTR_ERR(xcvr->regmap), "failed to init XCVR regmap\n"); 1597 1598 1598 1599 if (xcvr->soc_data->use_phy) { 1599 1600 xcvr->regmap_phy = devm_regmap_init(dev, NULL, xcvr, 1600 1601 &fsl_xcvr_regmap_phy_cfg); 1601 - if (IS_ERR(xcvr->regmap_phy)) { 1602 - dev_err(dev, "failed to init XCVR PHY regmap: %ld\n", 1603 - PTR_ERR(xcvr->regmap_phy)); 1604 - return PTR_ERR(xcvr->regmap_phy); 1605 - } 1602 + if (IS_ERR(xcvr->regmap_phy)) 1603 + return dev_err_probe(dev, PTR_ERR(xcvr->regmap_phy), 1604 + "failed to init XCVR PHY regmap\n"); 1606 1605 1607 1606 switch (xcvr->soc_data->pll_ver) { 1608 1607 case PLL_MX8MP: 1609 1608 xcvr->regmap_pll = devm_regmap_init(dev, NULL, xcvr, 1610 1609 &fsl_xcvr_regmap_pllv0_cfg); 1611 - if (IS_ERR(xcvr->regmap_pll)) { 1612 - dev_err(dev, "failed to init XCVR PLL regmap: %ld\n", 1613 - PTR_ERR(xcvr->regmap_pll)); 1614 - return PTR_ERR(xcvr->regmap_pll); 1615 - } 1610 + if (IS_ERR(xcvr->regmap_pll)) 1611 + return dev_err_probe(dev, PTR_ERR(xcvr->regmap_pll), 1612 + "failed to init XCVR PLL regmap\n"); 1616 1613 break; 1617 1614 case PLL_MX95: 1618 1615 xcvr->regmap_pll = devm_regmap_init(dev, NULL, xcvr, 1619 1616 &fsl_xcvr_regmap_pllv1_cfg); 1620 - if (IS_ERR(xcvr->regmap_pll)) { 1621 - dev_err(dev, "failed to init XCVR PLL regmap: %ld\n", 1622 - PTR_ERR(xcvr->regmap_pll)); 1623 - return PTR_ERR(xcvr->regmap_pll); 1624 - } 1617 + if (IS_ERR(xcvr->regmap_pll)) 1618 + return dev_err_probe(dev, PTR_ERR(xcvr->regmap_pll), 1619 + "failed to init XCVR PLL regmap\n"); 1625 1620 break; 1626 1621 default: 1627 - dev_err(dev, "Error for PLL version %d\n", xcvr->soc_data->pll_ver); 1628 - return -EINVAL; 1622 + return dev_err_probe(dev, -EINVAL, 1623 + "Error for PLL version %d\n", 1624 + xcvr->soc_data->pll_ver); 1629 1625 } 1630 1626 } 1631 1627 1632 1628 xcvr->reset = devm_reset_control_get_optional_exclusive(dev, NULL); 1633 - if (IS_ERR(xcvr->reset)) { 1634 - dev_err(dev, "failed to get XCVR reset control\n"); 1635 - return PTR_ERR(xcvr->reset); 1636 - } 1629 + if (IS_ERR(xcvr->reset)) 1630 + return dev_err_probe(dev, PTR_ERR(xcvr->reset), 1631 + "failed to get XCVR reset control\n"); 1637 1632 1638 1633 /* get IRQs */ 1639 1634 irq = platform_get_irq(pdev, 0); ··· 1632 1645 return irq; 1633 1646 1634 1647 ret = devm_request_irq(dev, irq, irq0_isr, 0, pdev->name, xcvr); 1635 - if (ret) { 1636 - dev_err(dev, "failed to claim IRQ0: %i\n", ret); 1637 - return ret; 1638 - } 1648 + if (ret) 1649 + return dev_err_probe(dev, ret, "failed to claim IRQ0\n"); 1639 1650 1640 1651 rx_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rxfifo"); 1641 1652 tx_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "txfifo"); 1642 - if (!rx_res || !tx_res) { 1643 - dev_err(dev, "could not find rxfifo or txfifo resource\n"); 1644 - return -EINVAL; 1645 - } 1653 + if (!rx_res || !tx_res) 1654 + return dev_err_probe(dev, -EINVAL, "could not find rxfifo or txfifo resource\n"); 1646 1655 xcvr->dma_prms_rx.chan_name = "rx"; 1647 1656 xcvr->dma_prms_tx.chan_name = "tx"; 1648 1657 xcvr->dma_prms_rx.addr = rx_res->start; ··· 1661 1678 ret = devm_snd_dmaengine_pcm_register(dev, NULL, 0); 1662 1679 if (ret) { 1663 1680 pm_runtime_disable(dev); 1664 - dev_err(dev, "failed to pcm register\n"); 1665 - return ret; 1681 + return dev_err_probe(dev, ret, "failed to pcm register\n"); 1666 1682 } 1667 1683 1668 1684 ret = devm_snd_soc_register_component(dev, &fsl_xcvr_comp,

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