Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Rejecting non-native endian BTF overlapped with the addition
of support for it.
The rest were more simple overlapping changes, except the
renesas ravb binding update, which had to follow a file
move as well as a YAML conversion.
Signed-off-by: David S. Miller <davem@davemloft.net>
+3475
-1833
+18
-7
Documentation/admin-guide/cgroup-v2.rst
+18
-7
Documentation/admin-guide/cgroup-v2.rst
···
1324
1324
pgmajfault
1325
1325
Number of major page faults incurred
1326
1326
1327
-
workingset_refault
1328
-
Number of refaults of previously evicted pages
1327
+
workingset_refault_anon
1328
+
Number of refaults of previously evicted anonymous pages.
1329
1329
1330
-
workingset_activate
1331
-
Number of refaulted pages that were immediately activated
1330
+
workingset_refault_file
1331
+
Number of refaults of previously evicted file pages.
1332
1332
1333
-
workingset_restore
1334
-
Number of restored pages which have been detected as an active
1335
-
workingset before they got reclaimed.
1333
+
workingset_activate_anon
1334
+
Number of refaulted anonymous pages that were immediately
1335
+
activated.
1336
+
1337
+
workingset_activate_file
1338
+
Number of refaulted file pages that were immediately activated.
1339
+
1340
+
workingset_restore_anon
1341
+
Number of restored anonymous pages which have been detected as
1342
+
an active workingset before they got reclaimed.
1343
+
1344
+
workingset_restore_file
1345
+
Number of restored file pages which have been detected as an
1346
+
active workingset before they got reclaimed.
1336
1347
1337
1348
workingset_nodereclaim
1338
1349
Number of times a shadow node has been reclaimed
+9
-1
Documentation/admin-guide/device-mapper/dm-crypt.rst
+9
-1
Documentation/admin-guide/device-mapper/dm-crypt.rst
···
67
67
the value passed in <key_size>.
68
68
69
69
<key_type>
70
-
Either 'logon' or 'user' kernel key type.
70
+
Either 'logon', 'user' or 'encrypted' kernel key type.
71
71
72
72
<key_description>
73
73
The kernel keyring key description crypt target should look for
···
120
120
significantly. The default is to offload write bios to the same
121
121
thread because it benefits CFQ to have writes submitted using the
122
122
same context.
123
+
124
+
no_read_workqueue
125
+
Bypass dm-crypt internal workqueue and process read requests synchronously.
126
+
127
+
no_write_workqueue
128
+
Bypass dm-crypt internal workqueue and process write requests synchronously.
129
+
This option is automatically enabled for host-managed zoned block devices
130
+
(e.g. host-managed SMR hard-disks).
123
131
124
132
integrity:<bytes>:<type>
125
133
The device requires additional <bytes> metadata per-sector stored
+1
-1
Documentation/admin-guide/pm/cpuidle.rst
+1
-1
Documentation/admin-guide/pm/cpuidle.rst
···
690
690
instruction of the CPUs (which, as a rule, suspends the execution of the program
691
691
and causes the hardware to attempt to enter the shallowest available idle state)
692
692
for this purpose, and if ``idle=poll`` is used, idle CPUs will execute a
693
-
more or less ``lightweight'' sequence of instructions in a tight loop. [Note
693
+
more or less "lightweight" sequence of instructions in a tight loop. [Note
694
694
that using ``idle=poll`` is somewhat drastic in many cases, as preventing idle
695
695
CPUs from saving almost any energy at all may not be the only effect of it.
696
696
For example, on Intel hardware it effectively prevents CPUs from using
+2
-2
Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
+2
-2
Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml
···
23
23
compatible:
24
24
items:
25
25
- const: raspberrypi,bcm2835-firmware
26
-
- const: simple-bus
26
+
- const: simple-mfd
27
27
28
28
mboxes:
29
29
$ref: '/schemas/types.yaml#/definitions/phandle'
···
57
57
examples:
58
58
- |
59
59
firmware {
60
-
compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
60
+
compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
61
61
mboxes = <&mailbox>;
62
62
63
63
firmware_clocks: clocks {
+1
-1
Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
+1
-1
Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
+4
-4
Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml
+4
-4
Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml
···
145
145
146
146
display@fd4a0000 {
147
147
compatible = "xlnx,zynqmp-dpsub-1.7";
148
-
reg = <0x0 0xfd4a0000 0x0 0x1000>,
149
-
<0x0 0xfd4aa000 0x0 0x1000>,
150
-
<0x0 0xfd4ab000 0x0 0x1000>,
151
-
<0x0 0xfd4ac000 0x0 0x1000>;
148
+
reg = <0xfd4a0000 0x1000>,
149
+
<0xfd4aa000 0x1000>,
150
+
<0xfd4ab000 0x1000>,
151
+
<0xfd4ac000 0x1000>;
152
152
reg-names = "dp", "blend", "av_buf", "aud";
153
153
interrupts = <0 119 4>;
154
154
interrupt-parent = <&gic>;
+1
-1
Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml
+1
-1
Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml
+3
-2
Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
+3
-2
Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
···
20
20
- gpio-controller : Marks the device node as a GPIO controller
21
21
- interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt
22
22
- interrupt-controller : Mark the GPIO controller as an interrupt-controller
23
-
- ngpios : number of GPIO lines, see gpio.txt
24
-
(should be multiple of 8, up to 80 pins)
23
+
- ngpios : number of *hardware* GPIO lines, see gpio.txt. This will expose
24
+
2 software GPIOs per hardware GPIO: one for hardware input, one for hardware
25
+
output. Up to 80 pins, must be a multiple of 8.
25
26
- clocks : A phandle to the APB clock for SGPM clock division
26
27
- bus-frequency : SGPM CLK frequency
27
28
+1
-1
Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml
+1
-1
Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml
-38
Documentation/devicetree/bindings/media/i2c/imx274.txt
-38
Documentation/devicetree/bindings/media/i2c/imx274.txt
···
1
-
* Sony 1/2.5-Inch 8.51Mp CMOS Digital Image Sensor
2
-
3
-
The Sony imx274 is a 1/2.5-inch CMOS active pixel digital image sensor with
4
-
an active array size of 3864H x 2202V. It is programmable through I2C
5
-
interface. The I2C address is fixed to 0x1a as per sensor data sheet.
6
-
Image data is sent through MIPI CSI-2, which is configured as 4 lanes
7
-
at 1440 Mbps.
8
-
9
-
10
-
Required Properties:
11
-
- compatible: value should be "sony,imx274" for imx274 sensor
12
-
- reg: I2C bus address of the device
13
-
14
-
Optional Properties:
15
-
- reset-gpios: Sensor reset GPIO
16
-
- clocks: Reference to the input clock.
17
-
- clock-names: Should be "inck".
18
-
- VANA-supply: Sensor 2.8v analog supply.
19
-
- VDIG-supply: Sensor 1.8v digital core supply.
20
-
- VDDL-supply: Sensor digital IO 1.2v supply.
21
-
22
-
The imx274 device node should contain one 'port' child node with
23
-
an 'endpoint' subnode. For further reading on port node refer to
24
-
Documentation/devicetree/bindings/media/video-interfaces.txt.
25
-
26
-
Example:
27
-
sensor@1a {
28
-
compatible = "sony,imx274";
29
-
reg = <0x1a>;
30
-
#address-cells = <1>;
31
-
#size-cells = <0>;
32
-
reset-gpios = <&gpio_sensor 0 0>;
33
-
port {
34
-
sensor_out: endpoint {
35
-
remote-endpoint = <&csiss_in>;
36
-
};
37
-
};
38
-
};
+76
Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml
+76
Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/media/i2c/sony,imx274.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Sony 1/2.5-Inch 8.51MP CMOS Digital Image Sensor
8
+
9
+
maintainers:
10
+
- Leon Luo <leonl@leopardimaging.com>
11
+
12
+
description: |
13
+
The Sony IMX274 is a 1/2.5-inch CMOS active pixel digital image sensor with an
14
+
active array size of 3864H x 2202V. It is programmable through I2C interface.
15
+
Image data is sent through MIPI CSI-2, which is configured as 4 lanes at 1440
16
+
Mbps.
17
+
18
+
properties:
19
+
compatible:
20
+
const: sony,imx274
21
+
22
+
reg:
23
+
const: 0x1a
24
+
25
+
reset-gpios:
26
+
maxItems: 1
27
+
28
+
clocks:
29
+
maxItems: 1
30
+
31
+
clock-names:
32
+
const: inck
33
+
34
+
vana-supply:
35
+
description: Sensor 2.8 V analog supply.
36
+
maxItems: 1
37
+
38
+
vdig-supply:
39
+
description: Sensor 1.8 V digital core supply.
40
+
maxItems: 1
41
+
42
+
vddl-supply:
43
+
description: Sensor digital IO 1.2 V supply.
44
+
maxItems: 1
45
+
46
+
port:
47
+
type: object
48
+
description: Output video port. See ../video-interfaces.txt.
49
+
50
+
required:
51
+
- compatible
52
+
- reg
53
+
- port
54
+
55
+
additionalProperties: false
56
+
57
+
examples:
58
+
- |
59
+
i2c0 {
60
+
#address-cells = <1>;
61
+
#size-cells = <0>;
62
+
63
+
imx274: camera-sensor@1a {
64
+
compatible = "sony,imx274";
65
+
reg = <0x1a>;
66
+
reset-gpios = <&gpio_sensor 0 0>;
67
+
68
+
port {
69
+
sensor_out: endpoint {
70
+
remote-endpoint = <&csiss_in>;
71
+
};
72
+
};
73
+
};
74
+
};
75
+
76
+
...
+1
Documentation/devicetree/bindings/net/renesas,etheravb.yaml
+1
Documentation/devicetree/bindings/net/renesas,etheravb.yaml
···
31
31
- renesas,etheravb-r8a774a1 # RZ/G2M
32
32
- renesas,etheravb-r8a774b1 # RZ/G2N
33
33
- renesas,etheravb-r8a774c0 # RZ/G2E
34
+
- renesas,etheravb-r8a774e1 # RZ/G2H
34
35
- renesas,etheravb-r8a7795 # R-Car H3
35
36
- renesas,etheravb-r8a7796 # R-Car M3-W
36
37
- renesas,etheravb-r8a77961 # R-Car M3-W+
+2
-2
Documentation/kbuild/llvm.rst
+2
-2
Documentation/kbuild/llvm.rst
···
39
39
ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang
40
40
41
41
``CROSS_COMPILE`` is not used to prefix the Clang compiler binary, instead
42
-
``CROSS_COMPILE`` is used to set a command line flag: ``--target <triple>``. For
42
+
``CROSS_COMPILE`` is used to set a command line flag: ``--target=<triple>``. For
43
43
example: ::
44
44
45
-
clang --target aarch64-linux-gnu foo.c
45
+
clang --target=aarch64-linux-gnu foo.c
46
46
47
47
LLVM Utilities
48
48
--------------
-17
Documentation/userspace-api/media/v4l/buffer.rst
-17
Documentation/userspace-api/media/v4l/buffer.rst
···
701
701
:stub-columns: 0
702
702
:widths: 3 1 4
703
703
704
-
* .. _`V4L2-FLAG-MEMORY-NON-CONSISTENT`:
705
-
706
-
- ``V4L2_FLAG_MEMORY_NON_CONSISTENT``
707
-
- 0x00000001
708
-
- A buffer is allocated either in consistent (it will be automatically
709
-
coherent between the CPU and the bus) or non-consistent memory. The
710
-
latter can provide performance gains, for instance the CPU cache
711
-
sync/flush operations can be avoided if the buffer is accessed by the
712
-
corresponding device only and the CPU does not read/write to/from that
713
-
buffer. However, this requires extra care from the driver -- it must
714
-
guarantee memory consistency by issuing a cache flush/sync when
715
-
consistency is needed. If this flag is set V4L2 will attempt to
716
-
allocate the buffer in non-consistent memory. The flag takes effect
717
-
only if the buffer is used for :ref:`memory mapping <mmap>` I/O and the
718
-
queue reports the :ref:`V4L2_BUF_CAP_SUPPORTS_MMAP_CACHE_HINTS
719
-
<V4L2-BUF-CAP-SUPPORTS-MMAP-CACHE-HINTS>` capability.
720
-
721
704
.. c:type:: v4l2_memory
722
705
723
706
enum v4l2_memory
+1
-5
Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst
+1
-5
Documentation/userspace-api/media/v4l/vidioc-create-bufs.rst
···
120
120
If you want to just query the capabilities without making any
121
121
other changes, then set ``count`` to 0, ``memory`` to
122
122
``V4L2_MEMORY_MMAP`` and ``format.type`` to the buffer type.
123
-
* - __u32
124
-
- ``flags``
125
-
- Specifies additional buffer management attributes.
126
-
See :ref:`memory-flags`.
127
123
128
124
* - __u32
129
-
- ``reserved``\ [6]
125
+
- ``reserved``\ [7]
130
126
- A place holder for future extensions. Drivers and applications
131
127
must set the array to zero.
132
128
+2
-10
Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst
+2
-10
Documentation/userspace-api/media/v4l/vidioc-reqbufs.rst
···
112
112
``V4L2_MEMORY_MMAP`` and ``type`` set to the buffer type. This will
113
113
free any previously allocated buffers, so this is typically something
114
114
that will be done at the start of the application.
115
-
* - union {
116
-
- (anonymous)
117
-
* - __u32
118
-
- ``flags``
119
-
- Specifies additional buffer management attributes.
120
-
See :ref:`memory-flags`.
121
115
* - __u32
122
116
- ``reserved``\ [1]
123
-
- Kept for backwards compatibility. Use ``flags`` instead.
124
-
* - }
125
-
-
117
+
- A place holder for future extensions. Drivers and applications
118
+
must set the array to zero.
126
119
127
120
.. tabularcolumns:: |p{6.1cm}|p{2.2cm}|p{8.7cm}|
128
121
···
162
169
- This capability is set by the driver to indicate that the queue supports
163
170
cache and memory management hints. However, it's only valid when the
164
171
queue is used for :ref:`memory mapping <mmap>` streaming I/O. See
165
-
:ref:`V4L2_FLAG_MEMORY_NON_CONSISTENT <V4L2-FLAG-MEMORY-NON-CONSISTENT>`,
166
172
:ref:`V4L2_BUF_FLAG_NO_CACHE_INVALIDATE <V4L2-BUF-FLAG-NO-CACHE-INVALIDATE>` and
167
173
:ref:`V4L2_BUF_FLAG_NO_CACHE_CLEAN <V4L2-BUF-FLAG-NO-CACHE-CLEAN>`.
168
174
+10
-6
MAINTAINERS
+10
-6
MAINTAINERS
···
8764
8764
F: include/uapi/drm/i915_drm.h
8765
8765
8766
8766
INTEL ETHERNET DRIVERS
8767
-
M: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
8767
+
M: Jesse Brandeburg <jesse.brandeburg@intel.com>
8768
+
M: Tony Nguyen <anthony.l.nguyen@intel.com>
8768
8769
L: intel-wired-lan@lists.osuosl.org (moderated for non-subscribers)
8769
8770
S: Supported
8770
8771
W: http://www.intel.com/support/feedback.htm
···
12105
12104
M: Andrew Lunn <andrew@lunn.ch>
12106
12105
M: Vivien Didelot <vivien.didelot@gmail.com>
12107
12106
M: Florian Fainelli <f.fainelli@gmail.com>
12107
+
M: Vladimir Oltean <olteanv@gmail.com>
12108
12108
S: Maintained
12109
12109
F: Documentation/devicetree/bindings/net/dsa/
12110
12110
F: drivers/net/dsa/
···
13213
13211
13214
13212
PCI DRIVER FOR AARDVARK (Marvell Armada 3700)
13215
13213
M: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
13214
+
M: Pali Rohár <pali@kernel.org>
13216
13215
L: linux-pci@vger.kernel.org
13217
13216
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
13218
13217
S: Maintained
···
16188
16185
L: linux-media@vger.kernel.org
16189
16186
S: Maintained
16190
16187
T: git git://linuxtv.org/media_tree.git
16191
-
F: Documentation/devicetree/bindings/media/i2c/imx274.txt
16188
+
F: Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml
16192
16189
F: drivers/media/i2c/imx274.c
16193
16190
16194
16191
SONY IMX290 SENSOR DRIVER
···
18315
18312
F: include/linux/vga_switcheroo.h
18316
18313
18317
18314
VIA RHINE NETWORK DRIVER
18318
-
S: Orphan
18315
+
S: Maintained
18316
+
M: Kevin Brace <kevinbrace@bracecomputerlab.com>
18319
18317
F: drivers/net/ethernet/via/via-rhine.c
18320
18318
18321
18319
VIA SD/MMC CARD CONTROLLER DRIVER
···
18921
18917
F: arch/x86/mm/
18922
18918
18923
18919
X86 PLATFORM DRIVERS
18924
-
M: Darren Hart <dvhart@infradead.org>
18925
-
M: Andy Shevchenko <andy@infradead.org>
18920
+
M: Hans de Goede <hdegoede@redhat.com>
18921
+
M: Mark Gross <mgross@linux.intel.com>
18926
18922
L: platform-driver-x86@vger.kernel.org
18927
-
S: Odd Fixes
18923
+
S: Maintained
18928
18924
T: git git://git.infradead.org/linux-platform-drivers-x86.git
18929
18925
F: drivers/platform/olpc/
18930
18926
F: drivers/platform/x86/
+1
-1
Makefile
+1
-1
Makefile
+1
-1
arch/arm/boot/dts/bcm2835-rpi.dtsi
+1
-1
arch/arm/boot/dts/bcm2835-rpi.dtsi
+3
-1
arch/arm/mach-imx/cpuidle-imx6q.c
+3
-1
arch/arm/mach-imx/cpuidle-imx6q.c
···
24
24
imx6_set_lpm(WAIT_UNCLOCKED);
25
25
raw_spin_unlock(&cpuidle_lock);
26
26
27
+
rcu_idle_enter();
27
28
cpu_do_idle();
29
+
rcu_idle_exit();
28
30
29
31
raw_spin_lock(&cpuidle_lock);
30
32
if (num_idle_cpus-- == num_online_cpus())
···
46
44
{
47
45
.exit_latency = 50,
48
46
.target_residency = 75,
49
-
.flags = CPUIDLE_FLAG_TIMER_STOP,
47
+
.flags = CPUIDLE_FLAG_TIMER_STOP | CPUIDLE_FLAG_RCU_IDLE,
50
48
.enter = imx6q_enter_wait,
51
49
.name = "WAIT",
52
50
.desc = "Clock off",
+20
-2
arch/arm64/kernel/acpi.c
+20
-2
arch/arm64/kernel/acpi.c
···
298
298
case EFI_BOOT_SERVICES_DATA:
299
299
case EFI_CONVENTIONAL_MEMORY:
300
300
case EFI_PERSISTENT_MEMORY:
301
-
pr_warn(FW_BUG "requested region covers kernel memory @ %pa\n", &phys);
302
-
return NULL;
301
+
if (memblock_is_map_memory(phys) ||
302
+
!memblock_is_region_memory(phys, size)) {
303
+
pr_warn(FW_BUG "requested region covers kernel memory @ %pa\n", &phys);
304
+
return NULL;
305
+
}
306
+
/*
307
+
* Mapping kernel memory is permitted if the region in
308
+
* question is covered by a single memblock with the
309
+
* NOMAP attribute set: this enables the use of ACPI
310
+
* table overrides passed via initramfs, which are
311
+
* reserved in memory using arch_reserve_mem_area()
312
+
* below. As this particular use case only requires
313
+
* read access, fall through to the R/O mapping case.
314
+
*/
315
+
fallthrough;
303
316
304
317
case EFI_RUNTIME_SERVICES_CODE:
305
318
/*
···
400
387
local_daif_restore(current_flags);
401
388
402
389
return err;
390
+
}
391
+
392
+
void arch_reserve_mem_area(acpi_physical_address addr, size_t size)
393
+
{
394
+
memblock_mark_nomap(addr, size);
403
395
}
+7
arch/arm64/kvm/hyp/nvhe/tlb.c
+7
arch/arm64/kvm/hyp/nvhe/tlb.c
···
31
31
isb();
32
32
}
33
33
34
+
/*
35
+
* __load_guest_stage2() includes an ISB only when the AT
36
+
* workaround is applied. Take care of the opposite condition,
37
+
* ensuring that we always have an ISB, but not two ISBs back
38
+
* to back.
39
+
*/
34
40
__load_guest_stage2(mmu);
41
+
asm(ALTERNATIVE("isb", "nop", ARM64_WORKAROUND_SPECULATIVE_AT));
35
42
}
36
43
37
44
static void __tlb_switch_to_host(struct tlb_inv_context *cxt)
+3
-3
arch/ia64/mm/init.c
+3
-3
arch/ia64/mm/init.c
···
538
538
if (map_start < map_end)
539
539
memmap_init_zone((unsigned long)(map_end - map_start),
540
540
args->nid, args->zone, page_to_pfn(map_start),
541
-
MEMMAP_EARLY, NULL);
541
+
MEMINIT_EARLY, NULL);
542
542
return 0;
543
543
}
544
544
···
547
547
unsigned long start_pfn)
548
548
{
549
549
if (!vmem_map) {
550
-
memmap_init_zone(size, nid, zone, start_pfn, MEMMAP_EARLY,
551
-
NULL);
550
+
memmap_init_zone(size, nid, zone, start_pfn,
551
+
MEMINIT_EARLY, NULL);
552
552
} else {
553
553
struct page *start;
554
554
struct memmap_init_callback_data args;
+1
-1
arch/mips/bcm47xx/setup.c
+1
-1
arch/mips/bcm47xx/setup.c
+1
arch/mips/include/asm/cpu-type.h
+1
arch/mips/include/asm/cpu-type.h
+4
arch/mips/loongson2ef/Platform
+4
arch/mips/loongson2ef/Platform
···
44
44
endif
45
45
endif
46
46
47
+
# Some -march= flags enable MMI instructions, and GCC complains about that
48
+
# support being enabled alongside -msoft-float. Thus explicitly disable MMI.
49
+
cflags-y += $(call cc-option,-mno-loongson-mmi)
50
+
47
51
#
48
52
# Loongson Machines' Support
49
53
#
+8
-16
arch/mips/loongson64/cop2-ex.c
+8
-16
arch/mips/loongson64/cop2-ex.c
···
95
95
if (res)
96
96
goto fault;
97
97
98
-
set_fpr64(current->thread.fpu.fpr,
99
-
insn.loongson3_lswc2_format.rt, value);
100
-
set_fpr64(current->thread.fpu.fpr,
101
-
insn.loongson3_lswc2_format.rq, value_next);
98
+
set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0, value);
99
+
set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0, value_next);
102
100
compute_return_epc(regs);
103
101
own_fpu(1);
104
102
}
···
128
130
goto sigbus;
129
131
130
132
lose_fpu(1);
131
-
value_next = get_fpr64(current->thread.fpu.fpr,
132
-
insn.loongson3_lswc2_format.rq);
133
+
value_next = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0);
133
134
134
135
StoreDW(addr + 8, value_next, res);
135
136
if (res)
136
137
goto fault;
137
138
138
-
value = get_fpr64(current->thread.fpu.fpr,
139
-
insn.loongson3_lswc2_format.rt);
139
+
value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0);
140
140
141
141
StoreDW(addr, value, res);
142
142
if (res)
···
200
204
if (res)
201
205
goto fault;
202
206
203
-
set_fpr64(current->thread.fpu.fpr,
204
-
insn.loongson3_lsdc2_format.rt, value);
207
+
set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
205
208
compute_return_epc(regs);
206
209
own_fpu(1);
207
210
···
216
221
if (res)
217
222
goto fault;
218
223
219
-
set_fpr64(current->thread.fpu.fpr,
220
-
insn.loongson3_lsdc2_format.rt, value);
224
+
set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
221
225
compute_return_epc(regs);
222
226
own_fpu(1);
223
227
break;
···
280
286
goto sigbus;
281
287
282
288
lose_fpu(1);
283
-
value = get_fpr64(current->thread.fpu.fpr,
284
-
insn.loongson3_lsdc2_format.rt);
289
+
value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
285
290
286
291
StoreW(addr, value, res);
287
292
if (res)
···
298
305
goto sigbus;
299
306
300
307
lose_fpu(1);
301
-
value = get_fpr64(current->thread.fpu.fpr,
302
-
insn.loongson3_lsdc2_format.rt);
308
+
value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
303
309
304
310
StoreDW(addr, value, res);
305
311
if (res)
-1
arch/powerpc/net/bpf_jit_comp.c
-1
arch/powerpc/net/bpf_jit_comp.c
-4
arch/riscv/include/asm/stackprotector.h
-4
arch/riscv/include/asm/stackprotector.h
···
5
5
6
6
#include <linux/random.h>
7
7
#include <linux/version.h>
8
-
#include <asm/timex.h>
9
8
10
9
extern unsigned long __stack_chk_guard;
11
10
···
17
18
static __always_inline void boot_init_stack_canary(void)
18
19
{
19
20
unsigned long canary;
20
-
unsigned long tsc;
21
21
22
22
/* Try to get a semi random initial value. */
23
23
get_random_bytes(&canary, sizeof(canary));
24
-
tsc = get_cycles();
25
-
canary += tsc + (tsc << BITS_PER_LONG/2);
26
24
canary ^= LINUX_VERSION_CODE;
27
25
canary &= CANARY_MASK;
28
26
+13
arch/riscv/include/asm/timex.h
+13
arch/riscv/include/asm/timex.h
···
33
33
#define get_cycles_hi get_cycles_hi
34
34
#endif /* CONFIG_64BIT */
35
35
36
+
/*
37
+
* Much like MIPS, we may not have a viable counter to use at an early point
38
+
* in the boot process. Unfortunately we don't have a fallback, so instead
39
+
* we just return 0.
40
+
*/
41
+
static inline unsigned long random_get_entropy(void)
42
+
{
43
+
if (unlikely(clint_time_val == NULL))
44
+
return 0;
45
+
return get_cycles();
46
+
}
47
+
#define random_get_entropy() random_get_entropy()
48
+
36
49
#else /* CONFIG_RISCV_M_MODE */
37
50
38
51
static inline cycles_t get_cycles(void)
+30
-12
arch/s390/include/asm/pgtable.h
+30
-12
arch/s390/include/asm/pgtable.h
···
1260
1260
1261
1261
#define pgd_offset(mm, address) pgd_offset_raw(READ_ONCE((mm)->pgd), address)
1262
1262
1263
-
static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
1263
+
static inline p4d_t *p4d_offset_lockless(pgd_t *pgdp, pgd_t pgd, unsigned long address)
1264
1264
{
1265
-
if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) >= _REGION_ENTRY_TYPE_R1)
1266
-
return (p4d_t *) pgd_deref(*pgd) + p4d_index(address);
1267
-
return (p4d_t *) pgd;
1265
+
if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) >= _REGION_ENTRY_TYPE_R1)
1266
+
return (p4d_t *) pgd_deref(pgd) + p4d_index(address);
1267
+
return (p4d_t *) pgdp;
1268
+
}
1269
+
#define p4d_offset_lockless p4d_offset_lockless
1270
+
1271
+
static inline p4d_t *p4d_offset(pgd_t *pgdp, unsigned long address)
1272
+
{
1273
+
return p4d_offset_lockless(pgdp, *pgdp, address);
1268
1274
}
1269
1275
1270
-
static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
1276
+
static inline pud_t *pud_offset_lockless(p4d_t *p4dp, p4d_t p4d, unsigned long address)
1271
1277
{
1272
-
if ((p4d_val(*p4d) & _REGION_ENTRY_TYPE_MASK) >= _REGION_ENTRY_TYPE_R2)
1273
-
return (pud_t *) p4d_deref(*p4d) + pud_index(address);
1274
-
return (pud_t *) p4d;
1278
+
if ((p4d_val(p4d) & _REGION_ENTRY_TYPE_MASK) >= _REGION_ENTRY_TYPE_R2)
1279
+
return (pud_t *) p4d_deref(p4d) + pud_index(address);
1280
+
return (pud_t *) p4dp;
1281
+
}
1282
+
#define pud_offset_lockless pud_offset_lockless
1283
+
1284
+
static inline pud_t *pud_offset(p4d_t *p4dp, unsigned long address)
1285
+
{
1286
+
return pud_offset_lockless(p4dp, *p4dp, address);
1275
1287
}
1276
1288
#define pud_offset pud_offset
1277
1289
1278
-
static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1290
+
static inline pmd_t *pmd_offset_lockless(pud_t *pudp, pud_t pud, unsigned long address)
1279
1291
{
1280
-
if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) >= _REGION_ENTRY_TYPE_R3)
1281
-
return (pmd_t *) pud_deref(*pud) + pmd_index(address);
1282
-
return (pmd_t *) pud;
1292
+
if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) >= _REGION_ENTRY_TYPE_R3)
1293
+
return (pmd_t *) pud_deref(pud) + pmd_index(address);
1294
+
return (pmd_t *) pudp;
1295
+
}
1296
+
#define pmd_offset_lockless pmd_offset_lockless
1297
+
1298
+
static inline pmd_t *pmd_offset(pud_t *pudp, unsigned long address)
1299
+
{
1300
+
return pmd_offset_lockless(pudp, *pudp, address);
1283
1301
}
1284
1302
#define pmd_offset pmd_offset
1285
1303
+1
-1
arch/x86/entry/common.c
+1
-1
arch/x86/entry/common.c
+2
arch/x86/entry/entry_64.S
+2
arch/x86/entry/entry_64.S
···
682
682
* rdx: Function argument (can be NULL if none)
683
683
*/
684
684
SYM_FUNC_START(asm_call_on_stack)
685
+
SYM_INNER_LABEL(asm_call_sysvec_on_stack, SYM_L_GLOBAL)
686
+
SYM_INNER_LABEL(asm_call_irq_on_stack, SYM_L_GLOBAL)
685
687
/*
686
688
* Save the frame pointer unconditionally. This allows the ORC
687
689
* unwinder to handle the stack switch.
+1
-1
arch/x86/include/asm/idtentry.h
+1
-1
arch/x86/include/asm/idtentry.h
···
242
242
instrumentation_begin(); \
243
243
irq_enter_rcu(); \
244
244
kvm_set_cpu_l1tf_flush_l1d(); \
245
-
run_on_irqstack_cond(__##func, regs, regs); \
245
+
run_sysvec_on_irqstack_cond(__##func, regs); \
246
246
irq_exit_rcu(); \
247
247
instrumentation_end(); \
248
248
irqentry_exit(regs, state); \
+62
-9
arch/x86/include/asm/irq_stack.h
+62
-9
arch/x86/include/asm/irq_stack.h
···
12
12
return __this_cpu_read(irq_count) != -1;
13
13
}
14
14
15
-
void asm_call_on_stack(void *sp, void *func, void *arg);
15
+
void asm_call_on_stack(void *sp, void (*func)(void), void *arg);
16
+
void asm_call_sysvec_on_stack(void *sp, void (*func)(struct pt_regs *regs),
17
+
struct pt_regs *regs);
18
+
void asm_call_irq_on_stack(void *sp, void (*func)(struct irq_desc *desc),
19
+
struct irq_desc *desc);
16
20
17
-
static __always_inline void __run_on_irqstack(void *func, void *arg)
21
+
static __always_inline void __run_on_irqstack(void (*func)(void))
18
22
{
19
23
void *tos = __this_cpu_read(hardirq_stack_ptr);
20
24
21
25
__this_cpu_add(irq_count, 1);
22
-
asm_call_on_stack(tos - 8, func, arg);
26
+
asm_call_on_stack(tos - 8, func, NULL);
27
+
__this_cpu_sub(irq_count, 1);
28
+
}
29
+
30
+
static __always_inline void
31
+
__run_sysvec_on_irqstack(void (*func)(struct pt_regs *regs),
32
+
struct pt_regs *regs)
33
+
{
34
+
void *tos = __this_cpu_read(hardirq_stack_ptr);
35
+
36
+
__this_cpu_add(irq_count, 1);
37
+
asm_call_sysvec_on_stack(tos - 8, func, regs);
38
+
__this_cpu_sub(irq_count, 1);
39
+
}
40
+
41
+
static __always_inline void
42
+
__run_irq_on_irqstack(void (*func)(struct irq_desc *desc),
43
+
struct irq_desc *desc)
44
+
{
45
+
void *tos = __this_cpu_read(hardirq_stack_ptr);
46
+
47
+
__this_cpu_add(irq_count, 1);
48
+
asm_call_irq_on_stack(tos - 8, func, desc);
23
49
__this_cpu_sub(irq_count, 1);
24
50
}
25
51
26
52
#else /* CONFIG_X86_64 */
27
53
static inline bool irqstack_active(void) { return false; }
28
-
static inline void __run_on_irqstack(void *func, void *arg) { }
54
+
static inline void __run_on_irqstack(void (*func)(void)) { }
55
+
static inline void __run_sysvec_on_irqstack(void (*func)(struct pt_regs *regs),
56
+
struct pt_regs *regs) { }
57
+
static inline void __run_irq_on_irqstack(void (*func)(struct irq_desc *desc),
58
+
struct irq_desc *desc) { }
29
59
#endif /* !CONFIG_X86_64 */
30
60
31
61
static __always_inline bool irq_needs_irq_stack(struct pt_regs *regs)
···
67
37
return !user_mode(regs) && !irqstack_active();
68
38
}
69
39
70
-
static __always_inline void run_on_irqstack_cond(void *func, void *arg,
40
+
41
+
static __always_inline void run_on_irqstack_cond(void (*func)(void),
71
42
struct pt_regs *regs)
72
43
{
73
-
void (*__func)(void *arg) = func;
74
-
75
44
lockdep_assert_irqs_disabled();
76
45
77
46
if (irq_needs_irq_stack(regs))
78
-
__run_on_irqstack(__func, arg);
47
+
__run_on_irqstack(func);
79
48
else
80
-
__func(arg);
49
+
func();
50
+
}
51
+
52
+
static __always_inline void
53
+
run_sysvec_on_irqstack_cond(void (*func)(struct pt_regs *regs),
54
+
struct pt_regs *regs)
55
+
{
56
+
lockdep_assert_irqs_disabled();
57
+
58
+
if (irq_needs_irq_stack(regs))
59
+
__run_sysvec_on_irqstack(func, regs);
60
+
else
61
+
func(regs);
62
+
}
63
+
64
+
static __always_inline void
65
+
run_irq_on_irqstack_cond(void (*func)(struct irq_desc *desc), struct irq_desc *desc,
66
+
struct pt_regs *regs)
67
+
{
68
+
lockdep_assert_irqs_disabled();
69
+
70
+
if (irq_needs_irq_stack(regs))
71
+
__run_irq_on_irqstack(func, desc);
72
+
else
73
+
func(desc);
81
74
}
82
75
83
76
#endif
+1
arch/x86/kernel/apic/io_apic.c
+1
arch/x86/kernel/apic/io_apic.c
+1
-1
arch/x86/kernel/irq.c
+1
-1
arch/x86/kernel/irq.c
+1
-1
arch/x86/kernel/irq_64.c
+1
-1
arch/x86/kernel/irq_64.c
+7
-1
arch/x86/kvm/svm/svm.c
+7
-1
arch/x86/kvm/svm/svm.c
···
2183
2183
return 1;
2184
2184
}
2185
2185
2186
+
static int invd_interception(struct vcpu_svm *svm)
2187
+
{
2188
+
/* Treat an INVD instruction as a NOP and just skip it. */
2189
+
return kvm_skip_emulated_instruction(&svm->vcpu);
2190
+
}
2191
+
2186
2192
static int invlpg_interception(struct vcpu_svm *svm)
2187
2193
{
2188
2194
if (!static_cpu_has(X86_FEATURE_DECODEASSISTS))
···
2780
2774
[SVM_EXIT_RDPMC] = rdpmc_interception,
2781
2775
[SVM_EXIT_CPUID] = cpuid_interception,
2782
2776
[SVM_EXIT_IRET] = iret_interception,
2783
-
[SVM_EXIT_INVD] = emulate_on_interception,
2777
+
[SVM_EXIT_INVD] = invd_interception,
2784
2778
[SVM_EXIT_PAUSE] = pause_interception,
2785
2779
[SVM_EXIT_HLT] = halt_interception,
2786
2780
[SVM_EXIT_INVLPG] = invlpg_interception,
+22
-15
arch/x86/kvm/vmx/vmx.c
+22
-15
arch/x86/kvm/vmx/vmx.c
···
129
129
module_param_named(preemption_timer, enable_preemption_timer, bool, S_IRUGO);
130
130
#endif
131
131
132
+
extern bool __read_mostly allow_smaller_maxphyaddr;
133
+
module_param(allow_smaller_maxphyaddr, bool, S_IRUGO);
134
+
132
135
#define KVM_VM_CR0_ALWAYS_OFF (X86_CR0_NW | X86_CR0_CD)
133
136
#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST X86_CR0_NE
134
137
#define KVM_VM_CR0_ALWAYS_ON \
···
794
791
*/
795
792
if (is_guest_mode(vcpu))
796
793
eb |= get_vmcs12(vcpu)->exception_bitmap;
794
+
else {
795
+
/*
796
+
* If EPT is enabled, #PF is only trapped if MAXPHYADDR is mismatched
797
+
* between guest and host. In that case we only care about present
798
+
* faults. For vmcs02, however, PFEC_MASK and PFEC_MATCH are set in
799
+
* prepare_vmcs02_rare.
800
+
*/
801
+
bool selective_pf_trap = enable_ept && (eb & (1u << PF_VECTOR));
802
+
int mask = selective_pf_trap ? PFERR_PRESENT_MASK : 0;
803
+
vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, mask);
804
+
vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, mask);
805
+
}
797
806
798
807
vmcs_write32(EXCEPTION_BITMAP, eb);
799
808
}
···
4367
4352
vmx->pt_desc.guest.output_mask = 0x7F;
4368
4353
vmcs_write64(GUEST_IA32_RTIT_CTL, 0);
4369
4354
}
4370
-
4371
-
/*
4372
-
* If EPT is enabled, #PF is only trapped if MAXPHYADDR is mismatched
4373
-
* between guest and host. In that case we only care about present
4374
-
* faults.
4375
-
*/
4376
-
if (enable_ept) {
4377
-
vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, PFERR_PRESENT_MASK);
4378
-
vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, PFERR_PRESENT_MASK);
4379
-
}
4380
4355
}
4381
4356
4382
4357
static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
···
4808
4803
* EPT will cause page fault only if we need to
4809
4804
* detect illegal GPAs.
4810
4805
*/
4806
+
WARN_ON_ONCE(!allow_smaller_maxphyaddr);
4811
4807
kvm_fixup_and_inject_pf_error(vcpu, cr2, error_code);
4812
4808
return 1;
4813
4809
} else
···
5337
5331
* would also use advanced VM-exit information for EPT violations to
5338
5332
* reconstruct the page fault error code.
5339
5333
*/
5340
-
if (unlikely(kvm_mmu_is_illegal_gpa(vcpu, gpa)))
5334
+
if (unlikely(allow_smaller_maxphyaddr && kvm_mmu_is_illegal_gpa(vcpu, gpa)))
5341
5335
return kvm_emulate_instruction(vcpu, 0);
5342
5336
5343
5337
return kvm_mmu_page_fault(vcpu, gpa, error_code, NULL, 0);
···
8311
8305
vmx_check_vmcs12_offsets();
8312
8306
8313
8307
/*
8314
-
* Intel processors don't have problems with
8315
-
* GUEST_MAXPHYADDR < HOST_MAXPHYADDR so enable
8316
-
* it for VMX by default
8308
+
* Shadow paging doesn't have a (further) performance penalty
8309
+
* from GUEST_MAXPHYADDR < HOST_MAXPHYADDR so enable it
8310
+
* by default
8317
8311
*/
8318
-
allow_smaller_maxphyaddr = true;
8312
+
if (!enable_ept)
8313
+
allow_smaller_maxphyaddr = true;
8319
8314
8320
8315
return 0;
8321
8316
}
+4
-1
arch/x86/kvm/vmx/vmx.h
+4
-1
arch/x86/kvm/vmx/vmx.h
···
552
552
553
553
static inline bool vmx_need_pf_intercept(struct kvm_vcpu *vcpu)
554
554
{
555
-
return !enable_ept || cpuid_maxphyaddr(vcpu) < boot_cpu_data.x86_phys_bits;
555
+
if (!enable_ept)
556
+
return true;
557
+
558
+
return allow_smaller_maxphyaddr && cpuid_maxphyaddr(vcpu) < boot_cpu_data.x86_phys_bits;
556
559
}
557
560
558
561
void dump_vmcs(void);
+18
-4
arch/x86/kvm/x86.c
+18
-4
arch/x86/kvm/x86.c
···
188
188
u64 __read_mostly host_efer;
189
189
EXPORT_SYMBOL_GPL(host_efer);
190
190
191
-
bool __read_mostly allow_smaller_maxphyaddr;
191
+
bool __read_mostly allow_smaller_maxphyaddr = 0;
192
192
EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
193
193
194
194
static u64 __read_mostly host_xss;
···
976
976
unsigned long old_cr4 = kvm_read_cr4(vcpu);
977
977
unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
978
978
X86_CR4_SMEP;
979
+
unsigned long mmu_role_bits = pdptr_bits | X86_CR4_SMAP | X86_CR4_PKE;
979
980
980
981
if (kvm_valid_cr4(vcpu, cr4))
981
982
return 1;
···
1004
1003
if (kvm_x86_ops.set_cr4(vcpu, cr4))
1005
1004
return 1;
1006
1005
1007
-
if (((cr4 ^ old_cr4) & pdptr_bits) ||
1006
+
if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1008
1007
(!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1009
1008
kvm_mmu_reset_context(vcpu);
1010
1009
···
3222
3221
case MSR_IA32_POWER_CTL:
3223
3222
msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3224
3223
break;
3225
-
case MSR_IA32_TSC:
3226
-
msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
3224
+
case MSR_IA32_TSC: {
3225
+
/*
3226
+
* Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3227
+
* even when not intercepted. AMD manual doesn't explicitly
3228
+
* state this but appears to behave the same.
3229
+
*
3230
+
* On userspace reads and writes, however, we unconditionally
3231
+
* operate L1's TSC value to ensure backwards-compatible
3232
+
* behavior for migration.
3233
+
*/
3234
+
u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3235
+
vcpu->arch.tsc_offset;
3236
+
3237
+
msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3227
3238
break;
3239
+
}
3228
3240
case MSR_MTRRcap:
3229
3241
case 0x200 ... 0x2ff:
3230
3242
return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
+1
-1
arch/x86/lib/usercopy_64.c
+1
-1
arch/x86/lib/usercopy_64.c
+9
-9
block/blk-mq.c
+9
-9
block/blk-mq.c
···
1412
1412
1413
1413
hctx->dispatched[queued_to_index(queued)]++;
1414
1414
1415
+
/* If we didn't flush the entire list, we could have told the driver
1416
+
* there was more coming, but that turned out to be a lie.
1417
+
*/
1418
+
if ((!list_empty(list) || errors) && q->mq_ops->commit_rqs && queued)
1419
+
q->mq_ops->commit_rqs(hctx);
1415
1420
/*
1416
1421
* Any items that need requeuing? Stuff them into hctx->dispatch,
1417
1422
* that is where we will continue on next queue run.
···
1429
1424
bool no_budget_avail = prep == PREP_DISPATCH_NO_BUDGET;
1430
1425
1431
1426
blk_mq_release_budgets(q, nr_budgets);
1432
-
1433
-
/*
1434
-
* If we didn't flush the entire list, we could have told
1435
-
* the driver there was more coming, but that turned out to
1436
-
* be a lie.
1437
-
*/
1438
-
if (q->mq_ops->commit_rqs && queued)
1439
-
q->mq_ops->commit_rqs(hctx);
1440
1427
1441
1428
spin_lock(&hctx->lock);
1442
1429
list_splice_tail_init(list, &hctx->dispatch);
···
2076
2079
struct list_head *list)
2077
2080
{
2078
2081
int queued = 0;
2082
+
int errors = 0;
2079
2083
2080
2084
while (!list_empty(list)) {
2081
2085
blk_status_t ret;
···
2093
2095
break;
2094
2096
}
2095
2097
blk_mq_end_request(rq, ret);
2098
+
errors++;
2096
2099
} else
2097
2100
queued++;
2098
2101
}
···
2103
2104
* the driver there was more coming, but that turned out to
2104
2105
* be a lie.
2105
2106
*/
2106
-
if (!list_empty(list) && hctx->queue->mq_ops->commit_rqs && queued)
2107
+
if ((!list_empty(list) || errors) &&
2108
+
hctx->queue->mq_ops->commit_rqs && queued)
2107
2109
hctx->queue->mq_ops->commit_rqs(hctx);
2108
2110
}
2109
2111
+46
block/blk-settings.c
+46
block/blk-settings.c
···
801
801
}
802
802
EXPORT_SYMBOL_GPL(blk_queue_can_use_dma_map_merging);
803
803
804
+
/**
805
+
* blk_queue_set_zoned - configure a disk queue zoned model.
806
+
* @disk: the gendisk of the queue to configure
807
+
* @model: the zoned model to set
808
+
*
809
+
* Set the zoned model of the request queue of @disk according to @model.
810
+
* When @model is BLK_ZONED_HM (host managed), this should be called only
811
+
* if zoned block device support is enabled (CONFIG_BLK_DEV_ZONED option).
812
+
* If @model specifies BLK_ZONED_HA (host aware), the effective model used
813
+
* depends on CONFIG_BLK_DEV_ZONED settings and on the existence of partitions
814
+
* on the disk.
815
+
*/
816
+
void blk_queue_set_zoned(struct gendisk *disk, enum blk_zoned_model model)
817
+
{
818
+
switch (model) {
819
+
case BLK_ZONED_HM:
820
+
/*
821
+
* Host managed devices are supported only if
822
+
* CONFIG_BLK_DEV_ZONED is enabled.
823
+
*/
824
+
WARN_ON_ONCE(!IS_ENABLED(CONFIG_BLK_DEV_ZONED));
825
+
break;
826
+
case BLK_ZONED_HA:
827
+
/*
828
+
* Host aware devices can be treated either as regular block
829
+
* devices (similar to drive managed devices) or as zoned block
830
+
* devices to take advantage of the zone command set, similarly
831
+
* to host managed devices. We try the latter if there are no
832
+
* partitions and zoned block device support is enabled, else
833
+
* we do nothing special as far as the block layer is concerned.
834
+
*/
835
+
if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED) ||
836
+
disk_has_partitions(disk))
837
+
model = BLK_ZONED_NONE;
838
+
break;
839
+
case BLK_ZONED_NONE:
840
+
default:
841
+
if (WARN_ON_ONCE(model != BLK_ZONED_NONE))
842
+
model = BLK_ZONED_NONE;
843
+
break;
844
+
}
845
+
846
+
disk->queue->limits.zoned = model;
847
+
}
848
+
EXPORT_SYMBOL_GPL(blk_queue_set_zoned);
849
+
804
850
static int __init blk_settings_init(void)
805
851
{
806
852
blk_max_low_pfn = max_low_pfn - 1;
+1
drivers/acpi/processor_idle.c
+1
drivers/acpi/processor_idle.c
+55
-30
drivers/base/node.c
+55
-30
drivers/base/node.c
···
761
761
return pfn_to_nid(pfn);
762
762
}
763
763
764
+
static int do_register_memory_block_under_node(int nid,
765
+
struct memory_block *mem_blk)
766
+
{
767
+
int ret;
768
+
769
+
/*
770
+
* If this memory block spans multiple nodes, we only indicate
771
+
* the last processed node.
772
+
*/
773
+
mem_blk->nid = nid;
774
+
775
+
ret = sysfs_create_link_nowarn(&node_devices[nid]->dev.kobj,
776
+
&mem_blk->dev.kobj,
777
+
kobject_name(&mem_blk->dev.kobj));
778
+
if (ret)
779
+
return ret;
780
+
781
+
return sysfs_create_link_nowarn(&mem_blk->dev.kobj,
782
+
&node_devices[nid]->dev.kobj,
783
+
kobject_name(&node_devices[nid]->dev.kobj));
784
+
}
785
+
764
786
/* register memory section under specified node if it spans that node */
765
-
static int register_mem_sect_under_node(struct memory_block *mem_blk,
766
-
void *arg)
787
+
static int register_mem_block_under_node_early(struct memory_block *mem_blk,
788
+
void *arg)
767
789
{
768
790
unsigned long memory_block_pfns = memory_block_size_bytes() / PAGE_SIZE;
769
791
unsigned long start_pfn = section_nr_to_pfn(mem_blk->start_section_nr);
770
792
unsigned long end_pfn = start_pfn + memory_block_pfns - 1;
771
-
int ret, nid = *(int *)arg;
793
+
int nid = *(int *)arg;
772
794
unsigned long pfn;
773
795
774
796
for (pfn = start_pfn; pfn <= end_pfn; pfn++) {
···
807
785
}
808
786
809
787
/*
810
-
* We need to check if page belongs to nid only for the boot
811
-
* case, during hotplug we know that all pages in the memory
812
-
* block belong to the same node.
788
+
* We need to check if page belongs to nid only at the boot
789
+
* case because node's ranges can be interleaved.
813
790
*/
814
-
if (system_state == SYSTEM_BOOTING) {
815
-
page_nid = get_nid_for_pfn(pfn);
816
-
if (page_nid < 0)
817
-
continue;
818
-
if (page_nid != nid)
819
-
continue;
820
-
}
791
+
page_nid = get_nid_for_pfn(pfn);
792
+
if (page_nid < 0)
793
+
continue;
794
+
if (page_nid != nid)
795
+
continue;
821
796
822
-
/*
823
-
* If this memory block spans multiple nodes, we only indicate
824
-
* the last processed node.
825
-
*/
826
-
mem_blk->nid = nid;
827
-
828
-
ret = sysfs_create_link_nowarn(&node_devices[nid]->dev.kobj,
829
-
&mem_blk->dev.kobj,
830
-
kobject_name(&mem_blk->dev.kobj));
831
-
if (ret)
832
-
return ret;
833
-
834
-
return sysfs_create_link_nowarn(&mem_blk->dev.kobj,
835
-
&node_devices[nid]->dev.kobj,
836
-
kobject_name(&node_devices[nid]->dev.kobj));
797
+
return do_register_memory_block_under_node(nid, mem_blk);
837
798
}
838
799
/* mem section does not span the specified node */
839
800
return 0;
801
+
}
802
+
803
+
/*
804
+
* During hotplug we know that all pages in the memory block belong to the same
805
+
* node.
806
+
*/
807
+
static int register_mem_block_under_node_hotplug(struct memory_block *mem_blk,
808
+
void *arg)
809
+
{
810
+
int nid = *(int *)arg;
811
+
812
+
return do_register_memory_block_under_node(nid, mem_blk);
840
813
}
841
814
842
815
/*
···
849
832
kobject_name(&node_devices[mem_blk->nid]->dev.kobj));
850
833
}
851
834
852
-
int link_mem_sections(int nid, unsigned long start_pfn, unsigned long end_pfn)
835
+
int link_mem_sections(int nid, unsigned long start_pfn, unsigned long end_pfn,
836
+
enum meminit_context context)
853
837
{
838
+
walk_memory_blocks_func_t func;
839
+
840
+
if (context == MEMINIT_HOTPLUG)
841
+
func = register_mem_block_under_node_hotplug;
842
+
else
843
+
func = register_mem_block_under_node_early;
844
+
854
845
return walk_memory_blocks(PFN_PHYS(start_pfn),
855
846
PFN_PHYS(end_pfn - start_pfn), (void *)&nid,
856
-
register_mem_sect_under_node);
847
+
func);
857
848
}
858
849
859
850
#ifdef CONFIG_HUGETLBFS
+3
-3
drivers/base/regmap/internal.h
+3
-3
drivers/base/regmap/internal.h
···
217
217
218
218
#ifdef CONFIG_DEBUG_FS
219
219
extern void regmap_debugfs_initcall(void);
220
-
extern void regmap_debugfs_init(struct regmap *map, const char *name);
220
+
extern void regmap_debugfs_init(struct regmap *map);
221
221
extern void regmap_debugfs_exit(struct regmap *map);
222
222
223
223
static inline void regmap_debugfs_disable(struct regmap *map)
···
227
227
228
228
#else
229
229
static inline void regmap_debugfs_initcall(void) { }
230
-
static inline void regmap_debugfs_init(struct regmap *map, const char *name) { }
230
+
static inline void regmap_debugfs_init(struct regmap *map) { }
231
231
static inline void regmap_debugfs_exit(struct regmap *map) { }
232
232
static inline void regmap_debugfs_disable(struct regmap *map) { }
233
233
#endif
···
259
259
int regcache_lookup_reg(struct regmap *map, unsigned int reg);
260
260
261
261
int _regmap_raw_write(struct regmap *map, unsigned int reg,
262
-
const void *val, size_t val_len);
262
+
const void *val, size_t val_len, bool noinc);
263
263
264
264
void regmap_async_complete_cb(struct regmap_async *async, int ret);
265
265
+1
-1
drivers/base/regmap/regcache.c
+1
-1
drivers/base/regmap/regcache.c
···
717
717
718
718
map->cache_bypass = true;
719
719
720
-
ret = _regmap_raw_write(map, base, *data, count * val_bytes);
720
+
ret = _regmap_raw_write(map, base, *data, count * val_bytes, false);
721
721
if (ret)
722
722
dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n",
723
723
base, cur - map->reg_stride, ret);
+3
-4
drivers/base/regmap/regmap-debugfs.c
+3
-4
drivers/base/regmap/regmap-debugfs.c
···
17
17
18
18
struct regmap_debugfs_node {
19
19
struct regmap *map;
20
-
const char *name;
21
20
struct list_head link;
22
21
};
23
22
···
543
544
.write = regmap_cache_bypass_write_file,
544
545
};
545
546
546
-
void regmap_debugfs_init(struct regmap *map, const char *name)
547
+
void regmap_debugfs_init(struct regmap *map)
547
548
{
548
549
struct rb_node *next;
549
550
struct regmap_range_node *range_node;
550
551
const char *devname = "dummy";
552
+
const char *name = map->name;
551
553
552
554
/*
553
555
* Userspace can initiate reads from the hardware over debugfs.
···
569
569
if (!node)
570
570
return;
571
571
node->map = map;
572
-
node->name = name;
573
572
mutex_lock(®map_debugfs_early_lock);
574
573
list_add(&node->link, ®map_debugfs_early_list);
575
574
mutex_unlock(®map_debugfs_early_lock);
···
678
679
679
680
mutex_lock(®map_debugfs_early_lock);
680
681
list_for_each_entry_safe(node, tmp, ®map_debugfs_early_list, link) {
681
-
regmap_debugfs_init(node->map, node->name);
682
+
regmap_debugfs_init(node->map);
682
683
list_del(&node->link);
683
684
kfree(node);
684
685
}
+49
-26
drivers/base/regmap/regmap.c
+49
-26
drivers/base/regmap/regmap.c
···
581
581
kfree(map->selector_work_buf);
582
582
}
583
583
584
+
static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
585
+
{
586
+
if (config->name) {
587
+
const char *name = kstrdup_const(config->name, GFP_KERNEL);
588
+
589
+
if (!name)
590
+
return -ENOMEM;
591
+
592
+
kfree_const(map->name);
593
+
map->name = name;
594
+
}
595
+
596
+
return 0;
597
+
}
598
+
584
599
int regmap_attach_dev(struct device *dev, struct regmap *map,
585
600
const struct regmap_config *config)
586
601
{
587
602
struct regmap **m;
603
+
int ret;
588
604
589
605
map->dev = dev;
590
606
591
-
regmap_debugfs_init(map, config->name);
607
+
ret = regmap_set_name(map, config);
608
+
if (ret)
609
+
return ret;
610
+
611
+
regmap_debugfs_init(map);
592
612
593
613
/* Add a devres resource for dev_get_regmap() */
594
614
m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
···
707
687
goto err;
708
688
}
709
689
710
-
if (config->name) {
711
-
map->name = kstrdup_const(config->name, GFP_KERNEL);
712
-
if (!map->name) {
713
-
ret = -ENOMEM;
714
-
goto err_map;
715
-
}
716
-
}
690
+
ret = regmap_set_name(map, config);
691
+
if (ret)
692
+
goto err_map;
717
693
718
694
if (config->disable_locking) {
719
695
map->lock = map->unlock = regmap_lock_unlock_none;
···
1153
1137
if (ret != 0)
1154
1138
goto err_regcache;
1155
1139
} else {
1156
-
regmap_debugfs_init(map, config->name);
1140
+
regmap_debugfs_init(map);
1157
1141
}
1158
1142
1159
1143
return map;
···
1313
1297
*/
1314
1298
int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1315
1299
{
1300
+
int ret;
1301
+
1316
1302
regcache_exit(map);
1317
1303
regmap_debugfs_exit(map);
1318
1304
···
1327
1309
map->readable_noinc_reg = config->readable_noinc_reg;
1328
1310
map->cache_type = config->cache_type;
1329
1311
1330
-
regmap_debugfs_init(map, config->name);
1312
+
ret = regmap_set_name(map, config);
1313
+
if (ret)
1314
+
return ret;
1315
+
1316
+
regmap_debugfs_init(map);
1331
1317
1332
1318
map->cache_bypass = false;
1333
1319
map->cache_only = false;
···
1486
1464
}
1487
1465
1488
1466
static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1489
-
const void *val, size_t val_len)
1467
+
const void *val, size_t val_len, bool noinc)
1490
1468
{
1491
1469
struct regmap_range_node *range;
1492
1470
unsigned long flags;
···
1545
1523
win_residue, val_len / map->format.val_bytes);
1546
1524
ret = _regmap_raw_write_impl(map, reg, val,
1547
1525
win_residue *
1548
-
map->format.val_bytes);
1526
+
map->format.val_bytes, noinc);
1549
1527
if (ret != 0)
1550
1528
return ret;
1551
1529
···
1559
1537
win_residue = range->window_len - win_offset;
1560
1538
}
1561
1539
1562
-
ret = _regmap_select_page(map, ®, range, val_num);
1540
+
ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1563
1541
if (ret != 0)
1564
1542
return ret;
1565
1543
}
···
1767
1745
map->work_buf +
1768
1746
map->format.reg_bytes +
1769
1747
map->format.pad_bytes,
1770
-
map->format.val_bytes);
1748
+
map->format.val_bytes,
1749
+
false);
1771
1750
}
1772
1751
1773
1752
static inline void *_regmap_map_get_context(struct regmap *map)
···
1862
1839
EXPORT_SYMBOL_GPL(regmap_write_async);
1863
1840
1864
1841
int _regmap_raw_write(struct regmap *map, unsigned int reg,
1865
-
const void *val, size_t val_len)
1842
+
const void *val, size_t val_len, bool noinc)
1866
1843
{
1867
1844
size_t val_bytes = map->format.val_bytes;
1868
1845
size_t val_count = val_len / val_bytes;
···
1883
1860
1884
1861
/* Write as many bytes as possible with chunk_size */
1885
1862
for (i = 0; i < chunk_count; i++) {
1886
-
ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes);
1863
+
ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
1887
1864
if (ret)
1888
1865
return ret;
1889
1866
···
1894
1871
1895
1872
/* Write remaining bytes */
1896
1873
if (val_len)
1897
-
ret = _regmap_raw_write_impl(map, reg, val, val_len);
1874
+
ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
1898
1875
1899
1876
return ret;
1900
1877
}
···
1927
1904
1928
1905
map->lock(map->lock_arg);
1929
1906
1930
-
ret = _regmap_raw_write(map, reg, val, val_len);
1907
+
ret = _regmap_raw_write(map, reg, val, val_len, false);
1931
1908
1932
1909
map->unlock(map->lock_arg);
1933
1910
···
1985
1962
write_len = map->max_raw_write;
1986
1963
else
1987
1964
write_len = val_len;
1988
-
ret = _regmap_raw_write(map, reg, val, write_len);
1965
+
ret = _regmap_raw_write(map, reg, val, write_len, true);
1989
1966
if (ret)
1990
1967
goto out_unlock;
1991
1968
val = ((u8 *)val) + write_len;
···
2462
2439
2463
2440
map->async = true;
2464
2441
2465
-
ret = _regmap_raw_write(map, reg, val, val_len);
2442
+
ret = _regmap_raw_write(map, reg, val, val_len, false);
2466
2443
2467
2444
map->async = false;
2468
2445
···
2473
2450
EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2474
2451
2475
2452
static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2476
-
unsigned int val_len)
2453
+
unsigned int val_len, bool noinc)
2477
2454
{
2478
2455
struct regmap_range_node *range;
2479
2456
int ret;
···
2486
2463
range = _regmap_range_lookup(map, reg);
2487
2464
if (range) {
2488
2465
ret = _regmap_select_page(map, ®, range,
2489
-
val_len / map->format.val_bytes);
2466
+
noinc ? 1 : val_len / map->format.val_bytes);
2490
2467
if (ret != 0)
2491
2468
return ret;
2492
2469
}
···
2524
2501
if (!map->format.parse_val)
2525
2502
return -EINVAL;
2526
2503
2527
-
ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes);
2504
+
ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2528
2505
if (ret == 0)
2529
2506
*val = map->format.parse_val(work_val);
2530
2507
···
2640
2617
2641
2618
/* Read bytes that fit into whole chunks */
2642
2619
for (i = 0; i < chunk_count; i++) {
2643
-
ret = _regmap_raw_read(map, reg, val, chunk_bytes);
2620
+
ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2644
2621
if (ret != 0)
2645
2622
goto out;
2646
2623
···
2651
2628
2652
2629
/* Read remaining bytes */
2653
2630
if (val_len) {
2654
-
ret = _regmap_raw_read(map, reg, val, val_len);
2631
+
ret = _regmap_raw_read(map, reg, val, val_len, false);
2655
2632
if (ret != 0)
2656
2633
goto out;
2657
2634
}
···
2726
2703
read_len = map->max_raw_read;
2727
2704
else
2728
2705
read_len = val_len;
2729
-
ret = _regmap_raw_read(map, reg, val, read_len);
2706
+
ret = _regmap_raw_read(map, reg, val, read_len, true);
2730
2707
if (ret)
2731
2708
goto out_unlock;
2732
2709
val = ((u8 *)val) + read_len;
+1
-1
drivers/block/drbd/drbd_main.c
+1
-1
drivers/block/drbd/drbd_main.c
···
1553
1553
* put_page(); and would cause either a VM_BUG directly, or
1554
1554
* __page_cache_release a page that would actually still be referenced
1555
1555
* by someone, leading to some obscure delayed Oops somewhere else. */
1556
-
if (drbd_disable_sendpage || (page_count(page) < 1) || PageSlab(page))
1556
+
if (drbd_disable_sendpage || !sendpage_ok(page))
1557
1557
return _drbd_no_send_page(peer_device, page, offset, size, msg_flags);
1558
1558
1559
1559
msg_flags |= MSG_NOSIGNAL;
+2
-2
drivers/clk/samsung/clk-exynos4.c
+2
-2
drivers/clk/samsung/clk-exynos4.c
···
927
927
GATE(CLK_PCIE, "pcie", "aclk133", GATE_IP_FSYS, 14, 0, 0),
928
928
GATE(CLK_SMMU_PCIE, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0),
929
929
GATE(CLK_MODEMIF, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0),
930
-
GATE(CLK_CHIPID, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0),
930
+
GATE(CLK_CHIPID, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, CLK_IGNORE_UNUSED, 0),
931
931
GATE(CLK_SYSREG, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0,
932
932
CLK_IGNORE_UNUSED, 0),
933
933
GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0,
···
969
969
0),
970
970
GATE(CLK_TSADC, "tsadc", "aclk133", E4X12_GATE_BUS_FSYS1, 16, 0, 0),
971
971
GATE(CLK_MIPI_HSI, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0),
972
-
GATE(CLK_CHIPID, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0),
972
+
GATE(CLK_CHIPID, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, CLK_IGNORE_UNUSED, 0),
973
973
GATE(CLK_SYSREG, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1,
974
974
CLK_IGNORE_UNUSED, 0),
975
975
GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0,
+5
drivers/clk/samsung/clk-exynos5420.c
+5
drivers/clk/samsung/clk-exynos5420.c
···
1655
1655
* main G3D clock enablement status.
1656
1656
*/
1657
1657
clk_prepare_enable(__clk_lookup("mout_sw_aclk_g3d"));
1658
+
/*
1659
+
* Keep top BPLL mux enabled permanently to ensure that DRAM operates
1660
+
* properly.
1661
+
*/
1662
+
clk_prepare_enable(__clk_lookup("mout_bpll"));
1658
1663
1659
1664
samsung_clk_of_add_provider(np, ctx);
1660
1665
}
+1
-1
drivers/clk/socfpga/clk-s10.c
+1
-1
drivers/clk/socfpga/clk-s10.c
···
209
209
{ STRATIX10_EMAC_B_FREE_CLK, "emacb_free_clk", NULL, emacb_free_mux, ARRAY_SIZE(emacb_free_mux),
210
210
0, 0, 2, 0xB0, 1},
211
211
{ STRATIX10_EMAC_PTP_FREE_CLK, "emac_ptp_free_clk", NULL, emac_ptp_free_mux,
212
-
ARRAY_SIZE(emac_ptp_free_mux), 0, 0, 4, 0xB0, 2},
212
+
ARRAY_SIZE(emac_ptp_free_mux), 0, 0, 2, 0xB0, 2},
213
213
{ STRATIX10_GPIO_DB_FREE_CLK, "gpio_db_free_clk", NULL, gpio_db_free_mux,
214
214
ARRAY_SIZE(gpio_db_free_mux), 0, 0, 0, 0xB0, 3},
215
215
{ STRATIX10_SDMMC_FREE_CLK, "sdmmc_free_clk", NULL, sdmmc_free_mux,
+2
-5
drivers/clk/tegra/clk-pll.c
+2
-5
drivers/clk/tegra/clk-pll.c
···
1611
1611
unsigned long flags = 0;
1612
1612
unsigned long input_rate;
1613
1613
1614
-
if (clk_pll_is_enabled(hw))
1615
-
return 0;
1616
-
1617
1614
input_rate = clk_hw_get_rate(clk_hw_get_parent(hw));
1618
1615
1619
1616
if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate))
···
1670
1673
pll_writel(val, PLLE_SS_CTRL, pll);
1671
1674
udelay(1);
1672
1675
1673
-
/* Enable hw control of xusb brick pll */
1676
+
/* Enable HW control of XUSB brick PLL */
1674
1677
val = pll_readl_misc(pll);
1675
1678
val &= ~PLLE_MISC_IDDQ_SW_CTRL;
1676
1679
pll_writel_misc(val, pll);
···
1693
1696
val |= XUSBIO_PLL_CFG0_SEQ_ENABLE;
1694
1697
pll_writel(val, XUSBIO_PLL_CFG0, pll);
1695
1698
1696
-
/* Enable hw control of SATA pll */
1699
+
/* Enable HW control of SATA PLL */
1697
1700
val = pll_readl(SATA_PLL_CFG0, pll);
1698
1701
val &= ~SATA_PLL_CFG0_PADPLL_RESET_SWCTL;
1699
1702
val |= SATA_PLL_CFG0_PADPLL_USE_LOCKDET;
+2
drivers/clk/tegra/clk-tegra210-emc.c
+2
drivers/clk/tegra/clk-tegra210-emc.c
+1
-1
drivers/clocksource/h8300_timer8.c
+1
-1
drivers/clocksource/h8300_timer8.c
+1
drivers/clocksource/timer-clint.c
+1
drivers/clocksource/timer-clint.c
+1
drivers/clocksource/timer-gx6605s.c
+1
drivers/clocksource/timer-gx6605s.c
+23
-21
drivers/clocksource/timer-ti-dm-systimer.c
+23
-21
drivers/clocksource/timer-ti-dm-systimer.c
···
69
69
return !(tidr >> 16);
70
70
}
71
71
72
+
static void dmtimer_systimer_enable(struct dmtimer_systimer *t)
73
+
{
74
+
u32 val;
75
+
76
+
if (dmtimer_systimer_revision1(t))
77
+
val = DMTIMER_TYPE1_ENABLE;
78
+
else
79
+
val = DMTIMER_TYPE2_ENABLE;
80
+
81
+
writel_relaxed(val, t->base + t->sysc);
82
+
}
83
+
84
+
static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
85
+
{
86
+
if (!dmtimer_systimer_revision1(t))
87
+
return;
88
+
89
+
writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
90
+
}
91
+
72
92
static int __init dmtimer_systimer_type1_reset(struct dmtimer_systimer *t)
73
93
{
74
94
void __iomem *syss = t->base + OMAP_TIMER_V1_SYS_STAT_OFFSET;
75
95
int ret;
76
96
u32 l;
77
97
98
+
dmtimer_systimer_enable(t);
78
99
writel_relaxed(BIT(1) | BIT(2), t->base + t->ifctrl);
79
100
ret = readl_poll_timeout_atomic(syss, l, l & BIT(0), 100,
80
101
DMTIMER_RESET_WAIT);
···
109
88
void __iomem *sysc = t->base + t->sysc;
110
89
u32 l;
111
90
91
+
dmtimer_systimer_enable(t);
112
92
l = readl_relaxed(sysc);
113
93
l |= BIT(0);
114
94
writel_relaxed(l, sysc);
···
358
336
return 0;
359
337
}
360
338
361
-
static void dmtimer_systimer_enable(struct dmtimer_systimer *t)
362
-
{
363
-
u32 val;
364
-
365
-
if (dmtimer_systimer_revision1(t))
366
-
val = DMTIMER_TYPE1_ENABLE;
367
-
else
368
-
val = DMTIMER_TYPE2_ENABLE;
369
-
370
-
writel_relaxed(val, t->base + t->sysc);
371
-
}
372
-
373
-
static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
374
-
{
375
-
if (!dmtimer_systimer_revision1(t))
376
-
return;
377
-
378
-
writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
379
-
}
380
-
381
339
static int __init dmtimer_systimer_setup(struct device_node *np,
382
340
struct dmtimer_systimer *t)
383
341
{
···
411
409
t->wakeup = regbase + _OMAP_TIMER_WAKEUP_EN_OFFSET;
412
410
t->ifctrl = regbase + _OMAP_TIMER_IF_CTRL_OFFSET;
413
411
414
-
dmtimer_systimer_enable(t);
415
412
dmtimer_systimer_reset(t);
413
+
dmtimer_systimer_enable(t);
416
414
pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(t->base),
417
415
readl_relaxed(t->base + t->sysc));
418
416
+1
drivers/cpufreq/intel_pstate.c
+1
drivers/cpufreq/intel_pstate.c
+2
-2
drivers/cpuidle/cpuidle-psci.c
+2
-2
drivers/cpuidle/cpuidle-psci.c
···
66
66
return -1;
67
67
68
68
/* Do runtime PM to manage a hierarchical CPU toplogy. */
69
-
pm_runtime_put_sync_suspend(pd_dev);
69
+
RCU_NONIDLE(pm_runtime_put_sync_suspend(pd_dev));
70
70
71
71
state = psci_get_domain_state();
72
72
if (!state)
···
74
74
75
75
ret = psci_cpu_suspend_enter(state) ? -1 : idx;
76
76
77
-
pm_runtime_get_sync(pd_dev);
77
+
RCU_NONIDLE(pm_runtime_get_sync(pd_dev));
78
78
79
79
cpu_pm_exit();
80
80
-10
drivers/cpuidle/cpuidle.c
-10
drivers/cpuidle/cpuidle.c
···
142
142
143
143
time_start = ns_to_ktime(local_clock());
144
144
145
-
/*
146
-
* trace_suspend_resume() called by tick_freeze() for the last CPU
147
-
* executing it contains RCU usage regarded as invalid in the idle
148
-
* context, so tell RCU about that.
149
-
*/
150
145
tick_freeze();
151
146
/*
152
147
* The state used here cannot be a "coupled" one, because the "coupled"
···
154
159
target_state->enter_s2idle(dev, drv, index);
155
160
if (WARN_ON_ONCE(!irqs_disabled()))
156
161
local_irq_disable();
157
-
/*
158
-
* timekeeping_resume() that will be called by tick_unfreeze() for the
159
-
* first CPU executing it calls functions containing RCU read-side
160
-
* critical sections, so tell RCU about that.
161
-
*/
162
162
if (!(target_state->flags & CPUIDLE_FLAG_RCU_IDLE))
163
163
rcu_idle_exit();
164
164
tick_unfreeze();
+8
-3
drivers/devfreq/devfreq.c
+8
-3
drivers/devfreq/devfreq.c
···
1766
1766
struct devfreq *p_devfreq = NULL;
1767
1767
unsigned long cur_freq, min_freq, max_freq;
1768
1768
unsigned int polling_ms;
1769
+
unsigned int timer;
1769
1770
1770
-
seq_printf(s, "%-30s %-30s %-15s %10s %12s %12s %12s\n",
1771
+
seq_printf(s, "%-30s %-30s %-15s %-10s %10s %12s %12s %12s\n",
1771
1772
"dev",
1772
1773
"parent_dev",
1773
1774
"governor",
1775
+
"timer",
1774
1776
"polling_ms",
1775
1777
"cur_freq_Hz",
1776
1778
"min_freq_Hz",
1777
1779
"max_freq_Hz");
1778
-
seq_printf(s, "%30s %30s %15s %10s %12s %12s %12s\n",
1780
+
seq_printf(s, "%30s %30s %15s %10s %10s %12s %12s %12s\n",
1779
1781
"------------------------------",
1780
1782
"------------------------------",
1781
1783
"---------------",
1784
+
"----------",
1782
1785
"----------",
1783
1786
"------------",
1784
1787
"------------",
···
1806
1803
cur_freq = devfreq->previous_freq;
1807
1804
get_freq_range(devfreq, &min_freq, &max_freq);
1808
1805
polling_ms = devfreq->profile->polling_ms;
1806
+
timer = devfreq->profile->timer;
1809
1807
mutex_unlock(&devfreq->lock);
1810
1808
1811
1809
seq_printf(s,
1812
-
"%-30s %-30s %-15s %10d %12ld %12ld %12ld\n",
1810
+
"%-30s %-30s %-15s %-10s %10d %12ld %12ld %12ld\n",
1813
1811
dev_name(&devfreq->dev),
1814
1812
p_devfreq ? dev_name(&p_devfreq->dev) : "null",
1815
1813
devfreq->governor_name,
1814
+
polling_ms ? timer_name[timer] : "null",
1816
1815
polling_ms,
1817
1816
cur_freq,
1818
1817
min_freq,
+3
-1
drivers/devfreq/tegra30-devfreq.c
+3
-1
drivers/devfreq/tegra30-devfreq.c
···
836
836
rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
837
837
if (rate < 0) {
838
838
dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate);
839
-
return rate;
839
+
err = rate;
840
+
goto disable_clk;
840
841
}
841
842
842
843
tegra->max_freq = rate / KHZ;
···
898
897
dev_pm_opp_remove_all_dynamic(&pdev->dev);
899
898
900
899
reset_control_reset(tegra->reset);
900
+
disable_clk:
901
901
clk_disable_unprepare(tegra->clock);
902
902
903
903
return err;
+2
drivers/dma-buf/dma-buf.c
+2
drivers/dma-buf/dma-buf.c
+21
-5
drivers/dma/dmatest.c
+21
-5
drivers/dma/dmatest.c
···
129
129
* @nr_channels: number of channels under test
130
130
* @lock: access protection to the fields of this structure
131
131
* @did_init: module has been initialized completely
132
+
* @last_error: test has faced configuration issues
132
133
*/
133
134
static struct dmatest_info {
134
135
/* Test parameters */
···
138
137
/* Internal state */
139
138
struct list_head channels;
140
139
unsigned int nr_channels;
140
+
int last_error;
141
141
struct mutex lock;
142
142
bool did_init;
143
143
} test_info = {
···
1186
1184
return ret;
1187
1185
} else if (dmatest_run) {
1188
1186
if (!is_threaded_test_pending(info)) {
1189
-
pr_info("No channels configured, continue with any\n");
1190
-
if (!is_threaded_test_run(info))
1191
-
stop_threaded_test(info);
1192
-
add_threaded_test(info);
1187
+
/*
1188
+
* We have nothing to run. This can be due to:
1189
+
*/
1190
+
ret = info->last_error;
1191
+
if (ret) {
1192
+
/* 1) Misconfiguration */
1193
+
pr_err("Channel misconfigured, can't continue\n");
1194
+
mutex_unlock(&info->lock);
1195
+
return ret;
1196
+
} else {
1197
+
/* 2) We rely on defaults */
1198
+
pr_info("No channels configured, continue with any\n");
1199
+
if (!is_threaded_test_run(info))
1200
+
stop_threaded_test(info);
1201
+
add_threaded_test(info);
1202
+
}
1193
1203
}
1194
1204
start_threaded_tests(info);
1195
1205
} else {
···
1218
1204
struct dmatest_info *info = &test_info;
1219
1205
struct dmatest_chan *dtc;
1220
1206
char chan_reset_val[20];
1221
-
int ret = 0;
1207
+
int ret;
1222
1208
1223
1209
mutex_lock(&info->lock);
1224
1210
ret = param_set_copystring(val, kp);
···
1273
1259
goto add_chan_err;
1274
1260
}
1275
1261
1262
+
info->last_error = ret;
1276
1263
mutex_unlock(&info->lock);
1277
1264
1278
1265
return ret;
1279
1266
1280
1267
add_chan_err:
1281
1268
param_set_copystring(chan_reset_val, kp);
1269
+
info->last_error = ret;
1282
1270
mutex_unlock(&info->lock);
1283
1271
1284
1272
return ret;
+1
-1
drivers/gpio/gpio-amd-fch.c
+1
-1
drivers/gpio/gpio-amd-fch.c
···
92
92
ret = (readl_relaxed(ptr) & AMD_FCH_GPIO_FLAG_DIRECTION);
93
93
spin_unlock_irqrestore(&priv->lock, flags);
94
94
95
-
return ret ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT;
95
+
return ret ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
96
96
}
97
97
98
98
static void amd_fch_gpio_set(struct gpio_chip *gc,
+87
-47
drivers/gpio/gpio-aspeed-sgpio.c
+87
-47
drivers/gpio/gpio-aspeed-sgpio.c
···
17
17
#include <linux/spinlock.h>
18
18
#include <linux/string.h>
19
19
20
-
#define MAX_NR_SGPIO 80
20
+
/*
21
+
* MAX_NR_HW_GPIO represents the number of actual hardware-supported GPIOs (ie,
22
+
* slots within the clocked serial GPIO data). Since each HW GPIO is both an
23
+
* input and an output, we provide MAX_NR_HW_GPIO * 2 lines on our gpiochip
24
+
* device.
25
+
*
26
+
* We use SGPIO_OUTPUT_OFFSET to define the split between the inputs and
27
+
* outputs; the inputs start at line 0, the outputs start at OUTPUT_OFFSET.
28
+
*/
29
+
#define MAX_NR_HW_SGPIO 80
30
+
#define SGPIO_OUTPUT_OFFSET MAX_NR_HW_SGPIO
21
31
22
32
#define ASPEED_SGPIO_CTRL 0x54
23
33
···
40
30
struct clk *pclk;
41
31
spinlock_t lock;
42
32
void __iomem *base;
43
-
uint32_t dir_in[3];
44
33
int irq;
34
+
int n_sgpio;
45
35
};
46
36
47
37
struct aspeed_sgpio_bank {
···
121
111
}
122
112
}
123
113
124
-
#define GPIO_BANK(x) ((x) >> 5)
125
-
#define GPIO_OFFSET(x) ((x) & 0x1f)
114
+
#define GPIO_BANK(x) ((x % SGPIO_OUTPUT_OFFSET) >> 5)
115
+
#define GPIO_OFFSET(x) ((x % SGPIO_OUTPUT_OFFSET) & 0x1f)
126
116
#define GPIO_BIT(x) BIT(GPIO_OFFSET(x))
127
117
128
118
static const struct aspeed_sgpio_bank *to_bank(unsigned int offset)
129
119
{
130
-
unsigned int bank = GPIO_BANK(offset);
120
+
unsigned int bank;
121
+
122
+
bank = GPIO_BANK(offset);
131
123
132
124
WARN_ON(bank >= ARRAY_SIZE(aspeed_sgpio_banks));
133
125
return &aspeed_sgpio_banks[bank];
126
+
}
127
+
128
+
static int aspeed_sgpio_init_valid_mask(struct gpio_chip *gc,
129
+
unsigned long *valid_mask, unsigned int ngpios)
130
+
{
131
+
struct aspeed_sgpio *sgpio = gpiochip_get_data(gc);
132
+
int n = sgpio->n_sgpio;
133
+
int c = SGPIO_OUTPUT_OFFSET - n;
134
+
135
+
WARN_ON(ngpios < MAX_NR_HW_SGPIO * 2);
136
+
137
+
/* input GPIOs in the lower range */
138
+
bitmap_set(valid_mask, 0, n);
139
+
bitmap_clear(valid_mask, n, c);
140
+
141
+
/* output GPIOS above SGPIO_OUTPUT_OFFSET */
142
+
bitmap_set(valid_mask, SGPIO_OUTPUT_OFFSET, n);
143
+
bitmap_clear(valid_mask, SGPIO_OUTPUT_OFFSET + n, c);
144
+
145
+
return 0;
146
+
}
147
+
148
+
static void aspeed_sgpio_irq_init_valid_mask(struct gpio_chip *gc,
149
+
unsigned long *valid_mask, unsigned int ngpios)
150
+
{
151
+
struct aspeed_sgpio *sgpio = gpiochip_get_data(gc);
152
+
int n = sgpio->n_sgpio;
153
+
154
+
WARN_ON(ngpios < MAX_NR_HW_SGPIO * 2);
155
+
156
+
/* input GPIOs in the lower range */
157
+
bitmap_set(valid_mask, 0, n);
158
+
bitmap_clear(valid_mask, n, ngpios - n);
159
+
}
160
+
161
+
static bool aspeed_sgpio_is_input(unsigned int offset)
162
+
{
163
+
return offset < SGPIO_OUTPUT_OFFSET;
134
164
}
135
165
136
166
static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset)
···
179
129
const struct aspeed_sgpio_bank *bank = to_bank(offset);
180
130
unsigned long flags;
181
131
enum aspeed_sgpio_reg reg;
182
-
bool is_input;
183
132
int rc = 0;
184
133
185
134
spin_lock_irqsave(&gpio->lock, flags);
186
135
187
-
is_input = gpio->dir_in[GPIO_BANK(offset)] & GPIO_BIT(offset);
188
-
reg = is_input ? reg_val : reg_rdata;
136
+
reg = aspeed_sgpio_is_input(offset) ? reg_val : reg_rdata;
189
137
rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
190
138
191
139
spin_unlock_irqrestore(&gpio->lock, flags);
···
191
143
return rc;
192
144
}
193
145
194
-
static void sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val)
146
+
static int sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val)
195
147
{
196
148
struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
197
149
const struct aspeed_sgpio_bank *bank = to_bank(offset);
198
-
void __iomem *addr;
150
+
void __iomem *addr_r, *addr_w;
199
151
u32 reg = 0;
200
152
201
-
addr = bank_reg(gpio, bank, reg_val);
202
-
reg = ioread32(addr);
153
+
if (aspeed_sgpio_is_input(offset))
154
+
return -EINVAL;
155
+
156
+
/* Since this is an output, read the cached value from rdata, then
157
+
* update val. */
158
+
addr_r = bank_reg(gpio, bank, reg_rdata);
159
+
addr_w = bank_reg(gpio, bank, reg_val);
160
+
161
+
reg = ioread32(addr_r);
203
162
204
163
if (val)
205
164
reg |= GPIO_BIT(offset);
206
165
else
207
166
reg &= ~GPIO_BIT(offset);
208
167
209
-
iowrite32(reg, addr);
168
+
iowrite32(reg, addr_w);
169
+
170
+
return 0;
210
171
}
211
172
212
173
static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)
···
232
175
233
176
static int aspeed_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset)
234
177
{
235
-
struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
236
-
unsigned long flags;
237
-
238
-
spin_lock_irqsave(&gpio->lock, flags);
239
-
gpio->dir_in[GPIO_BANK(offset)] |= GPIO_BIT(offset);
240
-
spin_unlock_irqrestore(&gpio->lock, flags);
241
-
242
-
return 0;
178
+
return aspeed_sgpio_is_input(offset) ? 0 : -EINVAL;
243
179
}
244
180
245
181
static int aspeed_sgpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val)
246
182
{
247
183
struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
248
184
unsigned long flags;
185
+
int rc;
186
+
187
+
/* No special action is required for setting the direction; we'll
188
+
* error-out in sgpio_set_value if this isn't an output GPIO */
249
189
250
190
spin_lock_irqsave(&gpio->lock, flags);
251
-
252
-
gpio->dir_in[GPIO_BANK(offset)] &= ~GPIO_BIT(offset);
253
-
sgpio_set_value(gc, offset, val);
254
-
191
+
rc = sgpio_set_value(gc, offset, val);
255
192
spin_unlock_irqrestore(&gpio->lock, flags);
256
193
257
-
return 0;
194
+
return rc;
258
195
}
259
196
260
197
static int aspeed_sgpio_get_direction(struct gpio_chip *gc, unsigned int offset)
261
198
{
262
-
int dir_status;
263
-
struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
264
-
unsigned long flags;
265
-
266
-
spin_lock_irqsave(&gpio->lock, flags);
267
-
dir_status = gpio->dir_in[GPIO_BANK(offset)] & GPIO_BIT(offset);
268
-
spin_unlock_irqrestore(&gpio->lock, flags);
269
-
270
-
return dir_status;
271
-
199
+
return !!aspeed_sgpio_is_input(offset);
272
200
}
273
201
274
202
static void irqd_to_aspeed_sgpio_data(struct irq_data *d,
···
444
402
445
403
irq = &gpio->chip.irq;
446
404
irq->chip = &aspeed_sgpio_irqchip;
405
+
irq->init_valid_mask = aspeed_sgpio_irq_init_valid_mask;
447
406
irq->handler = handle_bad_irq;
448
407
irq->default_type = IRQ_TYPE_NONE;
449
408
irq->parent_handler = aspeed_sgpio_irq_handler;
···
452
409
irq->parents = &gpio->irq;
453
410
irq->num_parents = 1;
454
411
455
-
/* set IRQ settings and Enable Interrupt */
412
+
/* Apply default IRQ settings */
456
413
for (i = 0; i < ARRAY_SIZE(aspeed_sgpio_banks); i++) {
457
414
bank = &aspeed_sgpio_banks[i];
458
415
/* set falling or level-low irq */
459
416
iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type0));
460
417
/* trigger type is edge */
461
418
iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type1));
462
-
/* dual edge trigger mode. */
463
-
iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_type2));
464
-
/* enable irq */
465
-
iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_enable));
419
+
/* single edge trigger */
420
+
iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type2));
466
421
}
467
422
468
423
return 0;
···
493
452
if (rc < 0) {
494
453
dev_err(&pdev->dev, "Could not read ngpios property\n");
495
454
return -EINVAL;
496
-
} else if (nr_gpios > MAX_NR_SGPIO) {
455
+
} else if (nr_gpios > MAX_NR_HW_SGPIO) {
497
456
dev_err(&pdev->dev, "Number of GPIOs exceeds the maximum of %d: %d\n",
498
-
MAX_NR_SGPIO, nr_gpios);
457
+
MAX_NR_HW_SGPIO, nr_gpios);
499
458
return -EINVAL;
500
459
}
460
+
gpio->n_sgpio = nr_gpios;
501
461
502
462
rc = of_property_read_u32(pdev->dev.of_node, "bus-frequency", &sgpio_freq);
503
463
if (rc < 0) {
···
539
497
spin_lock_init(&gpio->lock);
540
498
541
499
gpio->chip.parent = &pdev->dev;
542
-
gpio->chip.ngpio = nr_gpios;
500
+
gpio->chip.ngpio = MAX_NR_HW_SGPIO * 2;
501
+
gpio->chip.init_valid_mask = aspeed_sgpio_init_valid_mask;
543
502
gpio->chip.direction_input = aspeed_sgpio_dir_in;
544
503
gpio->chip.direction_output = aspeed_sgpio_dir_out;
545
504
gpio->chip.get_direction = aspeed_sgpio_get_direction;
···
551
508
gpio->chip.set_config = NULL;
552
509
gpio->chip.label = dev_name(&pdev->dev);
553
510
gpio->chip.base = -1;
554
-
555
-
/* set all SGPIO pins as input (1). */
556
-
memset(gpio->dir_in, 0xff, sizeof(gpio->dir_in));
557
511
558
512
aspeed_sgpio_setup_irqs(gpio, pdev);
559
513
+2
-2
drivers/gpio/gpio-aspeed.c
+2
-2
drivers/gpio/gpio-aspeed.c
···
1114
1114
1115
1115
static const struct aspeed_bank_props ast2600_bank_props[] = {
1116
1116
/* input output */
1117
-
{5, 0xffffffff, 0x0000ffff}, /* U/V/W/X */
1118
-
{6, 0xffff0000, 0x0fff0000}, /* Y/Z */
1117
+
{5, 0xffffffff, 0xffffff00}, /* U/V/W/X */
1118
+
{6, 0x0000ffff, 0x0000ffff}, /* Y/Z */
1119
1119
{ },
1120
1120
};
1121
1121
+2
drivers/gpio/gpio-mockup.c
+2
drivers/gpio/gpio-mockup.c
···
552
552
err = platform_driver_register(&gpio_mockup_driver);
553
553
if (err) {
554
554
gpio_mockup_err("error registering platform driver\n");
555
+
debugfs_remove_recursive(gpio_mockup_dbg_dir);
555
556
return err;
556
557
}
557
558
···
583
582
gpio_mockup_err("error registering device");
584
583
platform_driver_unregister(&gpio_mockup_driver);
585
584
gpio_mockup_unregister_pdevs();
585
+
debugfs_remove_recursive(gpio_mockup_dbg_dir);
586
586
return PTR_ERR(pdev);
587
587
}
588
588
+2
-2
drivers/gpio/gpio-omap.c
+2
-2
drivers/gpio/gpio-omap.c
···
1516
1516
return 0;
1517
1517
}
1518
1518
1519
-
static int omap_gpio_suspend(struct device *dev)
1519
+
static int __maybe_unused omap_gpio_suspend(struct device *dev)
1520
1520
{
1521
1521
struct gpio_bank *bank = dev_get_drvdata(dev);
1522
1522
···
1528
1528
return omap_gpio_runtime_suspend(dev);
1529
1529
}
1530
1530
1531
-
static int omap_gpio_resume(struct device *dev)
1531
+
static int __maybe_unused omap_gpio_resume(struct device *dev)
1532
1532
{
1533
1533
struct gpio_bank *bank = dev_get_drvdata(dev);
1534
1534
+6
-1
drivers/gpio/gpio-pca953x.c
+6
-1
drivers/gpio/gpio-pca953x.c
···
818
818
int level;
819
819
bool ret;
820
820
821
+
bitmap_zero(pending, MAX_LINE);
822
+
821
823
mutex_lock(&chip->i2c_lock);
822
824
ret = pca953x_irq_pending(chip, pending);
823
825
mutex_unlock(&chip->i2c_lock);
···
942
940
static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
943
941
{
944
942
DECLARE_BITMAP(val, MAX_LINE);
943
+
unsigned int i;
945
944
int ret;
946
945
947
946
ret = device_pca95xx_init(chip, invert);
···
950
947
goto out;
951
948
952
949
/* To enable register 6, 7 to control pull up and pull down */
953
-
memset(val, 0x02, NBANK(chip));
950
+
for (i = 0; i < NBANK(chip); i++)
951
+
bitmap_set_value8(val, 0x02, i * BANK_SZ);
952
+
954
953
ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
955
954
if (ret)
956
955
goto out;
+1
drivers/gpio/gpio-siox.c
+1
drivers/gpio/gpio-siox.c
+3
drivers/gpio/gpio-sprd.c
+3
drivers/gpio/gpio-sprd.c
···
149
149
sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
150
150
sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
151
151
sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 1);
152
+
sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
152
153
irq_set_handler_locked(data, handle_edge_irq);
153
154
break;
154
155
case IRQ_TYPE_EDGE_FALLING:
155
156
sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
156
157
sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
157
158
sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 0);
159
+
sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
158
160
irq_set_handler_locked(data, handle_edge_irq);
159
161
break;
160
162
case IRQ_TYPE_EDGE_BOTH:
161
163
sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
162
164
sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 1);
165
+
sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
163
166
irq_set_handler_locked(data, handle_edge_irq);
164
167
break;
165
168
case IRQ_TYPE_LEVEL_HIGH:
+1
-1
drivers/gpio/gpio-tc3589x.c
+1
-1
drivers/gpio/gpio-tc3589x.c
+30
-4
drivers/gpio/gpiolib-cdev.c
+30
-4
drivers/gpio/gpiolib-cdev.c
···
423
423
return events;
424
424
}
425
425
426
+
static ssize_t lineevent_get_size(void)
427
+
{
428
+
#ifdef __x86_64__
429
+
/* i386 has no padding after 'id' */
430
+
if (in_ia32_syscall()) {
431
+
struct compat_gpioeevent_data {
432
+
compat_u64 timestamp;
433
+
u32 id;
434
+
};
435
+
436
+
return sizeof(struct compat_gpioeevent_data);
437
+
}
438
+
#endif
439
+
return sizeof(struct gpioevent_data);
440
+
}
426
441
427
442
static ssize_t lineevent_read(struct file *file,
428
443
char __user *buf,
···
447
432
struct lineevent_state *le = file->private_data;
448
433
struct gpioevent_data ge;
449
434
ssize_t bytes_read = 0;
435
+
ssize_t ge_size;
450
436
int ret;
451
437
452
-
if (count < sizeof(ge))
438
+
/*
439
+
* When compatible system call is being used the struct gpioevent_data,
440
+
* in case of at least ia32, has different size due to the alignment
441
+
* differences. Because we have first member 64 bits followed by one of
442
+
* 32 bits there is no gap between them. The only difference is the
443
+
* padding at the end of the data structure. Hence, we calculate the
444
+
* actual sizeof() and pass this as an argument to copy_to_user() to
445
+
* drop unneeded bytes from the output.
446
+
*/
447
+
ge_size = lineevent_get_size();
448
+
if (count < ge_size)
453
449
return -EINVAL;
454
450
455
451
do {
···
496
470
break;
497
471
}
498
472
499
-
if (copy_to_user(buf + bytes_read, &ge, sizeof(ge)))
473
+
if (copy_to_user(buf + bytes_read, &ge, ge_size))
500
474
return -EFAULT;
501
-
bytes_read += sizeof(ge);
502
-
} while (count >= bytes_read + sizeof(ge));
475
+
bytes_read += ge_size;
476
+
} while (count >= bytes_read + ge_size);
503
477
504
478
return bytes_read;
505
479
}
+2
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+2
-8
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
···
80
80
MODULE_FIRMWARE("amdgpu/navi10_gpu_info.bin");
81
81
MODULE_FIRMWARE("amdgpu/navi14_gpu_info.bin");
82
82
MODULE_FIRMWARE("amdgpu/navi12_gpu_info.bin");
83
-
MODULE_FIRMWARE("amdgpu/sienna_cichlid_gpu_info.bin");
84
-
MODULE_FIRMWARE("amdgpu/navy_flounder_gpu_info.bin");
85
83
86
84
#define AMDGPU_RESUME_MS 2000
87
85
···
1598
1600
case CHIP_CARRIZO:
1599
1601
case CHIP_STONEY:
1600
1602
case CHIP_VEGA20:
1603
+
case CHIP_SIENNA_CICHLID:
1604
+
case CHIP_NAVY_FLOUNDER:
1601
1605
default:
1602
1606
return 0;
1603
1607
case CHIP_VEGA10:
···
1630
1630
break;
1631
1631
case CHIP_NAVI12:
1632
1632
chip_name = "navi12";
1633
-
break;
1634
-
case CHIP_SIENNA_CICHLID:
1635
-
chip_name = "sienna_cichlid";
1636
-
break;
1637
-
case CHIP_NAVY_FLOUNDER:
1638
-
chip_name = "navy_flounder";
1639
1633
break;
1640
1634
}
1641
1635
+1
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+1
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+10
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+10
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
···
1044
1044
{0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
1045
1045
1046
1046
/* Navi12 */
1047
-
{0x1002, 0x7360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12|AMD_EXP_HW_SUPPORT},
1048
-
{0x1002, 0x7362, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12|AMD_EXP_HW_SUPPORT},
1047
+
{0x1002, 0x7360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12},
1048
+
{0x1002, 0x7362, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12},
1049
+
1050
+
/* Sienna_Cichlid */
1051
+
{0x1002, 0x73A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1052
+
{0x1002, 0x73A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1053
+
{0x1002, 0x73A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1054
+
{0x1002, 0x73AB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1055
+
{0x1002, 0x73AE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1056
+
{0x1002, 0x73BF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
1049
1057
1050
1058
{0, 0, 0}
1051
1059
};
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+3
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+3
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+8
-8
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+8
-8
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
···
746
746
| UVD_SUVD_CGC_GATE__IME_HEVC_MASK
747
747
| UVD_SUVD_CGC_GATE__EFC_MASK
748
748
| UVD_SUVD_CGC_GATE__SAOE_MASK
749
-
| 0x08000000
749
+
| UVD_SUVD_CGC_GATE__SRE_AV1_MASK
750
750
| UVD_SUVD_CGC_GATE__FBC_PCLK_MASK
751
751
| UVD_SUVD_CGC_GATE__FBC_CCLK_MASK
752
-
| 0x40000000
752
+
| UVD_SUVD_CGC_GATE__SCM_AV1_MASK
753
753
| UVD_SUVD_CGC_GATE__SMPA_MASK);
754
754
WREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_GATE, data);
755
755
756
756
data = RREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_GATE2);
757
757
data |= (UVD_SUVD_CGC_GATE2__MPBE0_MASK
758
758
| UVD_SUVD_CGC_GATE2__MPBE1_MASK
759
-
| 0x00000004
760
-
| 0x00000008
759
+
| UVD_SUVD_CGC_GATE2__SIT_AV1_MASK
760
+
| UVD_SUVD_CGC_GATE2__SDB_AV1_MASK
761
761
| UVD_SUVD_CGC_GATE2__MPC1_MASK);
762
762
WREG32_SOC15(VCN, inst, mmUVD_SUVD_CGC_GATE2, data);
763
763
···
776
776
| UVD_SUVD_CGC_CTRL__SMPA_MODE_MASK
777
777
| UVD_SUVD_CGC_CTRL__MPBE0_MODE_MASK
778
778
| UVD_SUVD_CGC_CTRL__MPBE1_MODE_MASK
779
-
| 0x00008000
780
-
| 0x00010000
779
+
| UVD_SUVD_CGC_CTRL__SIT_AV1_MODE_MASK
780
+
| UVD_SUVD_CGC_CTRL__SDB_AV1_MODE_MASK
781
781
| UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK
782
782
| UVD_SUVD_CGC_CTRL__FBC_PCLK_MASK
783
783
| UVD_SUVD_CGC_CTRL__FBC_CCLK_MASK);
···
892
892
| UVD_SUVD_CGC_CTRL__SMPA_MODE_MASK
893
893
| UVD_SUVD_CGC_CTRL__MPBE0_MODE_MASK
894
894
| UVD_SUVD_CGC_CTRL__MPBE1_MODE_MASK
895
-
| 0x00008000
896
-
| 0x00010000
895
+
| UVD_SUVD_CGC_CTRL__SIT_AV1_MODE_MASK
896
+
| UVD_SUVD_CGC_CTRL__SDB_AV1_MODE_MASK
897
897
| UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK
898
898
| UVD_SUVD_CGC_CTRL__FBC_PCLK_MASK
899
899
| UVD_SUVD_CGC_CTRL__FBC_CCLK_MASK);
+1
-1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
+1
-1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
···
604
604
int i = 0;
605
605
606
606
hdcp_work = kcalloc(max_caps, sizeof(*hdcp_work), GFP_KERNEL);
607
-
if (hdcp_work == NULL)
607
+
if (ZERO_OR_NULL_PTR(hdcp_work))
608
608
return NULL;
609
609
610
610
hdcp_work->srm = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, sizeof(*hdcp_work->srm), GFP_KERNEL);
-1
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
-1
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
···
783
783
} else {
784
784
struct clk_log_info log_info = {0};
785
785
786
-
clk_mgr->smu_ver = rn_vbios_smu_get_smu_version(clk_mgr);
787
786
clk_mgr->periodic_retraining_disabled = rn_vbios_smu_is_periodic_retraining_disabled(clk_mgr);
788
787
789
788
/* SMU Version 55.51.0 and up no longer have an issue
+16
-2
drivers/gpu/drm/amd/display/dc/dcn30/Makefile
+16
-2
drivers/gpu/drm/amd/display/dc/dcn30/Makefile
···
31
31
dcn30_dio_link_encoder.o dcn30_resource.o
32
32
33
33
34
-
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_optc.o := -mhard-float -msse -mpreferred-stack-boundary=4
35
-
34
+
ifdef CONFIG_X86
36
35
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_resource.o := -mhard-float -msse
36
+
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_optc.o := -mhard-float -msse
37
+
endif
38
+
39
+
ifdef CONFIG_PPC64
40
+
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_resource.o := -mhard-float -maltivec
41
+
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_optc.o := -mhard-float -maltivec
42
+
endif
43
+
44
+
ifdef CONFIG_ARM64
45
+
CFLAGS_REMOVE_$(AMDDALPATH)/dc/dcn30/dcn30_resource.o := -mgeneral-regs-only
46
+
CFLAGS_REMOVE_$(AMDDALPATH)/dc/dcn30/dcn30_optc.o := -mgeneral-regs-only
47
+
endif
48
+
37
49
ifdef CONFIG_CC_IS_GCC
38
50
ifeq ($(call cc-ifversion, -lt, 0701, y), y)
39
51
IS_OLD_GCC = 1
···
57
45
# GCC < 7.1 cannot compile code using `double` and -mpreferred-stack-boundary=3
58
46
# (8B stack alignment).
59
47
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_resource.o += -mpreferred-stack-boundary=4
48
+
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_optc.o += -mpreferred-stack-boundary=4
60
49
else
61
50
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_resource.o += -msse2
51
+
CFLAGS_$(AMDDALPATH)/dc/dcn30/dcn30_optc.o += -msse2
62
52
endif
63
53
64
54
AMD_DAL_DCN30 = $(addprefix $(AMDDALPATH)/dc/dcn30/,$(DCN30))
+2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_default.h
+2
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_default.h
···
2727
2727
#define mmDB_STENCIL_WRITE_BASE_DEFAULT 0x00000000
2728
2728
#define mmDB_RESERVED_REG_1_DEFAULT 0x00000000
2729
2729
#define mmDB_RESERVED_REG_3_DEFAULT 0x00000000
2730
+
#define mmDB_VRS_OVERRIDE_CNTL_DEFAULT 0x00000000
2730
2731
#define mmDB_Z_READ_BASE_HI_DEFAULT 0x00000000
2731
2732
#define mmDB_STENCIL_READ_BASE_HI_DEFAULT 0x00000000
2732
2733
#define mmDB_Z_WRITE_BASE_HI_DEFAULT 0x00000000
···
3063
3062
#define mmPA_SU_OVER_RASTERIZATION_CNTL_DEFAULT 0x00000000
3064
3063
#define mmPA_STEREO_CNTL_DEFAULT 0x00000000
3065
3064
#define mmPA_STATE_STEREO_X_DEFAULT 0x00000000
3065
+
#define mmPA_CL_VRS_CNTL_DEFAULT 0x00000000
3066
3066
#define mmPA_SU_POINT_SIZE_DEFAULT 0x00000000
3067
3067
#define mmPA_SU_POINT_MINMAX_DEFAULT 0x00000000
3068
3068
#define mmPA_SU_LINE_CNTL_DEFAULT 0x00000000
+4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
+4
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h
···
5379
5379
#define mmDB_RESERVED_REG_1_BASE_IDX 1
5380
5380
#define mmDB_RESERVED_REG_3 0x0017
5381
5381
#define mmDB_RESERVED_REG_3_BASE_IDX 1
5382
+
#define mmDB_VRS_OVERRIDE_CNTL 0x0019
5383
+
#define mmDB_VRS_OVERRIDE_CNTL_BASE_IDX 1
5382
5384
#define mmDB_Z_READ_BASE_HI 0x001a
5383
5385
#define mmDB_Z_READ_BASE_HI_BASE_IDX 1
5384
5386
#define mmDB_STENCIL_READ_BASE_HI 0x001b
···
6051
6049
#define mmPA_STEREO_CNTL_BASE_IDX 1
6052
6050
#define mmPA_STATE_STEREO_X 0x0211
6053
6051
#define mmPA_STATE_STEREO_X_BASE_IDX 1
6052
+
#define mmPA_CL_VRS_CNTL 0x0212
6053
+
#define mmPA_CL_VRS_CNTL_BASE_IDX 1
6054
6054
#define mmPA_SU_POINT_SIZE 0x0280
6055
6055
#define mmPA_SU_POINT_SIZE_BASE_IDX 1
6056
6056
#define mmPA_SU_POINT_MINMAX 0x0281
+50
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h
+50
drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h
···
9777
9777
#define DB_EXCEPTION_CONTROL__AUTO_FLUSH_HTILE__SHIFT 0x3
9778
9778
#define DB_EXCEPTION_CONTROL__AUTO_FLUSH_QUAD__SHIFT 0x4
9779
9779
#define DB_EXCEPTION_CONTROL__FORCE_SUMMARIZE__SHIFT 0x8
9780
+
#define DB_EXCEPTION_CONTROL__FORCE_VRS_RATE_FINE__SHIFT 0x10
9780
9781
#define DB_EXCEPTION_CONTROL__DTAG_WATERMARK__SHIFT 0x18
9781
9782
#define DB_EXCEPTION_CONTROL__EARLY_Z_PANIC_DISABLE_MASK 0x00000001L
9782
9783
#define DB_EXCEPTION_CONTROL__LATE_Z_PANIC_DISABLE_MASK 0x00000002L
···
9785
9784
#define DB_EXCEPTION_CONTROL__AUTO_FLUSH_HTILE_MASK 0x00000008L
9786
9785
#define DB_EXCEPTION_CONTROL__AUTO_FLUSH_QUAD_MASK 0x00000010L
9787
9786
#define DB_EXCEPTION_CONTROL__FORCE_SUMMARIZE_MASK 0x00000F00L
9787
+
#define DB_EXCEPTION_CONTROL__FORCE_VRS_RATE_FINE_MASK 0x00FF0000L
9788
9788
#define DB_EXCEPTION_CONTROL__DTAG_WATERMARK_MASK 0x7F000000L
9789
9789
//DB_DFSM_CONFIG
9790
9790
#define DB_DFSM_CONFIG__BYPASS_DFSM__SHIFT 0x0
···
10078
10076
#define CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_CM__SHIFT 0x18
10079
10077
#define CB_HW_CONTROL_3__DISABLE_NACK_COLOR_RD_WR_OPT__SHIFT 0x19
10080
10078
#define CB_HW_CONTROL_3__DISABLE_BLENDER_CLOCK_GATING__SHIFT 0x1a
10079
+
#define CB_HW_CONTROL_3__DISABLE_DCC_VRS_OPT__SHIFT 0x1c
10081
10080
#define CB_HW_CONTROL_3__DISABLE_FMASK_NOFETCH_OPT__SHIFT 0x1e
10082
10081
#define CB_HW_CONTROL_3__DISABLE_FMASK_NOFETCH_OPT_BC__SHIFT 0x1f
10083
10082
#define CB_HW_CONTROL_3__DISABLE_SLOW_MODE_EMPTY_HALF_QUAD_KILL_MASK 0x00000001L
···
10106
10103
#define CB_HW_CONTROL_3__DISABLE_NACK_PROCESSING_CM_MASK 0x01000000L
10107
10104
#define CB_HW_CONTROL_3__DISABLE_NACK_COLOR_RD_WR_OPT_MASK 0x02000000L
10108
10105
#define CB_HW_CONTROL_3__DISABLE_BLENDER_CLOCK_GATING_MASK 0x04000000L
10106
+
#define CB_HW_CONTROL_3__DISABLE_DCC_VRS_OPT_MASK 0x10000000L
10109
10107
#define CB_HW_CONTROL_3__DISABLE_FMASK_NOFETCH_OPT_MASK 0x40000000L
10110
10108
#define CB_HW_CONTROL_3__DISABLE_FMASK_NOFETCH_OPT_BC_MASK 0x80000000L
10111
10109
//CB_HW_CONTROL
10112
10110
#define CB_HW_CONTROL__ALLOW_MRT_WITH_DUAL_SOURCE__SHIFT 0x0
10111
+
#define CB_HW_CONTROL__DISABLE_VRS_FILLRATE_OPTIMIZATION__SHIFT 0x1
10113
10112
#define CB_HW_CONTROL__DISABLE_FILLRATE_OPT_FIX_WITH_CFC__SHIFT 0x3
10114
10113
#define CB_HW_CONTROL__DISABLE_POST_DCC_WITH_CFC_FIX__SHIFT 0x4
10114
+
#define CB_HW_CONTROL__DISABLE_COMPRESS_1FRAG_WHEN_VRS_RATE_HINT_EN__SHIFT 0x5
10115
10115
#define CB_HW_CONTROL__RMI_CREDITS__SHIFT 0x6
10116
10116
#define CB_HW_CONTROL__CHICKEN_BITS__SHIFT 0xc
10117
10117
#define CB_HW_CONTROL__DISABLE_FMASK_MULTI_MGCG_DOMAINS__SHIFT 0xf
···
10135
10129
#define CB_HW_CONTROL__DISABLE_CC_IB_SERIALIZER_STATE_OPT__SHIFT 0x1e
10136
10130
#define CB_HW_CONTROL__DISABLE_PIXEL_IN_QUAD_FIX_FOR_LINEAR_SURFACE__SHIFT 0x1f
10137
10131
#define CB_HW_CONTROL__ALLOW_MRT_WITH_DUAL_SOURCE_MASK 0x00000001L
10132
+
#define CB_HW_CONTROL__DISABLE_VRS_FILLRATE_OPTIMIZATION_MASK 0x00000002L
10138
10133
#define CB_HW_CONTROL__DISABLE_FILLRATE_OPT_FIX_WITH_CFC_MASK 0x00000008L
10139
10134
#define CB_HW_CONTROL__DISABLE_POST_DCC_WITH_CFC_FIX_MASK 0x00000010L
10135
+
#define CB_HW_CONTROL__DISABLE_COMPRESS_1FRAG_WHEN_VRS_RATE_HINT_EN_MASK 0x00000020L
10140
10136
#define CB_HW_CONTROL__RMI_CREDITS_MASK 0x00000FC0L
10141
10137
#define CB_HW_CONTROL__CHICKEN_BITS_MASK 0x00007000L
10142
10138
#define CB_HW_CONTROL__DISABLE_FMASK_MULTI_MGCG_DOMAINS_MASK 0x00008000L
···
19889
19881
#define DB_RENDER_OVERRIDE2__PRESERVE_SRESULTS__SHIFT 0x16
19890
19882
#define DB_RENDER_OVERRIDE2__DISABLE_FAST_PASS__SHIFT 0x17
19891
19883
#define DB_RENDER_OVERRIDE2__ALLOW_PARTIAL_RES_HIER_KILL__SHIFT 0x19
19884
+
#define DB_RENDER_OVERRIDE2__FORCE_VRS_RATE_FINE__SHIFT 0x1a
19892
19885
#define DB_RENDER_OVERRIDE2__CENTROID_COMPUTATION_MODE__SHIFT 0x1b
19893
19886
#define DB_RENDER_OVERRIDE2__PARTIAL_SQUAD_LAUNCH_CONTROL_MASK 0x00000003L
19894
19887
#define DB_RENDER_OVERRIDE2__PARTIAL_SQUAD_LAUNCH_COUNTDOWN_MASK 0x0000001CL
···
19907
19898
#define DB_RENDER_OVERRIDE2__PRESERVE_SRESULTS_MASK 0x00400000L
19908
19899
#define DB_RENDER_OVERRIDE2__DISABLE_FAST_PASS_MASK 0x00800000L
19909
19900
#define DB_RENDER_OVERRIDE2__ALLOW_PARTIAL_RES_HIER_KILL_MASK 0x02000000L
19901
+
#define DB_RENDER_OVERRIDE2__FORCE_VRS_RATE_FINE_MASK 0x04000000L
19910
19902
#define DB_RENDER_OVERRIDE2__CENTROID_COMPUTATION_MODE_MASK 0x18000000L
19911
19903
//DB_HTILE_DATA_BASE
19912
19904
#define DB_HTILE_DATA_BASE__BASE_256B__SHIFT 0x0
···
20031
20021
//DB_RESERVED_REG_3
20032
20022
#define DB_RESERVED_REG_3__FIELD_1__SHIFT 0x0
20033
20023
#define DB_RESERVED_REG_3__FIELD_1_MASK 0x003FFFFFL
20024
+
//DB_VRS_OVERRIDE_CNTL
20025
+
#define DB_VRS_OVERRIDE_CNTL__VRS_OVERRIDE_RATE_COMBINER_MODE__SHIFT 0x0
20026
+
#define DB_VRS_OVERRIDE_CNTL__VRS_OVERRIDE_RATE_X__SHIFT 0x4
20027
+
#define DB_VRS_OVERRIDE_CNTL__VRS_OVERRIDE_RATE_Y__SHIFT 0x6
20028
+
#define DB_VRS_OVERRIDE_CNTL__VRS_OVERRIDE_RATE_COMBINER_MODE_MASK 0x00000007L
20029
+
#define DB_VRS_OVERRIDE_CNTL__VRS_OVERRIDE_RATE_X_MASK 0x00000030L
20030
+
#define DB_VRS_OVERRIDE_CNTL__VRS_OVERRIDE_RATE_Y_MASK 0x000000C0L
20034
20031
//DB_Z_READ_BASE_HI
20035
20032
#define DB_Z_READ_BASE_HI__BASE_HI__SHIFT 0x0
20036
20033
#define DB_Z_READ_BASE_HI__BASE_HI_MASK 0x000000FFL
···
22615
22598
#define PA_CL_VS_OUT_CNTL__VS_OUT_MISC_SIDE_BUS_ENA__SHIFT 0x18
22616
22599
#define PA_CL_VS_OUT_CNTL__USE_VTX_GS_CUT_FLAG__SHIFT 0x19
22617
22600
#define PA_CL_VS_OUT_CNTL__USE_VTX_LINE_WIDTH__SHIFT 0x1b
22601
+
#define PA_CL_VS_OUT_CNTL__USE_VTX_VRS_RATE__SHIFT 0x1c
22618
22602
#define PA_CL_VS_OUT_CNTL__BYPASS_VTX_RATE_COMBINER__SHIFT 0x1d
22619
22603
#define PA_CL_VS_OUT_CNTL__BYPASS_PRIM_RATE_COMBINER__SHIFT 0x1e
22620
22604
#define PA_CL_VS_OUT_CNTL__CLIP_DIST_ENA_0_MASK 0x00000001L
···
22645
22627
#define PA_CL_VS_OUT_CNTL__VS_OUT_MISC_SIDE_BUS_ENA_MASK 0x01000000L
22646
22628
#define PA_CL_VS_OUT_CNTL__USE_VTX_GS_CUT_FLAG_MASK 0x02000000L
22647
22629
#define PA_CL_VS_OUT_CNTL__USE_VTX_LINE_WIDTH_MASK 0x08000000L
22630
+
#define PA_CL_VS_OUT_CNTL__USE_VTX_VRS_RATE_MASK 0x10000000L
22648
22631
#define PA_CL_VS_OUT_CNTL__BYPASS_VTX_RATE_COMBINER_MASK 0x20000000L
22649
22632
#define PA_CL_VS_OUT_CNTL__BYPASS_PRIM_RATE_COMBINER_MASK 0x40000000L
22650
22633
//PA_CL_NANINF_CNTL
···
22759
22740
//PA_STATE_STEREO_X
22760
22741
#define PA_STATE_STEREO_X__STEREO_X_OFFSET__SHIFT 0x0
22761
22742
#define PA_STATE_STEREO_X__STEREO_X_OFFSET_MASK 0xFFFFFFFFL
22743
+
//PA_CL_VRS_CNTL
22744
+
#define PA_CL_VRS_CNTL__VERTEX_RATE_COMBINER_MODE__SHIFT 0x0
22745
+
#define PA_CL_VRS_CNTL__PRIMITIVE_RATE_COMBINER_MODE__SHIFT 0x3
22746
+
#define PA_CL_VRS_CNTL__HTILE_RATE_COMBINER_MODE__SHIFT 0x6
22747
+
#define PA_CL_VRS_CNTL__SAMPLE_ITER_COMBINER_MODE__SHIFT 0x9
22748
+
#define PA_CL_VRS_CNTL__EXPOSE_VRS_PIXELS_MASK__SHIFT 0xd
22749
+
#define PA_CL_VRS_CNTL__CMASK_RATE_HINT_FORCE_ZERO__SHIFT 0xe
22750
+
#define PA_CL_VRS_CNTL__VERTEX_RATE_COMBINER_MODE_MASK 0x00000007L
22751
+
#define PA_CL_VRS_CNTL__PRIMITIVE_RATE_COMBINER_MODE_MASK 0x00000038L
22752
+
#define PA_CL_VRS_CNTL__HTILE_RATE_COMBINER_MODE_MASK 0x000001C0L
22753
+
#define PA_CL_VRS_CNTL__SAMPLE_ITER_COMBINER_MODE_MASK 0x00000E00L
22754
+
#define PA_CL_VRS_CNTL__EXPOSE_VRS_PIXELS_MASK_MASK 0x00002000L
22755
+
#define PA_CL_VRS_CNTL__CMASK_RATE_HINT_FORCE_ZERO_MASK 0x00004000L
22762
22756
//PA_SU_POINT_SIZE
22763
22757
#define PA_SU_POINT_SIZE__HEIGHT__SHIFT 0x0
22764
22758
#define PA_SU_POINT_SIZE__WIDTH__SHIFT 0x10
···
23120
23088
#define DB_HTILE_SURFACE__DST_OUTSIDE_ZERO_TO_ONE__SHIFT 0x10
23121
23089
#define DB_HTILE_SURFACE__RESERVED_FIELD_6__SHIFT 0x11
23122
23090
#define DB_HTILE_SURFACE__PIPE_ALIGNED__SHIFT 0x12
23091
+
#define DB_HTILE_SURFACE__VRS_HTILE_ENCODING__SHIFT 0x13
23123
23092
#define DB_HTILE_SURFACE__RESERVED_FIELD_1_MASK 0x00000001L
23124
23093
#define DB_HTILE_SURFACE__FULL_CACHE_MASK 0x00000002L
23125
23094
#define DB_HTILE_SURFACE__RESERVED_FIELD_2_MASK 0x00000004L
···
23130
23097
#define DB_HTILE_SURFACE__DST_OUTSIDE_ZERO_TO_ONE_MASK 0x00010000L
23131
23098
#define DB_HTILE_SURFACE__RESERVED_FIELD_6_MASK 0x00020000L
23132
23099
#define DB_HTILE_SURFACE__PIPE_ALIGNED_MASK 0x00040000L
23100
+
#define DB_HTILE_SURFACE__VRS_HTILE_ENCODING_MASK 0x00180000L
23133
23101
//DB_SRESULTS_COMPARE_STATE0
23134
23102
#define DB_SRESULTS_COMPARE_STATE0__COMPAREFUNC0__SHIFT 0x0
23135
23103
#define DB_SRESULTS_COMPARE_STATE0__COMPAREVALUE0__SHIFT 0x4
···
24988
24954
#define CB_COLOR0_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT 0x1a
24989
24955
#define CB_COLOR0_ATTRIB3__RESOURCE_LEVEL__SHIFT 0x1b
24990
24956
#define CB_COLOR0_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT 0x1e
24957
+
#define CB_COLOR0_ATTRIB3__VRS_RATE_HINT_ENABLE__SHIFT 0x1f
24991
24958
#define CB_COLOR0_ATTRIB3__MIP0_DEPTH_MASK 0x00001FFFL
24992
24959
#define CB_COLOR0_ATTRIB3__META_LINEAR_MASK 0x00002000L
24993
24960
#define CB_COLOR0_ATTRIB3__COLOR_SW_MODE_MASK 0x0007C000L
···
24997
24962
#define CB_COLOR0_ATTRIB3__CMASK_PIPE_ALIGNED_MASK 0x04000000L
24998
24963
#define CB_COLOR0_ATTRIB3__RESOURCE_LEVEL_MASK 0x38000000L
24999
24964
#define CB_COLOR0_ATTRIB3__DCC_PIPE_ALIGNED_MASK 0x40000000L
24965
+
#define CB_COLOR0_ATTRIB3__VRS_RATE_HINT_ENABLE_MASK 0x80000000L
25000
24966
//CB_COLOR1_ATTRIB3
25001
24967
#define CB_COLOR1_ATTRIB3__MIP0_DEPTH__SHIFT 0x0
25002
24968
#define CB_COLOR1_ATTRIB3__META_LINEAR__SHIFT 0xd
···
25007
24971
#define CB_COLOR1_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT 0x1a
25008
24972
#define CB_COLOR1_ATTRIB3__RESOURCE_LEVEL__SHIFT 0x1b
25009
24973
#define CB_COLOR1_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT 0x1e
24974
+
#define CB_COLOR1_ATTRIB3__VRS_RATE_HINT_ENABLE__SHIFT 0x1f
25010
24975
#define CB_COLOR1_ATTRIB3__MIP0_DEPTH_MASK 0x00001FFFL
25011
24976
#define CB_COLOR1_ATTRIB3__META_LINEAR_MASK 0x00002000L
25012
24977
#define CB_COLOR1_ATTRIB3__COLOR_SW_MODE_MASK 0x0007C000L
···
25016
24979
#define CB_COLOR1_ATTRIB3__CMASK_PIPE_ALIGNED_MASK 0x04000000L
25017
24980
#define CB_COLOR1_ATTRIB3__RESOURCE_LEVEL_MASK 0x38000000L
25018
24981
#define CB_COLOR1_ATTRIB3__DCC_PIPE_ALIGNED_MASK 0x40000000L
24982
+
#define CB_COLOR1_ATTRIB3__VRS_RATE_HINT_ENABLE_MASK 0x80000000L
25019
24983
//CB_COLOR2_ATTRIB3
25020
24984
#define CB_COLOR2_ATTRIB3__MIP0_DEPTH__SHIFT 0x0
25021
24985
#define CB_COLOR2_ATTRIB3__META_LINEAR__SHIFT 0xd
···
25026
24988
#define CB_COLOR2_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT 0x1a
25027
24989
#define CB_COLOR2_ATTRIB3__RESOURCE_LEVEL__SHIFT 0x1b
25028
24990
#define CB_COLOR2_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT 0x1e
24991
+
#define CB_COLOR2_ATTRIB3__VRS_RATE_HINT_ENABLE__SHIFT 0x1f
25029
24992
#define CB_COLOR2_ATTRIB3__MIP0_DEPTH_MASK 0x00001FFFL
25030
24993
#define CB_COLOR2_ATTRIB3__META_LINEAR_MASK 0x00002000L
25031
24994
#define CB_COLOR2_ATTRIB3__COLOR_SW_MODE_MASK 0x0007C000L
···
25035
24996
#define CB_COLOR2_ATTRIB3__CMASK_PIPE_ALIGNED_MASK 0x04000000L
25036
24997
#define CB_COLOR2_ATTRIB3__RESOURCE_LEVEL_MASK 0x38000000L
25037
24998
#define CB_COLOR2_ATTRIB3__DCC_PIPE_ALIGNED_MASK 0x40000000L
24999
+
#define CB_COLOR2_ATTRIB3__VRS_RATE_HINT_ENABLE_MASK 0x80000000L
25038
25000
//CB_COLOR3_ATTRIB3
25039
25001
#define CB_COLOR3_ATTRIB3__MIP0_DEPTH__SHIFT 0x0
25040
25002
#define CB_COLOR3_ATTRIB3__META_LINEAR__SHIFT 0xd
···
25045
25005
#define CB_COLOR3_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT 0x1a
25046
25006
#define CB_COLOR3_ATTRIB3__RESOURCE_LEVEL__SHIFT 0x1b
25047
25007
#define CB_COLOR3_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT 0x1e
25008
+
#define CB_COLOR3_ATTRIB3__VRS_RATE_HINT_ENABLE__SHIFT 0x1f
25048
25009
#define CB_COLOR3_ATTRIB3__MIP0_DEPTH_MASK 0x00001FFFL
25049
25010
#define CB_COLOR3_ATTRIB3__META_LINEAR_MASK 0x00002000L
25050
25011
#define CB_COLOR3_ATTRIB3__COLOR_SW_MODE_MASK 0x0007C000L
···
25054
25013
#define CB_COLOR3_ATTRIB3__CMASK_PIPE_ALIGNED_MASK 0x04000000L
25055
25014
#define CB_COLOR3_ATTRIB3__RESOURCE_LEVEL_MASK 0x38000000L
25056
25015
#define CB_COLOR3_ATTRIB3__DCC_PIPE_ALIGNED_MASK 0x40000000L
25016
+
#define CB_COLOR3_ATTRIB3__VRS_RATE_HINT_ENABLE_MASK 0x80000000L
25057
25017
//CB_COLOR4_ATTRIB3
25058
25018
#define CB_COLOR4_ATTRIB3__MIP0_DEPTH__SHIFT 0x0
25059
25019
#define CB_COLOR4_ATTRIB3__META_LINEAR__SHIFT 0xd
···
25064
25022
#define CB_COLOR4_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT 0x1a
25065
25023
#define CB_COLOR4_ATTRIB3__RESOURCE_LEVEL__SHIFT 0x1b
25066
25024
#define CB_COLOR4_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT 0x1e
25025
+
#define CB_COLOR4_ATTRIB3__VRS_RATE_HINT_ENABLE__SHIFT 0x1f
25067
25026
#define CB_COLOR4_ATTRIB3__MIP0_DEPTH_MASK 0x00001FFFL
25068
25027
#define CB_COLOR4_ATTRIB3__META_LINEAR_MASK 0x00002000L
25069
25028
#define CB_COLOR4_ATTRIB3__COLOR_SW_MODE_MASK 0x0007C000L
···
25073
25030
#define CB_COLOR4_ATTRIB3__CMASK_PIPE_ALIGNED_MASK 0x04000000L
25074
25031
#define CB_COLOR4_ATTRIB3__RESOURCE_LEVEL_MASK 0x38000000L
25075
25032
#define CB_COLOR4_ATTRIB3__DCC_PIPE_ALIGNED_MASK 0x40000000L
25033
+
#define CB_COLOR4_ATTRIB3__VRS_RATE_HINT_ENABLE_MASK 0x80000000L
25076
25034
//CB_COLOR5_ATTRIB3
25077
25035
#define CB_COLOR5_ATTRIB3__MIP0_DEPTH__SHIFT 0x0
25078
25036
#define CB_COLOR5_ATTRIB3__META_LINEAR__SHIFT 0xd
···
25083
25039
#define CB_COLOR5_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT 0x1a
25084
25040
#define CB_COLOR5_ATTRIB3__RESOURCE_LEVEL__SHIFT 0x1b
25085
25041
#define CB_COLOR5_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT 0x1e
25042
+
#define CB_COLOR5_ATTRIB3__VRS_RATE_HINT_ENABLE__SHIFT 0x1f
25086
25043
#define CB_COLOR5_ATTRIB3__MIP0_DEPTH_MASK 0x00001FFFL
25087
25044
#define CB_COLOR5_ATTRIB3__META_LINEAR_MASK 0x00002000L
25088
25045
#define CB_COLOR5_ATTRIB3__COLOR_SW_MODE_MASK 0x0007C000L
···
25092
25047
#define CB_COLOR5_ATTRIB3__CMASK_PIPE_ALIGNED_MASK 0x04000000L
25093
25048
#define CB_COLOR5_ATTRIB3__RESOURCE_LEVEL_MASK 0x38000000L
25094
25049
#define CB_COLOR5_ATTRIB3__DCC_PIPE_ALIGNED_MASK 0x40000000L
25050
+
#define CB_COLOR5_ATTRIB3__VRS_RATE_HINT_ENABLE_MASK 0x80000000L
25095
25051
//CB_COLOR6_ATTRIB3
25096
25052
#define CB_COLOR6_ATTRIB3__MIP0_DEPTH__SHIFT 0x0
25097
25053
#define CB_COLOR6_ATTRIB3__META_LINEAR__SHIFT 0xd
···
25102
25056
#define CB_COLOR6_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT 0x1a
25103
25057
#define CB_COLOR6_ATTRIB3__RESOURCE_LEVEL__SHIFT 0x1b
25104
25058
#define CB_COLOR6_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT 0x1e
25059
+
#define CB_COLOR6_ATTRIB3__VRS_RATE_HINT_ENABLE__SHIFT 0x1f
25105
25060
#define CB_COLOR6_ATTRIB3__MIP0_DEPTH_MASK 0x00001FFFL
25106
25061
#define CB_COLOR6_ATTRIB3__META_LINEAR_MASK 0x00002000L
25107
25062
#define CB_COLOR6_ATTRIB3__COLOR_SW_MODE_MASK 0x0007C000L
···
25111
25064
#define CB_COLOR6_ATTRIB3__CMASK_PIPE_ALIGNED_MASK 0x04000000L
25112
25065
#define CB_COLOR6_ATTRIB3__RESOURCE_LEVEL_MASK 0x38000000L
25113
25066
#define CB_COLOR6_ATTRIB3__DCC_PIPE_ALIGNED_MASK 0x40000000L
25067
+
#define CB_COLOR6_ATTRIB3__VRS_RATE_HINT_ENABLE_MASK 0x80000000L
25114
25068
//CB_COLOR7_ATTRIB3
25115
25069
#define CB_COLOR7_ATTRIB3__MIP0_DEPTH__SHIFT 0x0
25116
25070
#define CB_COLOR7_ATTRIB3__META_LINEAR__SHIFT 0xd
···
25121
25073
#define CB_COLOR7_ATTRIB3__CMASK_PIPE_ALIGNED__SHIFT 0x1a
25122
25074
#define CB_COLOR7_ATTRIB3__RESOURCE_LEVEL__SHIFT 0x1b
25123
25075
#define CB_COLOR7_ATTRIB3__DCC_PIPE_ALIGNED__SHIFT 0x1e
25076
+
#define CB_COLOR7_ATTRIB3__VRS_RATE_HINT_ENABLE__SHIFT 0x1f
25124
25077
#define CB_COLOR7_ATTRIB3__MIP0_DEPTH_MASK 0x00001FFFL
25125
25078
#define CB_COLOR7_ATTRIB3__META_LINEAR_MASK 0x00002000L
25126
25079
#define CB_COLOR7_ATTRIB3__COLOR_SW_MODE_MASK 0x0007C000L
···
25130
25081
#define CB_COLOR7_ATTRIB3__CMASK_PIPE_ALIGNED_MASK 0x04000000L
25131
25082
#define CB_COLOR7_ATTRIB3__RESOURCE_LEVEL_MASK 0x38000000L
25132
25083
#define CB_COLOR7_ATTRIB3__DCC_PIPE_ALIGNED_MASK 0x40000000L
25084
+
#define CB_COLOR7_ATTRIB3__VRS_RATE_HINT_ENABLE_MASK 0x80000000L
25133
25085
25134
25086
25135
25087
// addressBlock: gc_gfxudec
+34
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h
+34
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_sh_mask.h
···
2393
2393
#define VCN_FEATURES__HAS_MJPEG2_IDCT_DEC__SHIFT 0x7
2394
2394
#define VCN_FEATURES__HAS_SCLR_DEC__SHIFT 0x8
2395
2395
#define VCN_FEATURES__HAS_VP9_DEC__SHIFT 0x9
2396
+
#define VCN_FEATURES__HAS_AV1_DEC__SHIFT 0xa
2396
2397
#define VCN_FEATURES__HAS_EFC_ENC__SHIFT 0xb
2397
2398
#define VCN_FEATURES__HAS_EFC_HDR2SDR_ENC__SHIFT 0xc
2398
2399
#define VCN_FEATURES__HAS_DUAL_MJPEG_DEC__SHIFT 0xd
···
2408
2407
#define VCN_FEATURES__HAS_MJPEG2_IDCT_DEC_MASK 0x00000080L
2409
2408
#define VCN_FEATURES__HAS_SCLR_DEC_MASK 0x00000100L
2410
2409
#define VCN_FEATURES__HAS_VP9_DEC_MASK 0x00000200L
2410
+
#define VCN_FEATURES__HAS_AV1_DEC_MASK 0x00000400L
2411
2411
#define VCN_FEATURES__HAS_EFC_ENC_MASK 0x00000800L
2412
2412
#define VCN_FEATURES__HAS_EFC_HDR2SDR_ENC_MASK 0x00001000L
2413
2413
#define VCN_FEATURES__HAS_DUAL_MJPEG_DEC_MASK 0x00002000L
···
2811
2809
#define UVD_SUVD_CGC_GATE__IME_HEVC__SHIFT 0x18
2812
2810
#define UVD_SUVD_CGC_GATE__EFC__SHIFT 0x19
2813
2811
#define UVD_SUVD_CGC_GATE__SAOE__SHIFT 0x1a
2812
+
#define UVD_SUVD_CGC_GATE__SRE_AV1__SHIFT 0x1b
2814
2813
#define UVD_SUVD_CGC_GATE__FBC_PCLK__SHIFT 0x1c
2815
2814
#define UVD_SUVD_CGC_GATE__FBC_CCLK__SHIFT 0x1d
2815
+
#define UVD_SUVD_CGC_GATE__SCM_AV1__SHIFT 0x1e
2816
2816
#define UVD_SUVD_CGC_GATE__SMPA__SHIFT 0x1f
2817
2817
#define UVD_SUVD_CGC_GATE__SRE_MASK 0x00000001L
2818
2818
#define UVD_SUVD_CGC_GATE__SIT_MASK 0x00000002L
···
2843
2839
#define UVD_SUVD_CGC_GATE__IME_HEVC_MASK 0x01000000L
2844
2840
#define UVD_SUVD_CGC_GATE__EFC_MASK 0x02000000L
2845
2841
#define UVD_SUVD_CGC_GATE__SAOE_MASK 0x04000000L
2842
+
#define UVD_SUVD_CGC_GATE__SRE_AV1_MASK 0x08000000L
2846
2843
#define UVD_SUVD_CGC_GATE__FBC_PCLK_MASK 0x10000000L
2847
2844
#define UVD_SUVD_CGC_GATE__FBC_CCLK_MASK 0x20000000L
2845
+
#define UVD_SUVD_CGC_GATE__SCM_AV1_MASK 0x40000000L
2848
2846
#define UVD_SUVD_CGC_GATE__SMPA_MASK 0x80000000L
2849
2847
//UVD_SUVD_CGC_STATUS
2850
2848
#define UVD_SUVD_CGC_STATUS__SRE_VCLK__SHIFT 0x0
···
2879
2873
#define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK__SHIFT 0x1b
2880
2874
#define UVD_SUVD_CGC_STATUS__EFC_DCLK__SHIFT 0x1c
2881
2875
#define UVD_SUVD_CGC_STATUS__SAOE_DCLK__SHIFT 0x1d
2876
+
#define UVD_SUVD_CGC_STATUS__SRE_AV1_VCLK__SHIFT 0x1e
2877
+
#define UVD_SUVD_CGC_STATUS__SCM_AV1_DCLK__SHIFT 0x1f
2882
2878
#define UVD_SUVD_CGC_STATUS__SRE_VCLK_MASK 0x00000001L
2883
2879
#define UVD_SUVD_CGC_STATUS__SRE_DCLK_MASK 0x00000002L
2884
2880
#define UVD_SUVD_CGC_STATUS__SIT_DCLK_MASK 0x00000004L
···
2911
2903
#define UVD_SUVD_CGC_STATUS__IME_HEVC_DCLK_MASK 0x08000000L
2912
2904
#define UVD_SUVD_CGC_STATUS__EFC_DCLK_MASK 0x10000000L
2913
2905
#define UVD_SUVD_CGC_STATUS__SAOE_DCLK_MASK 0x20000000L
2906
+
#define UVD_SUVD_CGC_STATUS__SRE_AV1_VCLK_MASK 0x40000000L
2907
+
#define UVD_SUVD_CGC_STATUS__SCM_AV1_DCLK_MASK 0x80000000L
2914
2908
//UVD_SUVD_CGC_CTRL
2915
2909
#define UVD_SUVD_CGC_CTRL__SRE_MODE__SHIFT 0x0
2916
2910
#define UVD_SUVD_CGC_CTRL__SIT_MODE__SHIFT 0x1
···
2929
2919
#define UVD_SUVD_CGC_CTRL__SMPA_MODE__SHIFT 0xc
2930
2920
#define UVD_SUVD_CGC_CTRL__MPBE0_MODE__SHIFT 0xd
2931
2921
#define UVD_SUVD_CGC_CTRL__MPBE1_MODE__SHIFT 0xe
2922
+
#define UVD_SUVD_CGC_CTRL__SIT_AV1_MODE__SHIFT 0xf
2923
+
#define UVD_SUVD_CGC_CTRL__SDB_AV1_MODE__SHIFT 0x10
2932
2924
#define UVD_SUVD_CGC_CTRL__MPC1_MODE__SHIFT 0x11
2933
2925
#define UVD_SUVD_CGC_CTRL__FBC_PCLK__SHIFT 0x1c
2934
2926
#define UVD_SUVD_CGC_CTRL__FBC_CCLK__SHIFT 0x1d
···
2949
2937
#define UVD_SUVD_CGC_CTRL__SMPA_MODE_MASK 0x00001000L
2950
2938
#define UVD_SUVD_CGC_CTRL__MPBE0_MODE_MASK 0x00002000L
2951
2939
#define UVD_SUVD_CGC_CTRL__MPBE1_MODE_MASK 0x00004000L
2940
+
#define UVD_SUVD_CGC_CTRL__SIT_AV1_MODE_MASK 0x00008000L
2941
+
#define UVD_SUVD_CGC_CTRL__SDB_AV1_MODE_MASK 0x00010000L
2952
2942
#define UVD_SUVD_CGC_CTRL__MPC1_MODE_MASK 0x00020000L
2953
2943
#define UVD_SUVD_CGC_CTRL__FBC_PCLK_MASK 0x10000000L
2954
2944
#define UVD_SUVD_CGC_CTRL__FBC_CCLK_MASK 0x20000000L
···
3672
3658
#define UVD_SUVD_CGC_STATUS2__SMPA_VCLK__SHIFT 0x0
3673
3659
#define UVD_SUVD_CGC_STATUS2__SMPA_DCLK__SHIFT 0x1
3674
3660
#define UVD_SUVD_CGC_STATUS2__MPBE1_DCLK__SHIFT 0x3
3661
+
#define UVD_SUVD_CGC_STATUS2__SIT_AV1_DCLK__SHIFT 0x4
3662
+
#define UVD_SUVD_CGC_STATUS2__SDB_AV1_DCLK__SHIFT 0x5
3675
3663
#define UVD_SUVD_CGC_STATUS2__MPC1_DCLK__SHIFT 0x6
3676
3664
#define UVD_SUVD_CGC_STATUS2__MPC1_SCLK__SHIFT 0x7
3677
3665
#define UVD_SUVD_CGC_STATUS2__MPC1_VCLK__SHIFT 0x8
···
3682
3666
#define UVD_SUVD_CGC_STATUS2__SMPA_VCLK_MASK 0x00000001L
3683
3667
#define UVD_SUVD_CGC_STATUS2__SMPA_DCLK_MASK 0x00000002L
3684
3668
#define UVD_SUVD_CGC_STATUS2__MPBE1_DCLK_MASK 0x00000008L
3669
+
#define UVD_SUVD_CGC_STATUS2__SIT_AV1_DCLK_MASK 0x00000010L
3670
+
#define UVD_SUVD_CGC_STATUS2__SDB_AV1_DCLK_MASK 0x00000020L
3685
3671
#define UVD_SUVD_CGC_STATUS2__MPC1_DCLK_MASK 0x00000040L
3686
3672
#define UVD_SUVD_CGC_STATUS2__MPC1_SCLK_MASK 0x00000080L
3687
3673
#define UVD_SUVD_CGC_STATUS2__MPC1_VCLK_MASK 0x00000100L
···
3692
3674
//UVD_SUVD_CGC_GATE2
3693
3675
#define UVD_SUVD_CGC_GATE2__MPBE0__SHIFT 0x0
3694
3676
#define UVD_SUVD_CGC_GATE2__MPBE1__SHIFT 0x1
3677
+
#define UVD_SUVD_CGC_GATE2__SIT_AV1__SHIFT 0x2
3678
+
#define UVD_SUVD_CGC_GATE2__SDB_AV1__SHIFT 0x3
3695
3679
#define UVD_SUVD_CGC_GATE2__MPC1__SHIFT 0x4
3696
3680
#define UVD_SUVD_CGC_GATE2__MPBE0_MASK 0x00000001L
3697
3681
#define UVD_SUVD_CGC_GATE2__MPBE1_MASK 0x00000002L
3682
+
#define UVD_SUVD_CGC_GATE2__SIT_AV1_MASK 0x00000004L
3683
+
#define UVD_SUVD_CGC_GATE2__SDB_AV1_MASK 0x00000008L
3698
3684
#define UVD_SUVD_CGC_GATE2__MPC1_MASK 0x00000010L
3699
3685
//UVD_SUVD_INT_STATUS2
3700
3686
#define UVD_SUVD_INT_STATUS2__SMPA_FUNC_INT__SHIFT 0x0
3701
3687
#define UVD_SUVD_INT_STATUS2__SMPA_ERR_INT__SHIFT 0x5
3688
+
#define UVD_SUVD_INT_STATUS2__SDB_AV1_FUNC_INT__SHIFT 0x6
3689
+
#define UVD_SUVD_INT_STATUS2__SDB_AV1_ERR_INT__SHIFT 0xb
3702
3690
#define UVD_SUVD_INT_STATUS2__SMPA_FUNC_INT_MASK 0x0000001FL
3703
3691
#define UVD_SUVD_INT_STATUS2__SMPA_ERR_INT_MASK 0x00000020L
3692
+
#define UVD_SUVD_INT_STATUS2__SDB_AV1_FUNC_INT_MASK 0x000007C0L
3693
+
#define UVD_SUVD_INT_STATUS2__SDB_AV1_ERR_INT_MASK 0x00000800L
3704
3694
//UVD_SUVD_INT_EN2
3705
3695
#define UVD_SUVD_INT_EN2__SMPA_FUNC_INT_EN__SHIFT 0x0
3706
3696
#define UVD_SUVD_INT_EN2__SMPA_ERR_INT_EN__SHIFT 0x5
3697
+
#define UVD_SUVD_INT_EN2__SDB_AV1_FUNC_INT_EN__SHIFT 0x6
3698
+
#define UVD_SUVD_INT_EN2__SDB_AV1_ERR_INT_EN__SHIFT 0xb
3707
3699
#define UVD_SUVD_INT_EN2__SMPA_FUNC_INT_EN_MASK 0x0000001FL
3708
3700
#define UVD_SUVD_INT_EN2__SMPA_ERR_INT_EN_MASK 0x00000020L
3701
+
#define UVD_SUVD_INT_EN2__SDB_AV1_FUNC_INT_EN_MASK 0x000007C0L
3702
+
#define UVD_SUVD_INT_EN2__SDB_AV1_ERR_INT_EN_MASK 0x00000800L
3709
3703
//UVD_SUVD_INT_ACK2
3710
3704
#define UVD_SUVD_INT_ACK2__SMPA_FUNC_INT_ACK__SHIFT 0x0
3711
3705
#define UVD_SUVD_INT_ACK2__SMPA_ERR_INT_ACK__SHIFT 0x5
3706
+
#define UVD_SUVD_INT_ACK2__SDB_AV1_FUNC_INT_ACK__SHIFT 0x6
3707
+
#define UVD_SUVD_INT_ACK2__SDB_AV1_ERR_INT_ACK__SHIFT 0xb
3712
3708
#define UVD_SUVD_INT_ACK2__SMPA_FUNC_INT_ACK_MASK 0x0000001FL
3713
3709
#define UVD_SUVD_INT_ACK2__SMPA_ERR_INT_ACK_MASK 0x00000020L
3710
+
#define UVD_SUVD_INT_ACK2__SDB_AV1_FUNC_INT_ACK_MASK 0x000007C0L
3711
+
#define UVD_SUVD_INT_ACK2__SDB_AV1_ERR_INT_ACK_MASK 0x00000800L
3714
3712
3715
3713
3716
3714
// addressBlock: uvd0_ecpudec
+11
-11
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+11
-11
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
···
479
479
return ret;
480
480
}
481
481
482
-
/*
483
-
* Set initialized values (get from vbios) to dpm tables context such as
484
-
* gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
485
-
* type of clks.
486
-
*/
487
-
ret = smu_set_default_dpm_table(smu);
488
-
if (ret) {
489
-
dev_err(adev->dev, "Failed to setup default dpm clock tables!\n");
490
-
return ret;
491
-
}
492
-
493
482
ret = smu_populate_umd_state_clk(smu);
494
483
if (ret) {
495
484
dev_err(adev->dev, "Failed to populate UMD state clocks!\n");
···
970
981
SMU_POWER_SOURCE_DC);
971
982
if (ret) {
972
983
dev_err(adev->dev, "Failed to switch to %s mode!\n", adev->pm.ac_power ? "AC" : "DC");
984
+
return ret;
985
+
}
986
+
987
+
/*
988
+
* Set initialized values (get from vbios) to dpm tables context such as
989
+
* gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
990
+
* type of clks.
991
+
*/
992
+
ret = smu_set_default_dpm_table(smu);
993
+
if (ret) {
994
+
dev_err(adev->dev, "Failed to setup default dpm clock tables!\n");
973
995
return ret;
974
996
}
975
997
+6
-4
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+6
-4
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
···
563
563
struct smu10_hwmgr *data = hwmgr->backend;
564
564
uint32_t min_sclk = hwmgr->display_config->min_core_set_clock;
565
565
uint32_t min_mclk = hwmgr->display_config->min_mem_set_clock/100;
566
+
uint32_t index_fclk = data->clock_vol_info.vdd_dep_on_fclk->count - 1;
567
+
uint32_t index_socclk = data->clock_vol_info.vdd_dep_on_socclk->count - 1;
566
568
567
569
if (hwmgr->smu_version < 0x1E3700) {
568
570
pr_info("smu firmware version too old, can not set dpm level\n");
···
678
676
smum_send_msg_to_smc_with_parameter(hwmgr,
679
677
PPSMC_MSG_SetHardMinFclkByFreq,
680
678
hwmgr->display_config->num_display > 3 ?
681
-
SMU10_UMD_PSTATE_PEAK_FCLK :
679
+
data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk :
682
680
min_mclk,
683
681
NULL);
684
682
685
683
smum_send_msg_to_smc_with_parameter(hwmgr,
686
684
PPSMC_MSG_SetHardMinSocclkByFreq,
687
-
SMU10_UMD_PSTATE_MIN_SOCCLK,
685
+
data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk,
688
686
NULL);
689
687
smum_send_msg_to_smc_with_parameter(hwmgr,
690
688
PPSMC_MSG_SetHardMinVcn,
···
697
695
NULL);
698
696
smum_send_msg_to_smc_with_parameter(hwmgr,
699
697
PPSMC_MSG_SetSoftMaxFclkByFreq,
700
-
SMU10_UMD_PSTATE_PEAK_FCLK,
698
+
data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk,
701
699
NULL);
702
700
smum_send_msg_to_smc_with_parameter(hwmgr,
703
701
PPSMC_MSG_SetSoftMaxSocclkByFreq,
704
-
SMU10_UMD_PSTATE_PEAK_SOCCLK,
702
+
data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk,
705
703
NULL);
706
704
smum_send_msg_to_smc_with_parameter(hwmgr,
707
705
PPSMC_MSG_SetSoftMaxVcn,
+5
-3
drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+5
-3
drivers/gpu/drm/amd/powerplay/renoir_ppt.c
···
232
232
*sclk_mask = 0;
233
233
} else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) {
234
234
if (mclk_mask)
235
-
*mclk_mask = 0;
235
+
/* mclk levels are in reverse order */
236
+
*mclk_mask = NUM_MEMCLK_DPM_LEVELS - 1;
236
237
} else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) {
237
238
if(sclk_mask)
238
239
/* The sclk as gfxclk and has three level about max/min/current */
239
240
*sclk_mask = 3 - 1;
240
241
241
242
if(mclk_mask)
242
-
*mclk_mask = NUM_MEMCLK_DPM_LEVELS - 1;
243
+
/* mclk levels are in reverse order */
244
+
*mclk_mask = 0;
243
245
244
246
if(soc_mask)
245
247
*soc_mask = NUM_SOCCLK_DPM_LEVELS - 1;
···
335
333
case SMU_UCLK:
336
334
case SMU_FCLK:
337
335
case SMU_MCLK:
338
-
ret = renoir_get_dpm_clk_limited(smu, clk_type, 0, min);
336
+
ret = renoir_get_dpm_clk_limited(smu, clk_type, NUM_MEMCLK_DPM_LEVELS - 1, min);
339
337
if (ret)
340
338
goto failed;
341
339
break;
+5
-1
drivers/gpu/drm/i915/gvt/vgpu.c
+5
-1
drivers/gpu/drm/i915/gvt/vgpu.c
···
368
368
static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt,
369
369
struct intel_vgpu_creation_params *param)
370
370
{
371
+
struct drm_i915_private *dev_priv = gvt->gt->i915;
371
372
struct intel_vgpu *vgpu;
372
373
int ret;
373
374
···
437
436
if (ret)
438
437
goto out_clean_sched_policy;
439
438
440
-
ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_D);
439
+
if (IS_BROADWELL(dev_priv))
440
+
ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_B);
441
+
else
442
+
ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_D);
441
443
if (ret)
442
444
goto out_clean_sched_policy;
443
445
+5
-7
drivers/gpu/drm/i915/selftests/mock_gem_device.c
+5
-7
drivers/gpu/drm/i915/selftests/mock_gem_device.c
···
118
118
119
119
struct drm_i915_private *mock_gem_device(void)
120
120
{
121
+
#if IS_ENABLED(CONFIG_IOMMU_API) && defined(CONFIG_INTEL_IOMMU)
122
+
static struct dev_iommu fake_iommu = { .priv = (void *)-1 };
123
+
#endif
121
124
struct drm_i915_private *i915;
122
125
struct pci_dev *pdev;
123
-
#if IS_ENABLED(CONFIG_IOMMU_API) && defined(CONFIG_INTEL_IOMMU)
124
-
struct dev_iommu iommu;
125
-
#endif
126
126
int err;
127
127
128
128
pdev = kzalloc(sizeof(*pdev), GFP_KERNEL);
···
141
141
dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
142
142
143
143
#if IS_ENABLED(CONFIG_IOMMU_API) && defined(CONFIG_INTEL_IOMMU)
144
-
/* HACK HACK HACK to disable iommu for the fake device; force identity mapping */
145
-
memset(&iommu, 0, sizeof(iommu));
146
-
iommu.priv = (void *)-1;
147
-
pdev->dev.iommu = &iommu;
144
+
/* HACK to disable iommu for the fake device; force identity mapping */
145
+
pdev->dev.iommu = &fake_iommu;
148
146
#endif
149
147
150
148
pci_set_drvdata(pdev, i915);
+1
-1
drivers/gpu/drm/sun4i/sun8i_csc.h
+1
-1
drivers/gpu/drm/sun4i/sun8i_csc.h
+1
-1
drivers/gpu/drm/sun4i/sun8i_mixer.c
+1
-1
drivers/gpu/drm/sun4i/sun8i_mixer.c
+1
drivers/gpu/drm/vc4/vc4_hdmi.c
+1
drivers/gpu/drm/vc4/vc4_hdmi.c
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_thp.c
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_thp.c
+3
drivers/i2c/busses/i2c-cpm.c
+3
drivers/i2c/busses/i2c-cpm.c
+1
drivers/i2c/busses/i2c-i801.c
+1
drivers/i2c/busses/i2c-i801.c
+9
drivers/i2c/busses/i2c-npcm7xx.c
+9
drivers/i2c/busses/i2c-npcm7xx.c
···
2163
2163
if (bus->cmd_err == -EAGAIN)
2164
2164
ret = i2c_recover_bus(adap);
2165
2165
2166
+
/*
2167
+
* After any type of error, check if LAST bit is still set,
2168
+
* due to a HW issue.
2169
+
* It cannot be cleared without resetting the module.
2170
+
*/
2171
+
if (bus->cmd_err &&
2172
+
(NPCM_I2CRXF_CTL_LAST_PEC & ioread8(bus->reg + NPCM_I2CRXF_CTL)))
2173
+
npcm_i2c_reset(bus);
2174
+
2166
2175
#if IS_ENABLED(CONFIG_I2C_SLAVE)
2167
2176
/* reenable slave if it was enabled */
2168
2177
if (bus->slave)
+2
-2
drivers/iio/adc/ad7124.c
+2
-2
drivers/iio/adc/ad7124.c
···
177
177
178
178
static struct ad7124_chip_info ad7124_chip_info_tbl[] = {
179
179
[ID_AD7124_4] = {
180
-
.name = "ad7127-4",
180
+
.name = "ad7124-4",
181
181
.chip_id = CHIPID_AD7124_4,
182
182
.num_inputs = 8,
183
183
},
184
184
[ID_AD7124_8] = {
185
-
.name = "ad7127-8",
185
+
.name = "ad7124-8",
186
186
.chip_id = CHIPID_AD7124_8,
187
187
.num_inputs = 16,
188
188
},
+1
-1
drivers/iio/adc/qcom-spmi-adc5.c
+1
-1
drivers/iio/adc/qcom-spmi-adc5.c
+7
-3
drivers/infiniband/core/cache.c
+7
-3
drivers/infiniband/core/cache.c
···
1320
1320
}
1321
1321
EXPORT_SYMBOL(rdma_read_gid_attr_ndev_rcu);
1322
1322
1323
-
static int get_lower_dev_vlan(struct net_device *lower_dev, void *data)
1323
+
static int get_lower_dev_vlan(struct net_device *lower_dev,
1324
+
struct netdev_nested_priv *priv)
1324
1325
{
1325
-
u16 *vlan_id = data;
1326
+
u16 *vlan_id = (u16 *)priv->data;
1326
1327
1327
1328
if (is_vlan_dev(lower_dev))
1328
1329
*vlan_id = vlan_dev_vlan_id(lower_dev);
···
1349
1348
int rdma_read_gid_l2_fields(const struct ib_gid_attr *attr,
1350
1349
u16 *vlan_id, u8 *smac)
1351
1350
{
1351
+
struct netdev_nested_priv priv = {
1352
+
.data = (void *)vlan_id,
1353
+
};
1352
1354
struct net_device *ndev;
1353
1355
1354
1356
rcu_read_lock();
···
1372
1368
* the lower vlan device for this gid entry.
1373
1369
*/
1374
1370
netdev_walk_all_lower_dev_rcu(attr->ndev,
1375
-
get_lower_dev_vlan, vlan_id);
1371
+
get_lower_dev_vlan, &priv);
1376
1372
}
1377
1373
}
1378
1374
rcu_read_unlock();
+6
-3
drivers/infiniband/core/cma.c
+6
-3
drivers/infiniband/core/cma.c
···
2865
2865
bool found;
2866
2866
};
2867
2867
2868
-
static int get_lower_vlan_dev_tc(struct net_device *dev, void *data)
2868
+
static int get_lower_vlan_dev_tc(struct net_device *dev,
2869
+
struct netdev_nested_priv *priv)
2869
2870
{
2870
-
struct iboe_prio_tc_map *map = data;
2871
+
struct iboe_prio_tc_map *map = (struct iboe_prio_tc_map *)priv->data;
2871
2872
2872
2873
if (is_vlan_dev(dev))
2873
2874
map->output_tc = get_vlan_ndev_tc(dev, map->input_prio);
···
2887
2886
{
2888
2887
struct iboe_prio_tc_map prio_tc_map = {};
2889
2888
int prio = rt_tos2priority(tos);
2889
+
struct netdev_nested_priv priv;
2890
2890
2891
2891
/* If VLAN device, get it directly from the VLAN netdev */
2892
2892
if (is_vlan_dev(ndev))
2893
2893
return get_vlan_ndev_tc(ndev, prio);
2894
2894
2895
2895
prio_tc_map.input_prio = prio;
2896
+
priv.data = (void *)&prio_tc_map;
2896
2897
rcu_read_lock();
2897
2898
netdev_walk_all_lower_dev_rcu(ndev,
2898
2899
get_lower_vlan_dev_tc,
2899
-
&prio_tc_map);
2900
+
&priv);
2900
2901
rcu_read_unlock();
2901
2902
/* If map is found from lower device, use it; Otherwise
2902
2903
* continue with the current netdevice to get priority to tc map.
+4
-2
drivers/infiniband/core/device.c
+4
-2
drivers/infiniband/core/device.c
···
1285
1285
remove_client_context(device, cid);
1286
1286
}
1287
1287
1288
+
ib_cq_pool_destroy(device);
1289
+
1288
1290
/* Pairs with refcount_set in enable_device */
1289
1291
ib_device_put(device);
1290
1292
wait_for_completion(&device->unreg_completion);
···
1329
1327
if (ret)
1330
1328
goto out;
1331
1329
}
1330
+
1331
+
ib_cq_pool_init(device);
1332
1332
1333
1333
down_read(&clients_rwsem);
1334
1334
xa_for_each_marked (&clients, index, client, CLIENT_REGISTERED) {
···
1404
1400
goto dev_cleanup;
1405
1401
}
1406
1402
1407
-
ib_cq_pool_init(device);
1408
1403
ret = enable_device_and_get(device);
1409
1404
dev_set_uevent_suppress(&device->dev, false);
1410
1405
/* Mark for userspace that device is ready */
···
1458
1455
goto out;
1459
1456
1460
1457
disable_device(ib_dev);
1461
-
ib_cq_pool_destroy(ib_dev);
1462
1458
1463
1459
/* Expedite removing unregistered pointers from the hash table */
1464
1460
free_netdevs(ib_dev);
+6
-3
drivers/infiniband/core/roce_gid_mgmt.c
+6
-3
drivers/infiniband/core/roce_gid_mgmt.c
···
531
531
struct net_device *upper;
532
532
};
533
533
534
-
static int netdev_upper_walk(struct net_device *upper, void *data)
534
+
static int netdev_upper_walk(struct net_device *upper,
535
+
struct netdev_nested_priv *priv)
535
536
{
536
537
struct upper_list *entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
537
-
struct list_head *upper_list = data;
538
+
struct list_head *upper_list = (struct list_head *)priv->data;
538
539
539
540
if (!entry)
540
541
return 0;
···
554
553
struct net_device *ndev))
555
554
{
556
555
struct net_device *ndev = cookie;
556
+
struct netdev_nested_priv priv;
557
557
struct upper_list *upper_iter;
558
558
struct upper_list *upper_temp;
559
559
LIST_HEAD(upper_list);
560
560
561
+
priv.data = &upper_list;
561
562
rcu_read_lock();
562
-
netdev_walk_all_upper_dev_rcu(ndev, netdev_upper_walk, &upper_list);
563
+
netdev_walk_all_upper_dev_rcu(ndev, netdev_upper_walk, &priv);
563
564
rcu_read_unlock();
564
565
565
566
handle_netdev(ib_dev, port, ndev);
+6
-3
drivers/infiniband/ulp/ipoib/ipoib_main.c
+6
-3
drivers/infiniband/ulp/ipoib/ipoib_main.c
···
342
342
struct net_device *result;
343
343
};
344
344
345
-
static int ipoib_upper_walk(struct net_device *upper, void *_data)
345
+
static int ipoib_upper_walk(struct net_device *upper,
346
+
struct netdev_nested_priv *priv)
346
347
{
347
-
struct ipoib_walk_data *data = _data;
348
+
struct ipoib_walk_data *data = (struct ipoib_walk_data *)priv->data;
348
349
int ret = 0;
349
350
350
351
if (ipoib_is_dev_match_addr_rcu(data->addr, upper)) {
···
369
368
static struct net_device *ipoib_get_net_dev_match_addr(
370
369
const struct sockaddr *addr, struct net_device *dev)
371
370
{
371
+
struct netdev_nested_priv priv;
372
372
struct ipoib_walk_data data = {
373
373
.addr = addr,
374
374
};
375
375
376
+
priv.data = (void *)&data;
376
377
rcu_read_lock();
377
378
if (ipoib_is_dev_match_addr_rcu(addr, dev)) {
378
379
dev_hold(dev);
···
382
379
goto out;
383
380
}
384
381
385
-
netdev_walk_all_upper_dev_rcu(dev, ipoib_upper_walk, &data);
382
+
netdev_walk_all_upper_dev_rcu(dev, ipoib_upper_walk, &priv);
386
383
out:
387
384
rcu_read_unlock();
388
385
return data.result;
+2
drivers/input/mouse/trackpoint.c
+2
drivers/input/mouse/trackpoint.c
+7
drivers/input/serio/i8042-x86ia64io.h
+7
drivers/input/serio/i8042-x86ia64io.h
+10
-46
drivers/iommu/amd/init.c
+10
-46
drivers/iommu/amd/init.c
···
1104
1104
}
1105
1105
1106
1106
/*
1107
-
* Reads the device exclusion range from ACPI and initializes the IOMMU with
1108
-
* it
1109
-
*/
1110
-
static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m)
1111
-
{
1112
-
if (!(m->flags & IVMD_FLAG_EXCL_RANGE))
1113
-
return;
1114
-
1115
-
/*
1116
-
* Treat per-device exclusion ranges as r/w unity-mapped regions
1117
-
* since some buggy BIOSes might lead to the overwritten exclusion
1118
-
* range (exclusion_start and exclusion_length members). This
1119
-
* happens when there are multiple exclusion ranges (IVMD entries)
1120
-
* defined in ACPI table.
1121
-
*/
1122
-
m->flags = (IVMD_FLAG_IW | IVMD_FLAG_IR | IVMD_FLAG_UNITY_MAP);
1123
-
}
1124
-
1125
-
/*
1126
1107
* Takes a pointer to an AMD IOMMU entry in the ACPI table and
1127
1108
* initializes the hardware and our data structures with it.
1128
1109
*/
···
2054
2073
}
2055
2074
}
2056
2075
2057
-
/* called when we find an exclusion range definition in ACPI */
2058
-
static int __init init_exclusion_range(struct ivmd_header *m)
2059
-
{
2060
-
int i;
2061
-
2062
-
switch (m->type) {
2063
-
case ACPI_IVMD_TYPE:
2064
-
set_device_exclusion_range(m->devid, m);
2065
-
break;
2066
-
case ACPI_IVMD_TYPE_ALL:
2067
-
for (i = 0; i <= amd_iommu_last_bdf; ++i)
2068
-
set_device_exclusion_range(i, m);
2069
-
break;
2070
-
case ACPI_IVMD_TYPE_RANGE:
2071
-
for (i = m->devid; i <= m->aux; ++i)
2072
-
set_device_exclusion_range(i, m);
2073
-
break;
2074
-
default:
2075
-
break;
2076
-
}
2077
-
2078
-
return 0;
2079
-
}
2080
-
2081
2076
/* called for unity map ACPI definition */
2082
2077
static int __init init_unity_map_range(struct ivmd_header *m)
2083
2078
{
···
2063
2106
e = kzalloc(sizeof(*e), GFP_KERNEL);
2064
2107
if (e == NULL)
2065
2108
return -ENOMEM;
2066
-
2067
-
if (m->flags & IVMD_FLAG_EXCL_RANGE)
2068
-
init_exclusion_range(m);
2069
2109
2070
2110
switch (m->type) {
2071
2111
default:
···
2086
2132
e->address_start = PAGE_ALIGN(m->range_start);
2087
2133
e->address_end = e->address_start + PAGE_ALIGN(m->range_length);
2088
2134
e->prot = m->flags >> 1;
2135
+
2136
+
/*
2137
+
* Treat per-device exclusion ranges as r/w unity-mapped regions
2138
+
* since some buggy BIOSes might lead to the overwritten exclusion
2139
+
* range (exclusion_start and exclusion_length members). This
2140
+
* happens when there are multiple exclusion ranges (IVMD entries)
2141
+
* defined in ACPI table.
2142
+
*/
2143
+
if (m->flags & IVMD_FLAG_EXCL_RANGE)
2144
+
e->prot = (IVMD_FLAG_IW | IVMD_FLAG_IR) >> 1;
2089
2145
2090
2146
DUMP_printk("%s devid_start: %02x:%02x.%x devid_end: %02x:%02x.%x"
2091
2147
" range_start: %016llx range_end: %016llx flags: %x\n", s,
+6
-2
drivers/iommu/exynos-iommu.c
+6
-2
drivers/iommu/exynos-iommu.c
···
1295
1295
return -ENODEV;
1296
1296
1297
1297
data = platform_get_drvdata(sysmmu);
1298
-
if (!data)
1298
+
if (!data) {
1299
+
put_device(&sysmmu->dev);
1299
1300
return -ENODEV;
1301
+
}
1300
1302
1301
1303
if (!owner) {
1302
1304
owner = kzalloc(sizeof(*owner), GFP_KERNEL);
1303
-
if (!owner)
1305
+
if (!owner) {
1306
+
put_device(&sysmmu->dev);
1304
1307
return -ENOMEM;
1308
+
}
1305
1309
1306
1310
INIT_LIST_HEAD(&owner->controllers);
1307
1311
mutex_init(&owner->rpm_lock);
+2
-2
drivers/iommu/intel/iommu.c
+2
-2
drivers/iommu/intel/iommu.c
···
2664
2664
}
2665
2665
2666
2666
/* Setup the PASID entry for requests without PASID: */
2667
-
spin_lock(&iommu->lock);
2667
+
spin_lock_irqsave(&iommu->lock, flags);
2668
2668
if (hw_pass_through && domain_type_is_si(domain))
2669
2669
ret = intel_pasid_setup_pass_through(iommu, domain,
2670
2670
dev, PASID_RID2PASID);
···
2674
2674
else
2675
2675
ret = intel_pasid_setup_second_level(iommu, domain,
2676
2676
dev, PASID_RID2PASID);
2677
-
spin_unlock(&iommu->lock);
2677
+
spin_unlock_irqrestore(&iommu->lock, flags);
2678
2678
if (ret) {
2679
2679
dev_err(dev, "Setup RID2PASID failed\n");
2680
2680
dmar_remove_one_dev_info(dev);
+5
-22
drivers/md/dm.c
+5
-22
drivers/md/dm.c
···
1724
1724
return ret;
1725
1725
}
1726
1726
1727
-
static void dm_queue_split(struct mapped_device *md, struct dm_target *ti, struct bio **bio)
1728
-
{
1729
-
unsigned len, sector_count;
1730
-
1731
-
sector_count = bio_sectors(*bio);
1732
-
len = min_t(sector_t, max_io_len((*bio)->bi_iter.bi_sector, ti), sector_count);
1733
-
1734
-
if (sector_count > len) {
1735
-
struct bio *split = bio_split(*bio, len, GFP_NOIO, &md->queue->bio_split);
1736
-
1737
-
bio_chain(split, *bio);
1738
-
trace_block_split(md->queue, split, (*bio)->bi_iter.bi_sector);
1739
-
submit_bio_noacct(*bio);
1740
-
*bio = split;
1741
-
}
1742
-
}
1743
-
1744
1727
static blk_qc_t dm_process_bio(struct mapped_device *md,
1745
1728
struct dm_table *map, struct bio *bio)
1746
1729
{
···
1744
1761
}
1745
1762
1746
1763
/*
1747
-
* If in ->queue_bio we need to use blk_queue_split(), otherwise
1764
+
* If in ->submit_bio we need to use blk_queue_split(), otherwise
1748
1765
* queue_limits for abnormal requests (e.g. discard, writesame, etc)
1749
1766
* won't be imposed.
1767
+
* If called from dm_wq_work() for deferred bio processing, bio
1768
+
* was already handled by following code with previous ->submit_bio.
1750
1769
*/
1751
1770
if (current->bio_list) {
1752
1771
if (is_abnormal_io(bio))
1753
1772
blk_queue_split(&bio);
1754
-
else
1755
-
dm_queue_split(md, ti, &bio);
1773
+
/* regular IO is split by __split_and_process_bio */
1756
1774
}
1757
1775
1758
1776
if (dm_get_md_type(md) == DM_TYPE_NVME_BIO_BASED)
1759
1777
return __process_bio(md, map, bio, ti);
1760
-
else
1761
-
return __split_and_process_bio(md, map, bio);
1778
+
return __split_and_process_bio(md, map, bio);
1762
1779
}
1763
1780
1764
1781
static blk_qc_t dm_submit_bio(struct bio *bio)
+1
-1
drivers/media/cec/core/cec-adap.c
+1
-1
drivers/media/cec/core/cec-adap.c
+6
-40
drivers/media/common/videobuf2/videobuf2-core.c
+6
-40
drivers/media/common/videobuf2/videobuf2-core.c
···
721
721
}
722
722
EXPORT_SYMBOL(vb2_verify_memory_type);
723
723
724
-
static void set_queue_consistency(struct vb2_queue *q, bool consistent_mem)
725
-
{
726
-
q->dma_attrs &= ~DMA_ATTR_NON_CONSISTENT;
727
-
728
-
if (!vb2_queue_allows_cache_hints(q))
729
-
return;
730
-
if (!consistent_mem)
731
-
q->dma_attrs |= DMA_ATTR_NON_CONSISTENT;
732
-
}
733
-
734
-
static bool verify_consistency_attr(struct vb2_queue *q, bool consistent_mem)
735
-
{
736
-
bool queue_is_consistent = !(q->dma_attrs & DMA_ATTR_NON_CONSISTENT);
737
-
738
-
if (consistent_mem != queue_is_consistent) {
739
-
dprintk(q, 1, "memory consistency model mismatch\n");
740
-
return false;
741
-
}
742
-
return true;
743
-
}
744
-
745
724
int vb2_core_reqbufs(struct vb2_queue *q, enum vb2_memory memory,
746
-
unsigned int flags, unsigned int *count)
725
+
unsigned int *count)
747
726
{
748
727
unsigned int num_buffers, allocated_buffers, num_planes = 0;
749
728
unsigned plane_sizes[VB2_MAX_PLANES] = { };
750
-
bool consistent_mem = true;
751
729
unsigned int i;
752
730
int ret;
753
-
754
-
if (flags & V4L2_FLAG_MEMORY_NON_CONSISTENT)
755
-
consistent_mem = false;
756
731
757
732
if (q->streaming) {
758
733
dprintk(q, 1, "streaming active\n");
···
740
765
}
741
766
742
767
if (*count == 0 || q->num_buffers != 0 ||
743
-
(q->memory != VB2_MEMORY_UNKNOWN && q->memory != memory) ||
744
-
!verify_consistency_attr(q, consistent_mem)) {
768
+
(q->memory != VB2_MEMORY_UNKNOWN && q->memory != memory)) {
745
769
/*
746
770
* We already have buffers allocated, so first check if they
747
771
* are not in use and can be freed.
···
777
803
num_buffers = min_t(unsigned int, num_buffers, VB2_MAX_FRAME);
778
804
memset(q->alloc_devs, 0, sizeof(q->alloc_devs));
779
805
q->memory = memory;
780
-
set_queue_consistency(q, consistent_mem);
781
806
782
807
/*
783
808
* Ask the driver how many buffers and planes per buffer it requires.
···
861
888
EXPORT_SYMBOL_GPL(vb2_core_reqbufs);
862
889
863
890
int vb2_core_create_bufs(struct vb2_queue *q, enum vb2_memory memory,
864
-
unsigned int flags, unsigned int *count,
891
+
unsigned int *count,
865
892
unsigned int requested_planes,
866
893
const unsigned int requested_sizes[])
867
894
{
868
895
unsigned int num_planes = 0, num_buffers, allocated_buffers;
869
896
unsigned plane_sizes[VB2_MAX_PLANES] = { };
870
-
bool consistent_mem = true;
871
897
int ret;
872
-
873
-
if (flags & V4L2_FLAG_MEMORY_NON_CONSISTENT)
874
-
consistent_mem = false;
875
898
876
899
if (q->num_buffers == VB2_MAX_FRAME) {
877
900
dprintk(q, 1, "maximum number of buffers already allocated\n");
···
881
912
}
882
913
memset(q->alloc_devs, 0, sizeof(q->alloc_devs));
883
914
q->memory = memory;
884
-
set_queue_consistency(q, consistent_mem);
885
915
q->waiting_for_buffers = !q->is_output;
886
916
} else {
887
917
if (q->memory != memory) {
888
918
dprintk(q, 1, "memory model mismatch\n");
889
919
return -EINVAL;
890
920
}
891
-
if (!verify_consistency_attr(q, consistent_mem))
892
-
return -EINVAL;
893
921
}
894
922
895
923
num_buffers = min(*count, VB2_MAX_FRAME - q->num_buffers);
···
2547
2581
fileio->memory = VB2_MEMORY_MMAP;
2548
2582
fileio->type = q->type;
2549
2583
q->fileio = fileio;
2550
-
ret = vb2_core_reqbufs(q, fileio->memory, 0, &fileio->count);
2584
+
ret = vb2_core_reqbufs(q, fileio->memory, &fileio->count);
2551
2585
if (ret)
2552
2586
goto err_kfree;
2553
2587
···
2604
2638
2605
2639
err_reqbufs:
2606
2640
fileio->count = 0;
2607
-
vb2_core_reqbufs(q, fileio->memory, 0, &fileio->count);
2641
+
vb2_core_reqbufs(q, fileio->memory, &fileio->count);
2608
2642
2609
2643
err_kfree:
2610
2644
q->fileio = NULL;
···
2624
2658
vb2_core_streamoff(q, q->type);
2625
2659
q->fileio = NULL;
2626
2660
fileio->count = 0;
2627
-
vb2_core_reqbufs(q, fileio->memory, 0, &fileio->count);
2661
+
vb2_core_reqbufs(q, fileio->memory, &fileio->count);
2628
2662
kfree(fileio);
2629
2663
dprintk(q, 3, "file io emulator closed\n");
2630
2664
}
-19
drivers/media/common/videobuf2/videobuf2-dma-contig.c
-19
drivers/media/common/videobuf2/videobuf2-dma-contig.c
···
42
42
struct dma_buf_attachment *db_attach;
43
43
};
44
44
45
-
static inline bool vb2_dc_buffer_consistent(unsigned long attr)
46
-
{
47
-
return !(attr & DMA_ATTR_NON_CONSISTENT);
48
-
}
49
-
50
45
/*********************************************/
51
46
/* scatterlist table functions */
52
47
/*********************************************/
···
336
341
vb2_dc_dmabuf_ops_begin_cpu_access(struct dma_buf *dbuf,
337
342
enum dma_data_direction direction)
338
343
{
339
-
struct vb2_dc_buf *buf = dbuf->priv;
340
-
struct sg_table *sgt = buf->dma_sgt;
341
-
342
-
if (vb2_dc_buffer_consistent(buf->attrs))
343
-
return 0;
344
-
345
-
dma_sync_sg_for_cpu(buf->dev, sgt->sgl, sgt->nents, buf->dma_dir);
346
344
return 0;
347
345
}
348
346
···
343
355
vb2_dc_dmabuf_ops_end_cpu_access(struct dma_buf *dbuf,
344
356
enum dma_data_direction direction)
345
357
{
346
-
struct vb2_dc_buf *buf = dbuf->priv;
347
-
struct sg_table *sgt = buf->dma_sgt;
348
-
349
-
if (vb2_dc_buffer_consistent(buf->attrs))
350
-
return 0;
351
-
352
-
dma_sync_sg_for_device(buf->dev, sgt->sgl, sgt->nents, buf->dma_dir);
353
358
return 0;
354
359
}
355
360
+1
-2
drivers/media/common/videobuf2/videobuf2-dma-sg.c
+1
-2
drivers/media/common/videobuf2/videobuf2-dma-sg.c
···
123
123
/*
124
124
* NOTE: dma-sg allocates memory using the page allocator directly, so
125
125
* there is no memory consistency guarantee, hence dma-sg ignores DMA
126
-
* attributes passed from the upper layer. That means that
127
-
* V4L2_FLAG_MEMORY_NON_CONSISTENT has no effect on dma-sg buffers.
126
+
* attributes passed from the upper layer.
128
127
*/
129
128
buf->pages = kvmalloc_array(buf->num_pages, sizeof(struct page *),
130
129
GFP_KERNEL | __GFP_ZERO);
+2
-16
drivers/media/common/videobuf2/videobuf2-v4l2.c
+2
-16
drivers/media/common/videobuf2/videobuf2-v4l2.c
···
722
722
#endif
723
723
}
724
724
725
-
static void clear_consistency_attr(struct vb2_queue *q,
726
-
int memory,
727
-
unsigned int *flags)
728
-
{
729
-
if (!q->allow_cache_hints || memory != V4L2_MEMORY_MMAP)
730
-
*flags &= ~V4L2_FLAG_MEMORY_NON_CONSISTENT;
731
-
}
732
-
733
725
int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req)
734
726
{
735
727
int ret = vb2_verify_memory_type(q, req->memory, req->type);
736
728
737
729
fill_buf_caps(q, &req->capabilities);
738
-
clear_consistency_attr(q, req->memory, &req->flags);
739
-
return ret ? ret : vb2_core_reqbufs(q, req->memory,
740
-
req->flags, &req->count);
730
+
return ret ? ret : vb2_core_reqbufs(q, req->memory, &req->count);
741
731
}
742
732
EXPORT_SYMBOL_GPL(vb2_reqbufs);
743
733
···
759
769
unsigned i;
760
770
761
771
fill_buf_caps(q, &create->capabilities);
762
-
clear_consistency_attr(q, create->memory, &create->flags);
763
772
create->index = q->num_buffers;
764
773
if (create->count == 0)
765
774
return ret != -EBUSY ? ret : 0;
···
802
813
if (requested_sizes[i] == 0)
803
814
return -EINVAL;
804
815
return ret ? ret : vb2_core_create_bufs(q, create->memory,
805
-
create->flags,
806
816
&create->count,
807
817
requested_planes,
808
818
requested_sizes);
···
986
998
int res = vb2_verify_memory_type(vdev->queue, p->memory, p->type);
987
999
988
1000
fill_buf_caps(vdev->queue, &p->capabilities);
989
-
clear_consistency_attr(vdev->queue, p->memory, &p->flags);
990
1001
if (res)
991
1002
return res;
992
1003
if (vb2_queue_is_busy(vdev, file))
993
1004
return -EBUSY;
994
-
res = vb2_core_reqbufs(vdev->queue, p->memory, p->flags, &p->count);
1005
+
res = vb2_core_reqbufs(vdev->queue, p->memory, &p->count);
995
1006
/* If count == 0, then the owner has released all buffers and he
996
1007
is no longer owner of the queue. Otherwise we have a new owner. */
997
1008
if (res == 0)
···
1008
1021
1009
1022
p->index = vdev->queue->num_buffers;
1010
1023
fill_buf_caps(vdev->queue, &p->capabilities);
1011
-
clear_consistency_attr(vdev->queue, p->memory, &p->flags);
1012
1024
/*
1013
1025
* If count == 0, then just check if memory and type are valid.
1014
1026
* Any -EBUSY result from vb2_verify_memory_type can be mapped to 0.
+1
-1
drivers/media/dvb-core/dvb_vb2.c
+1
-1
drivers/media/dvb-core/dvb_vb2.c
···
342
342
343
343
ctx->buf_siz = req->size;
344
344
ctx->buf_cnt = req->count;
345
-
ret = vb2_core_reqbufs(&ctx->vb_q, VB2_MEMORY_MMAP, 0, &req->count);
345
+
ret = vb2_core_reqbufs(&ctx->vb_q, VB2_MEMORY_MMAP, &req->count);
346
346
if (ret) {
347
347
ctx->state = DVB_VB2_STATE_NONE;
348
348
dprintk(1, "[%s] count=%d size=%d errno=%d\n", ctx->name,
+2
-8
drivers/media/v4l2-core/v4l2-compat-ioctl32.c
+2
-8
drivers/media/v4l2-core/v4l2-compat-ioctl32.c
···
246
246
* @memory: buffer memory type
247
247
* @format: frame format, for which buffers are requested
248
248
* @capabilities: capabilities of this buffer type.
249
-
* @flags: additional buffer management attributes (ignored unless the
250
-
* queue has V4L2_BUF_CAP_SUPPORTS_MMAP_CACHE_HINTS capability and
251
-
* configured for MMAP streaming I/O).
252
249
* @reserved: future extensions
253
250
*/
254
251
struct v4l2_create_buffers32 {
···
254
257
__u32 memory; /* enum v4l2_memory */
255
258
struct v4l2_format32 format;
256
259
__u32 capabilities;
257
-
__u32 flags;
258
-
__u32 reserved[6];
260
+
__u32 reserved[7];
259
261
};
260
262
261
263
static int __bufsize_v4l2_format(struct v4l2_format32 __user *p32, u32 *size)
···
355
359
{
356
360
if (!access_ok(p32, sizeof(*p32)) ||
357
361
copy_in_user(p64, p32,
358
-
offsetof(struct v4l2_create_buffers32, format)) ||
359
-
assign_in_user(&p64->flags, &p32->flags))
362
+
offsetof(struct v4l2_create_buffers32, format)))
360
363
return -EFAULT;
361
364
return __get_v4l2_format32(&p64->format, &p32->format,
362
365
aux_buf, aux_space);
···
417
422
copy_in_user(p32, p64,
418
423
offsetof(struct v4l2_create_buffers32, format)) ||
419
424
assign_in_user(&p32->capabilities, &p64->capabilities) ||
420
-
assign_in_user(&p32->flags, &p64->flags) ||
421
425
copy_in_user(p32->reserved, p64->reserved, sizeof(p64->reserved)))
422
426
return -EFAULT;
423
427
return __put_v4l2_format32(&p64->format, &p32->format);
+4
-1
drivers/media/v4l2-core/v4l2-ioctl.c
+4
-1
drivers/media/v4l2-core/v4l2-ioctl.c
···
2042
2042
2043
2043
if (ret)
2044
2044
return ret;
2045
+
2046
+
CLEAR_AFTER_FIELD(p, capabilities);
2047
+
2045
2048
return ops->vidioc_reqbufs(file, fh, p);
2046
2049
}
2047
2050
···
2084
2081
if (ret)
2085
2082
return ret;
2086
2083
2087
-
CLEAR_AFTER_FIELD(create, flags);
2084
+
CLEAR_AFTER_FIELD(create, capabilities);
2088
2085
2089
2086
v4l_sanitize_format(&create->format);
2090
2087
+4
drivers/memstick/core/memstick.c
+4
drivers/memstick/core/memstick.c
···
441
441
} else if (host->card->stop)
442
442
host->card->stop(host->card);
443
443
444
+
if (host->removing)
445
+
goto out_power_off;
446
+
444
447
card = memstick_alloc_card(host);
445
448
446
449
if (!card) {
···
548
545
*/
549
546
void memstick_remove_host(struct memstick_host *host)
550
547
{
548
+
host->removing = 1;
551
549
flush_workqueue(workqueue);
552
550
mutex_lock(&host->lock);
553
551
if (host->card)
+1
-1
drivers/mmc/host/mmc_spi.c
+1
-1
drivers/mmc/host/mmc_spi.c
···
1320
1320
DMA_BIDIRECTIONAL);
1321
1321
}
1322
1322
#else
1323
-
static inline mmc_spi_dma_alloc(struct mmc_spi_host *host) { return 0; }
1323
+
static inline int mmc_spi_dma_alloc(struct mmc_spi_host *host) { return 0; }
1324
1324
static inline void mmc_spi_dma_free(struct mmc_spi_host *host) {}
1325
1325
#endif
1326
1326
+2
-1
drivers/mmc/host/sdhci-pci-core.c
+2
-1
drivers/mmc/host/sdhci-pci-core.c
···
794
794
static bool glk_broken_cqhci(struct sdhci_pci_slot *slot)
795
795
{
796
796
return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC &&
797
-
dmi_match(DMI_BIOS_VENDOR, "LENOVO");
797
+
(dmi_match(DMI_BIOS_VENDOR, "LENOVO") ||
798
+
dmi_match(DMI_SYS_VENDOR, "IRBIS"));
798
799
}
799
800
800
801
static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
+6
-3
drivers/net/bonding/bond_alb.c
+6
-3
drivers/net/bonding/bond_alb.c
···
942
942
bool strict_match;
943
943
};
944
944
945
-
static int alb_upper_dev_walk(struct net_device *upper, void *_data)
945
+
static int alb_upper_dev_walk(struct net_device *upper,
946
+
struct netdev_nested_priv *priv)
946
947
{
947
-
struct alb_walk_data *data = _data;
948
+
struct alb_walk_data *data = (struct alb_walk_data *)priv->data;
948
949
bool strict_match = data->strict_match;
949
950
struct bonding *bond = data->bond;
950
951
struct slave *slave = data->slave;
···
984
983
bool strict_match)
985
984
{
986
985
struct bonding *bond = bond_get_bond_by_slave(slave);
986
+
struct netdev_nested_priv priv;
987
987
struct alb_walk_data data = {
988
988
.strict_match = strict_match,
989
989
.mac_addr = mac_addr,
···
992
990
.bond = bond,
993
991
};
994
992
993
+
priv.data = (void *)&data;
995
994
/* send untagged */
996
995
alb_send_lp_vid(slave, mac_addr, 0, 0);
997
996
···
1000
997
* for that device.
1001
998
*/
1002
999
rcu_read_lock();
1003
-
netdev_walk_all_upper_dev_rcu(bond->dev, alb_upper_dev_walk, &data);
1000
+
netdev_walk_all_upper_dev_rcu(bond->dev, alb_upper_dev_walk, &priv);
1004
1001
rcu_read_unlock();
1005
1002
}
1006
1003
+8
-3
drivers/net/bonding/bond_main.c
+8
-3
drivers/net/bonding/bond_main.c
···
1315
1315
1316
1316
bond_dev->type = slave_dev->type;
1317
1317
bond_dev->hard_header_len = slave_dev->hard_header_len;
1318
+
bond_dev->needed_headroom = slave_dev->needed_headroom;
1318
1319
bond_dev->addr_len = slave_dev->addr_len;
1319
1320
1320
1321
memcpy(bond_dev->broadcast, slave_dev->broadcast,
···
2511
2510
}
2512
2511
}
2513
2512
2514
-
static int bond_upper_dev_walk(struct net_device *upper, void *data)
2513
+
static int bond_upper_dev_walk(struct net_device *upper,
2514
+
struct netdev_nested_priv *priv)
2515
2515
{
2516
-
__be32 ip = *((__be32 *)data);
2516
+
__be32 ip = *(__be32 *)priv->data;
2517
2517
2518
2518
return ip == bond_confirm_addr(upper, 0, ip);
2519
2519
}
2520
2520
2521
2521
static bool bond_has_this_ip(struct bonding *bond, __be32 ip)
2522
2522
{
2523
+
struct netdev_nested_priv priv = {
2524
+
.data = (void *)&ip,
2525
+
};
2523
2526
bool ret = false;
2524
2527
2525
2528
if (ip == bond_confirm_addr(bond->dev, 0, ip))
2526
2529
return true;
2527
2530
2528
2531
rcu_read_lock();
2529
-
if (netdev_walk_all_upper_dev_rcu(bond->dev, bond_upper_dev_walk, &ip))
2532
+
if (netdev_walk_all_upper_dev_rcu(bond->dev, bond_upper_dev_walk, &priv))
2530
2533
ret = true;
2531
2534
rcu_read_unlock();
2532
2535
+12
-8
drivers/net/dsa/microchip/ksz_common.c
+12
-8
drivers/net/dsa/microchip/ksz_common.c
···
387
387
int ksz_switch_register(struct ksz_device *dev,
388
388
const struct ksz_dev_ops *ops)
389
389
{
390
+
struct device_node *port, *ports;
390
391
phy_interface_t interface;
391
-
struct device_node *port;
392
392
unsigned int port_num;
393
393
int ret;
394
394
···
430
430
ret = of_get_phy_mode(dev->dev->of_node, &interface);
431
431
if (ret == 0)
432
432
dev->compat_interface = interface;
433
-
for_each_available_child_of_node(dev->dev->of_node, port) {
434
-
if (of_property_read_u32(port, "reg", &port_num))
435
-
continue;
436
-
if (port_num >= dev->port_cnt)
437
-
return -EINVAL;
438
-
of_get_phy_mode(port, &dev->ports[port_num].interface);
439
-
}
433
+
ports = of_get_child_by_name(dev->dev->of_node, "ports");
434
+
if (ports)
435
+
for_each_available_child_of_node(ports, port) {
436
+
if (of_property_read_u32(port, "reg",
437
+
&port_num))
438
+
continue;
439
+
if (port_num >= dev->port_cnt)
440
+
return -EINVAL;
441
+
of_get_phy_mode(port,
442
+
&dev->ports[port_num].interface);
443
+
}
440
444
dev->synclko_125 = of_property_read_bool(dev->dev->of_node,
441
445
"microchip,synclko-125");
442
446
}
+27
-7
drivers/net/dsa/ocelot/felix_vsc9959.c
+27
-7
drivers/net/dsa/ocelot/felix_vsc9959.c
···
815
815
[VCAP_IS2_ACT_POLICE_ENA] = { 9, 1},
816
816
[VCAP_IS2_ACT_POLICE_IDX] = { 10, 9},
817
817
[VCAP_IS2_ACT_POLICE_VCAP_ONLY] = { 19, 1},
818
-
[VCAP_IS2_ACT_PORT_MASK] = { 20, 11},
819
-
[VCAP_IS2_ACT_REW_OP] = { 31, 9},
820
-
[VCAP_IS2_ACT_SMAC_REPLACE_ENA] = { 40, 1},
821
-
[VCAP_IS2_ACT_RSV] = { 41, 2},
822
-
[VCAP_IS2_ACT_ACL_ID] = { 43, 6},
823
-
[VCAP_IS2_ACT_HIT_CNT] = { 49, 32},
818
+
[VCAP_IS2_ACT_PORT_MASK] = { 20, 6},
819
+
[VCAP_IS2_ACT_REW_OP] = { 26, 9},
820
+
[VCAP_IS2_ACT_SMAC_REPLACE_ENA] = { 35, 1},
821
+
[VCAP_IS2_ACT_RSV] = { 36, 2},
822
+
[VCAP_IS2_ACT_ACL_ID] = { 38, 6},
823
+
[VCAP_IS2_ACT_HIT_CNT] = { 44, 32},
824
824
};
825
825
826
826
static struct vcap_props vsc9959_vcap_props[] = {
···
1122
1122
static void vsc9959_sched_speed_set(struct ocelot *ocelot, int port,
1123
1123
u32 speed)
1124
1124
{
1125
+
u8 tas_speed;
1126
+
1127
+
switch (speed) {
1128
+
case SPEED_10:
1129
+
tas_speed = OCELOT_SPEED_10;
1130
+
break;
1131
+
case SPEED_100:
1132
+
tas_speed = OCELOT_SPEED_100;
1133
+
break;
1134
+
case SPEED_1000:
1135
+
tas_speed = OCELOT_SPEED_1000;
1136
+
break;
1137
+
case SPEED_2500:
1138
+
tas_speed = OCELOT_SPEED_2500;
1139
+
break;
1140
+
default:
1141
+
tas_speed = OCELOT_SPEED_1000;
1142
+
break;
1143
+
}
1144
+
1125
1145
ocelot_rmw_rix(ocelot,
1126
-
QSYS_TAG_CONFIG_LINK_SPEED(speed),
1146
+
QSYS_TAG_CONFIG_LINK_SPEED(tas_speed),
1127
1147
QSYS_TAG_CONFIG_LINK_SPEED_M,
1128
1148
QSYS_TAG_CONFIG, port);
1129
1149
}
+1
-1
drivers/net/dsa/ocelot/seville_vsc9953.c
+1
-1
drivers/net/dsa/ocelot/seville_vsc9953.c
+1
-1
drivers/net/ethernet/3com/typhoon.h
+1
-1
drivers/net/ethernet/3com/typhoon.h
···
33
33
u32 lastWrite;
34
34
};
35
35
36
-
/* The Typoon transmit ring -- same as a basic ring, plus:
36
+
/* The Typhoon transmit ring -- same as a basic ring, plus:
37
37
* lastRead: where we're at in regard to cleaning up the ring
38
38
* writeRegister: register to use for writing (different for Hi & Lo rings)
39
39
*/
+1
-1
drivers/net/ethernet/aquantia/atlantic/Makefile
+1
-1
drivers/net/ethernet/aquantia/atlantic/Makefile
+8
-8
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
+8
-8
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
···
284
284
#define CCM_REG_GR_ARB_TYPE 0xd015c
285
285
/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the
286
286
highest priority is 3. It is supposed; that the Store channel priority is
287
-
the compliment to 4 of the rest priorities - Aggregation channel; Load
287
+
the complement to 4 of the rest priorities - Aggregation channel; Load
288
288
(FIC0) channel and Load (FIC1). */
289
289
#define CCM_REG_GR_LD0_PR 0xd0164
290
290
/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the
291
291
highest priority is 3. It is supposed; that the Store channel priority is
292
-
the compliment to 4 of the rest priorities - Aggregation channel; Load
292
+
the complement to 4 of the rest priorities - Aggregation channel; Load
293
293
(FIC0) channel and Load (FIC1). */
294
294
#define CCM_REG_GR_LD1_PR 0xd0168
295
295
/* [RW 2] General flags index. */
···
4489
4489
#define TCM_REG_GR_ARB_TYPE 0x50114
4490
4490
/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the
4491
4491
highest priority is 3. It is supposed that the Store channel is the
4492
-
compliment of the other 3 groups. */
4492
+
complement of the other 3 groups. */
4493
4493
#define TCM_REG_GR_LD0_PR 0x5011c
4494
4494
/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the
4495
4495
highest priority is 3. It is supposed that the Store channel is the
4496
-
compliment of the other 3 groups. */
4496
+
complement of the other 3 groups. */
4497
4497
#define TCM_REG_GR_LD1_PR 0x50120
4498
4498
/* [RW 4] The number of double REG-pairs; loaded from the STORM context and
4499
4499
sent to STORM; for a specific connection type. The double REG-pairs are
···
5020
5020
#define UCM_REG_GR_ARB_TYPE 0xe0144
5021
5021
/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the
5022
5022
highest priority is 3. It is supposed that the Store channel group is
5023
-
compliment to the others. */
5023
+
complement to the others. */
5024
5024
#define UCM_REG_GR_LD0_PR 0xe014c
5025
5025
/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the
5026
5026
highest priority is 3. It is supposed that the Store channel group is
5027
-
compliment to the others. */
5027
+
complement to the others. */
5028
5028
#define UCM_REG_GR_LD1_PR 0xe0150
5029
5029
/* [RW 2] The queue index for invalidate counter flag decision. */
5030
5030
#define UCM_REG_INV_CFLG_Q 0xe00e4
···
5523
5523
#define XCM_REG_GR_ARB_TYPE 0x2020c
5524
5524
/* [RW 2] Load (FIC0) channel group priority. The lowest priority is 0; the
5525
5525
highest priority is 3. It is supposed that the Channel group is the
5526
-
compliment of the other 3 groups. */
5526
+
complement of the other 3 groups. */
5527
5527
#define XCM_REG_GR_LD0_PR 0x20214
5528
5528
/* [RW 2] Load (FIC1) channel group priority. The lowest priority is 0; the
5529
5529
highest priority is 3. It is supposed that the Channel group is the
5530
-
compliment of the other 3 groups. */
5530
+
complement of the other 3 groups. */
5531
5531
#define XCM_REG_GR_LD1_PR 0x20218
5532
5532
/* [RW 1] Input nig0 Interface enable. If 0 - the valid input is
5533
5533
disregarded; acknowledge output is deasserted; all other signals are
+4
-2
drivers/net/ethernet/cavium/octeon/octeon_mgmt.c
+4
-2
drivers/net/ethernet/cavium/octeon/octeon_mgmt.c
···
1219
1219
*/
1220
1220
if (netdev->phydev) {
1221
1221
netif_carrier_off(netdev);
1222
-
phy_start_aneg(netdev->phydev);
1222
+
phy_start(netdev->phydev);
1223
1223
}
1224
1224
1225
1225
netif_wake_queue(netdev);
···
1247
1247
napi_disable(&p->napi);
1248
1248
netif_stop_queue(netdev);
1249
1249
1250
-
if (netdev->phydev)
1250
+
if (netdev->phydev) {
1251
+
phy_stop(netdev->phydev);
1251
1252
phy_disconnect(netdev->phydev);
1253
+
}
1252
1254
1253
1255
netif_carrier_off(netdev);
1254
1256
+3
-1
drivers/net/ethernet/freescale/dpaa2/dpni-cmd.h
+3
-1
drivers/net/ethernet/freescale/dpaa2/dpni-cmd.h
···
12
12
#define DPNI_VER_MAJOR 7
13
13
#define DPNI_VER_MINOR 0
14
14
#define DPNI_CMD_BASE_VERSION 1
15
+
#define DPNI_CMD_2ND_VERSION 2
15
16
#define DPNI_CMD_ID_OFFSET 4
16
17
17
18
#define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
19
+
#define DPNI_CMD_V2(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_2ND_VERSION)
18
20
19
21
#define DPNI_CMDID_OPEN DPNI_CMD(0x801)
20
22
#define DPNI_CMDID_CLOSE DPNI_CMD(0x800)
···
48
46
#define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216)
49
47
#define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217)
50
48
#define DPNI_CMDID_SET_LINK_CFG DPNI_CMD(0x21A)
51
-
#define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD(0x21B)
49
+
#define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD_V2(0x21B)
52
50
53
51
#define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220)
54
52
#define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221)
+1
-1
drivers/net/ethernet/freescale/xgmac_mdio.c
+1
-1
drivers/net/ethernet/freescale/xgmac_mdio.c
···
229
229
/* Return all Fs if nothing was there */
230
230
if ((xgmac_read32(®s->mdio_stat, endian) & MDIO_STAT_RD_ER) &&
231
231
!priv->has_a011043) {
232
-
dev_err(&bus->dev,
232
+
dev_dbg(&bus->dev,
233
233
"Error while reading PHY%d reg at %d.%hhu\n",
234
234
phy_id, dev_addr, regnum);
235
235
return 0xffff;
+1
drivers/net/ethernet/huawei/hinic/Kconfig
+1
drivers/net/ethernet/huawei/hinic/Kconfig
+3
-3
drivers/net/ethernet/huawei/hinic/hinic_port.c
+3
-3
drivers/net/ethernet/huawei/hinic/hinic_port.c
···
58
58
sizeof(port_mac_cmd),
59
59
&port_mac_cmd, &out_size);
60
60
if (err || out_size != sizeof(port_mac_cmd) ||
61
-
(port_mac_cmd.status &&
62
-
port_mac_cmd.status != HINIC_PF_SET_VF_ALREADY &&
63
-
port_mac_cmd.status != HINIC_MGMT_STATUS_EXIST)) {
61
+
(port_mac_cmd.status &&
62
+
(port_mac_cmd.status != HINIC_PF_SET_VF_ALREADY || !HINIC_IS_VF(hwif)) &&
63
+
port_mac_cmd.status != HINIC_MGMT_STATUS_EXIST)) {
64
64
dev_err(&pdev->dev, "Failed to change MAC, err: %d, status: 0x%x, out size: 0x%x\n",
65
65
err, port_mac_cmd.status, out_size);
66
66
return -EFAULT;
+2
-10
drivers/net/ethernet/huawei/hinic/hinic_sriov.c
+2
-10
drivers/net/ethernet/huawei/hinic/hinic_sriov.c
···
38
38
err = hinic_port_msg_cmd(hwdev, HINIC_PORT_CMD_SET_MAC, &mac_info,
39
39
sizeof(mac_info), &mac_info, &out_size);
40
40
if (err || out_size != sizeof(mac_info) ||
41
-
(mac_info.status && mac_info.status != HINIC_PF_SET_VF_ALREADY &&
42
-
mac_info.status != HINIC_MGMT_STATUS_EXIST)) {
41
+
(mac_info.status && mac_info.status != HINIC_MGMT_STATUS_EXIST)) {
43
42
dev_err(&hwdev->func_to_io.hwif->pdev->dev, "Failed to set MAC, err: %d, status: 0x%x, out size: 0x%x\n",
44
43
err, mac_info.status, out_size);
45
44
return -EIO;
···
502
503
503
504
static int hinic_check_mac_info(u8 status, u16 vlan_id)
504
505
{
505
-
if ((status && status != HINIC_MGMT_STATUS_EXIST &&
506
-
status != HINIC_PF_SET_VF_ALREADY) ||
506
+
if ((status && status != HINIC_MGMT_STATUS_EXIST) ||
507
507
(vlan_id & CHECK_IPSU_15BIT &&
508
508
status == HINIC_MGMT_STATUS_EXIST))
509
509
return -EINVAL;
···
542
544
"Failed to update MAC, err: %d, status: 0x%x, out size: 0x%x\n",
543
545
err, mac_info.status, out_size);
544
546
return -EINVAL;
545
-
}
546
-
547
-
if (mac_info.status == HINIC_PF_SET_VF_ALREADY) {
548
-
dev_warn(&hwdev->hwif->pdev->dev,
549
-
"PF has already set VF MAC. Ignore update operation\n");
550
-
return HINIC_PF_SET_VF_ALREADY;
551
547
}
552
548
553
549
if (mac_info.status == HINIC_MGMT_STATUS_EXIST)
+2
-2
drivers/net/ethernet/intel/iavf/iavf_main.c
+2
-2
drivers/net/ethernet/intel/iavf/iavf_main.c
···
3806
3806
static int __maybe_unused iavf_resume(struct device *dev_d)
3807
3807
{
3808
3808
struct pci_dev *pdev = to_pci_dev(dev_d);
3809
-
struct iavf_adapter *adapter = pci_get_drvdata(pdev);
3810
-
struct net_device *netdev = adapter->netdev;
3809
+
struct net_device *netdev = pci_get_drvdata(pdev);
3810
+
struct iavf_adapter *adapter = netdev_priv(netdev);
3811
3811
u32 err;
3812
3812
3813
3813
pci_set_master(pdev);
+27
-22
drivers/net/ethernet/intel/ice/ice_common.c
+27
-22
drivers/net/ethernet/intel/ice/ice_common.c
···
2288
2288
{
2289
2289
struct ice_hw_func_caps *func_caps = &hw->func_caps;
2290
2290
struct ice_hw_dev_caps *dev_caps = &hw->dev_caps;
2291
-
u32 valid_func, rxq_first_id, txq_first_id;
2292
-
u32 msix_vector_first_id, max_mtu;
2291
+
struct ice_hw_common_caps cached_caps;
2293
2292
u32 num_funcs;
2294
2293
2295
2294
/* cache some func_caps values that should be restored after memset */
2296
-
valid_func = func_caps->common_cap.valid_functions;
2297
-
txq_first_id = func_caps->common_cap.txq_first_id;
2298
-
rxq_first_id = func_caps->common_cap.rxq_first_id;
2299
-
msix_vector_first_id = func_caps->common_cap.msix_vector_first_id;
2300
-
max_mtu = func_caps->common_cap.max_mtu;
2295
+
cached_caps = func_caps->common_cap;
2301
2296
2302
2297
/* unset func capabilities */
2303
2298
memset(func_caps, 0, sizeof(*func_caps));
2304
2299
2300
+
#define ICE_RESTORE_FUNC_CAP(name) \
2301
+
func_caps->common_cap.name = cached_caps.name
2302
+
2305
2303
/* restore cached values */
2306
-
func_caps->common_cap.valid_functions = valid_func;
2307
-
func_caps->common_cap.txq_first_id = txq_first_id;
2308
-
func_caps->common_cap.rxq_first_id = rxq_first_id;
2309
-
func_caps->common_cap.msix_vector_first_id = msix_vector_first_id;
2310
-
func_caps->common_cap.max_mtu = max_mtu;
2304
+
ICE_RESTORE_FUNC_CAP(valid_functions);
2305
+
ICE_RESTORE_FUNC_CAP(txq_first_id);
2306
+
ICE_RESTORE_FUNC_CAP(rxq_first_id);
2307
+
ICE_RESTORE_FUNC_CAP(msix_vector_first_id);
2308
+
ICE_RESTORE_FUNC_CAP(max_mtu);
2309
+
ICE_RESTORE_FUNC_CAP(nvm_unified_update);
2310
+
ICE_RESTORE_FUNC_CAP(nvm_update_pending_nvm);
2311
+
ICE_RESTORE_FUNC_CAP(nvm_update_pending_orom);
2312
+
ICE_RESTORE_FUNC_CAP(nvm_update_pending_netlist);
2311
2313
2312
2314
/* one Tx and one Rx queue in safe mode */
2313
2315
func_caps->common_cap.num_rxq = 1;
···
2320
2318
func_caps->guar_num_vsi = 1;
2321
2319
2322
2320
/* cache some dev_caps values that should be restored after memset */
2323
-
valid_func = dev_caps->common_cap.valid_functions;
2324
-
txq_first_id = dev_caps->common_cap.txq_first_id;
2325
-
rxq_first_id = dev_caps->common_cap.rxq_first_id;
2326
-
msix_vector_first_id = dev_caps->common_cap.msix_vector_first_id;
2327
-
max_mtu = dev_caps->common_cap.max_mtu;
2321
+
cached_caps = dev_caps->common_cap;
2328
2322
num_funcs = dev_caps->num_funcs;
2329
2323
2330
2324
/* unset dev capabilities */
2331
2325
memset(dev_caps, 0, sizeof(*dev_caps));
2332
2326
2327
+
#define ICE_RESTORE_DEV_CAP(name) \
2328
+
dev_caps->common_cap.name = cached_caps.name
2329
+
2333
2330
/* restore cached values */
2334
-
dev_caps->common_cap.valid_functions = valid_func;
2335
-
dev_caps->common_cap.txq_first_id = txq_first_id;
2336
-
dev_caps->common_cap.rxq_first_id = rxq_first_id;
2337
-
dev_caps->common_cap.msix_vector_first_id = msix_vector_first_id;
2338
-
dev_caps->common_cap.max_mtu = max_mtu;
2331
+
ICE_RESTORE_DEV_CAP(valid_functions);
2332
+
ICE_RESTORE_DEV_CAP(txq_first_id);
2333
+
ICE_RESTORE_DEV_CAP(rxq_first_id);
2334
+
ICE_RESTORE_DEV_CAP(msix_vector_first_id);
2335
+
ICE_RESTORE_DEV_CAP(max_mtu);
2336
+
ICE_RESTORE_DEV_CAP(nvm_unified_update);
2337
+
ICE_RESTORE_DEV_CAP(nvm_update_pending_nvm);
2338
+
ICE_RESTORE_DEV_CAP(nvm_update_pending_orom);
2339
+
ICE_RESTORE_DEV_CAP(nvm_update_pending_netlist);
2339
2340
dev_caps->num_funcs = num_funcs;
2340
2341
2341
2342
/* one Tx and one Rx queue per function in safe mode */
+8
-2
drivers/net/ethernet/intel/ice/ice_fw_update.c
+8
-2
drivers/net/ethernet/intel/ice/ice_fw_update.c
···
289
289
return -EIO;
290
290
}
291
291
292
-
err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_write, HZ, &event);
292
+
/* In most cases, firmware reports a write completion within a few
293
+
* milliseconds. However, it has been observed that a completion might
294
+
* take more than a second to complete in some cases. The timeout here
295
+
* is conservative and is intended to prevent failure to update when
296
+
* firmware is slow to respond.
297
+
*/
298
+
err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_write, 15 * HZ, &event);
293
299
if (err) {
294
300
dev_err(dev, "Timed out waiting for firmware write completion for module 0x%02x, err %d\n",
295
301
module, err);
···
519
513
return -EIO;
520
514
}
521
515
522
-
err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_write_activate, HZ,
516
+
err = ice_aq_wait_for_event(pf, ice_aqc_opc_nvm_write_activate, 30 * HZ,
523
517
&event);
524
518
if (err) {
525
519
dev_err(dev, "Timed out waiting for firmware to switch active flash banks, err %d\n",
+16
-4
drivers/net/ethernet/intel/ice/ice_lib.c
+16
-4
drivers/net/ethernet/intel/ice/ice_lib.c
···
246
246
* ice_vsi_delete - delete a VSI from the switch
247
247
* @vsi: pointer to VSI being removed
248
248
*/
249
-
void ice_vsi_delete(struct ice_vsi *vsi)
249
+
static void ice_vsi_delete(struct ice_vsi *vsi)
250
250
{
251
251
struct ice_pf *pf = vsi->back;
252
252
struct ice_vsi_ctx *ctxt;
···
313
313
*
314
314
* Returns 0 on success, negative on failure
315
315
*/
316
-
int ice_vsi_clear(struct ice_vsi *vsi)
316
+
static int ice_vsi_clear(struct ice_vsi *vsi)
317
317
{
318
318
struct ice_pf *pf = NULL;
319
319
struct device *dev;
···
563
563
* ice_vsi_put_qs - Release queues from VSI to PF
564
564
* @vsi: the VSI that is going to release queues
565
565
*/
566
-
void ice_vsi_put_qs(struct ice_vsi *vsi)
566
+
static void ice_vsi_put_qs(struct ice_vsi *vsi)
567
567
{
568
568
struct ice_pf *pf = vsi->back;
569
569
int i;
···
1195
1195
static void ice_vsi_clear_rings(struct ice_vsi *vsi)
1196
1196
{
1197
1197
int i;
1198
+
1199
+
/* Avoid stale references by clearing map from vector to ring */
1200
+
if (vsi->q_vectors) {
1201
+
ice_for_each_q_vector(vsi, i) {
1202
+
struct ice_q_vector *q_vector = vsi->q_vectors[i];
1203
+
1204
+
if (q_vector) {
1205
+
q_vector->tx.ring = NULL;
1206
+
q_vector->rx.ring = NULL;
1207
+
}
1208
+
}
1209
+
}
1198
1210
1199
1211
if (vsi->tx_rings) {
1200
1212
for (i = 0; i < vsi->alloc_txq; i++) {
···
2303
2291
if (status) {
2304
2292
dev_err(dev, "VSI %d failed lan queue config, error %s\n",
2305
2293
vsi->vsi_num, ice_stat_str(status));
2306
-
goto unroll_vector_base;
2294
+
goto unroll_clear_rings;
2307
2295
}
2308
2296
2309
2297
/* Add switch rule to drop all Tx Flow Control Frames, of look up
-6
drivers/net/ethernet/intel/ice/ice_lib.h
-6
drivers/net/ethernet/intel/ice/ice_lib.h
···
45
45
46
46
void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create);
47
47
48
-
void ice_vsi_delete(struct ice_vsi *vsi);
49
-
50
-
int ice_vsi_clear(struct ice_vsi *vsi);
51
-
52
48
#ifdef CONFIG_DCB
53
49
int ice_vsi_cfg_tc(struct ice_vsi *vsi, u8 ena_tc);
54
50
#endif /* CONFIG_DCB */
···
74
78
75
79
void
76
80
ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio);
77
-
78
-
void ice_vsi_put_qs(struct ice_vsi *vsi);
79
81
80
82
void ice_vsi_dis_irq(struct ice_vsi *vsi);
81
83
+4
-10
drivers/net/ethernet/intel/ice/ice_main.c
+4
-10
drivers/net/ethernet/intel/ice/ice_main.c
···
3169
3169
return -EBUSY;
3170
3170
3171
3171
vsi = ice_pf_vsi_setup(pf, pf->hw.port_info);
3172
-
if (!vsi) {
3173
-
status = -ENOMEM;
3174
-
goto unroll_vsi_setup;
3175
-
}
3172
+
if (!vsi)
3173
+
return -ENOMEM;
3176
3174
3177
3175
status = ice_cfg_netdev(vsi);
3178
3176
if (status) {
···
3217
3219
}
3218
3220
3219
3221
unroll_vsi_setup:
3220
-
if (vsi) {
3221
-
ice_vsi_free_q_vectors(vsi);
3222
-
ice_vsi_delete(vsi);
3223
-
ice_vsi_put_qs(vsi);
3224
-
ice_vsi_clear(vsi);
3225
-
}
3222
+
ice_vsi_release(vsi);
3226
3223
return status;
3227
3224
}
3228
3225
···
4541
4548
}
4542
4549
ice_clear_interrupt_scheme(pf);
4543
4550
4551
+
pci_save_state(pdev);
4544
4552
pci_wake_from_d3(pdev, pf->wol_ena);
4545
4553
pci_set_power_state(pdev, PCI_D3hot);
4546
4554
return 0;
+26
-11
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+26
-11
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
···
5391
5391
return err;
5392
5392
}
5393
5393
5394
-
static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5394
+
static int ixgbe_macvlan_up(struct net_device *vdev,
5395
+
struct netdev_nested_priv *priv)
5395
5396
{
5396
-
struct ixgbe_adapter *adapter = data;
5397
+
struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)priv->data;
5397
5398
struct ixgbe_fwd_adapter *accel;
5398
5399
5399
5400
if (!netif_is_macvlan(vdev))
···
5411
5410
5412
5411
static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5413
5412
{
5413
+
struct netdev_nested_priv priv = {
5414
+
.data = (void *)adapter,
5415
+
};
5416
+
5414
5417
netdev_walk_all_upper_dev_rcu(adapter->netdev,
5415
-
ixgbe_macvlan_up, adapter);
5418
+
ixgbe_macvlan_up, &priv);
5416
5419
}
5417
5420
5418
5421
static void ixgbe_configure(struct ixgbe_adapter *adapter)
···
9023
9018
}
9024
9019
9025
9020
#endif /* CONFIG_IXGBE_DCB */
9026
-
static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
9021
+
static int ixgbe_reassign_macvlan_pool(struct net_device *vdev,
9022
+
struct netdev_nested_priv *priv)
9027
9023
{
9028
-
struct ixgbe_adapter *adapter = data;
9024
+
struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)priv->data;
9029
9025
struct ixgbe_fwd_adapter *accel;
9030
9026
int pool;
9031
9027
···
9063
9057
static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9064
9058
{
9065
9059
struct ixgbe_adapter *adapter = netdev_priv(dev);
9060
+
struct netdev_nested_priv priv = {
9061
+
.data = (void *)adapter,
9062
+
};
9066
9063
9067
9064
/* flush any stale bits out of the fwd bitmask */
9068
9065
bitmap_clear(adapter->fwd_bitmask, 1, 63);
9069
9066
9070
9067
/* walk through upper devices reassigning pools */
9071
9068
netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9072
-
adapter);
9069
+
&priv);
9073
9070
}
9074
9071
9075
9072
/**
···
9246
9237
u8 queue;
9247
9238
};
9248
9239
9249
-
static int get_macvlan_queue(struct net_device *upper, void *_data)
9240
+
static int get_macvlan_queue(struct net_device *upper,
9241
+
struct netdev_nested_priv *priv)
9250
9242
{
9251
9243
if (netif_is_macvlan(upper)) {
9252
9244
struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9253
-
struct upper_walk_data *data = _data;
9254
-
struct ixgbe_adapter *adapter = data->adapter;
9255
-
int ifindex = data->ifindex;
9245
+
struct ixgbe_adapter *adapter;
9246
+
struct upper_walk_data *data;
9247
+
int ifindex;
9256
9248
9249
+
data = (struct upper_walk_data *)priv->data;
9250
+
ifindex = data->ifindex;
9251
+
adapter = data->adapter;
9257
9252
if (vadapter && upper->ifindex == ifindex) {
9258
9253
data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9259
9254
data->action = data->queue;
···
9273
9260
{
9274
9261
struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9275
9262
unsigned int num_vfs = adapter->num_vfs, vf;
9263
+
struct netdev_nested_priv priv;
9276
9264
struct upper_walk_data data;
9277
9265
struct net_device *upper;
9278
9266
···
9293
9279
data.ifindex = ifindex;
9294
9280
data.action = 0;
9295
9281
data.queue = 0;
9282
+
priv.data = (void *)&data;
9296
9283
if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9297
-
get_macvlan_queue, &data)) {
9284
+
get_macvlan_queue, &priv)) {
9298
9285
*action = data.action;
9299
9286
*queue = data.queue;
9300
9287
+2
drivers/net/ethernet/lantiq_xrx200.c
+2
drivers/net/ethernet/lantiq_xrx200.c
···
245
245
int pkts = 0;
246
246
int bytes = 0;
247
247
248
+
netif_tx_lock(net_dev);
248
249
while (pkts < budget) {
249
250
struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->tx_free];
250
251
···
269
268
net_dev->stats.tx_bytes += bytes;
270
269
netdev_completed_queue(ch->priv->net_dev, pkts, bytes);
271
270
271
+
netif_tx_unlock(net_dev);
272
272
if (netif_queue_stopped(net_dev))
273
273
netif_wake_queue(net_dev);
274
274
+2
-11
drivers/net/ethernet/marvell/mvneta.c
+2
-11
drivers/net/ethernet/marvell/mvneta.c
···
3397
3397
txq->last_desc = txq->size - 1;
3398
3398
3399
3399
txq->buf = kmalloc_array(txq->size, sizeof(*txq->buf), GFP_KERNEL);
3400
-
if (!txq->buf) {
3401
-
dma_free_coherent(pp->dev->dev.parent,
3402
-
txq->size * MVNETA_DESC_ALIGNED_SIZE,
3403
-
txq->descs, txq->descs_phys);
3400
+
if (!txq->buf)
3404
3401
return -ENOMEM;
3405
-
}
3406
3402
3407
3403
/* Allocate DMA buffers for TSO MAC/IP/TCP headers */
3408
3404
txq->tso_hdrs = dma_alloc_coherent(pp->dev->dev.parent,
3409
3405
txq->size * TSO_HEADER_SIZE,
3410
3406
&txq->tso_hdrs_phys, GFP_KERNEL);
3411
-
if (!txq->tso_hdrs) {
3412
-
kfree(txq->buf);
3413
-
dma_free_coherent(pp->dev->dev.parent,
3414
-
txq->size * MVNETA_DESC_ALIGNED_SIZE,
3415
-
txq->descs, txq->descs_phys);
3407
+
if (!txq->tso_hdrs)
3416
3408
return -ENOMEM;
3417
-
}
3418
3409
3419
3410
/* Setup XPS mapping */
3420
3411
if (txq_number > 1)
+10
-2
drivers/net/ethernet/marvell/octeontx2/af/mbox.c
+10
-2
drivers/net/ethernet/marvell/octeontx2/af/mbox.c
···
18
18
19
19
static const u16 msgs_offset = ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN);
20
20
21
-
void otx2_mbox_reset(struct otx2_mbox *mbox, int devid)
21
+
void __otx2_mbox_reset(struct otx2_mbox *mbox, int devid)
22
22
{
23
23
void *hw_mbase = mbox->hwbase + (devid * MBOX_SIZE);
24
24
struct otx2_mbox_dev *mdev = &mbox->dev[devid];
···
27
27
tx_hdr = hw_mbase + mbox->tx_start;
28
28
rx_hdr = hw_mbase + mbox->rx_start;
29
29
30
-
spin_lock(&mdev->mbox_lock);
31
30
mdev->msg_size = 0;
32
31
mdev->rsp_size = 0;
33
32
tx_hdr->num_msgs = 0;
34
33
tx_hdr->msg_size = 0;
35
34
rx_hdr->num_msgs = 0;
36
35
rx_hdr->msg_size = 0;
36
+
}
37
+
EXPORT_SYMBOL(__otx2_mbox_reset);
38
+
39
+
void otx2_mbox_reset(struct otx2_mbox *mbox, int devid)
40
+
{
41
+
struct otx2_mbox_dev *mdev = &mbox->dev[devid];
42
+
43
+
spin_lock(&mdev->mbox_lock);
44
+
__otx2_mbox_reset(mbox, devid);
37
45
spin_unlock(&mdev->mbox_lock);
38
46
}
39
47
EXPORT_SYMBOL(otx2_mbox_reset);
+1
drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+1
drivers/net/ethernet/marvell/octeontx2/af/mbox.h
···
93
93
};
94
94
95
95
void otx2_mbox_reset(struct otx2_mbox *mbox, int devid);
96
+
void __otx2_mbox_reset(struct otx2_mbox *mbox, int devid);
96
97
void otx2_mbox_destroy(struct otx2_mbox *mbox);
97
98
int otx2_mbox_init(struct otx2_mbox *mbox, void __force *hwbase,
98
99
struct pci_dev *pdev, void __force *reg_base,
+2
-1
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+2
-1
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
···
484
484
int rvu_get_nixlf_count(struct rvu *rvu);
485
485
void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int npalf);
486
486
int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf, int *nix_blkaddr);
487
+
int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add);
487
488
488
489
/* NPC APIs */
489
490
int rvu_npc_init(struct rvu *rvu);
···
500
499
void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf);
501
500
void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,
502
501
int nixlf, u64 chan);
503
-
void rvu_npc_disable_bcast_entry(struct rvu *rvu, u16 pcifunc);
502
+
void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, bool enable);
504
503
int rvu_npc_update_rxvlan(struct rvu *rvu, u16 pcifunc, int nixlf);
505
504
void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
506
505
void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
+2
-3
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+2
-3
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
···
17
17
#include "npc.h"
18
18
#include "cgx.h"
19
19
20
-
static int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add);
21
20
static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,
22
21
int type, int chan_id);
23
22
···
2019
2020
return 0;
2020
2021
}
2021
2022
2022
-
static int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add)
2023
+
int nix_update_bcast_mce_list(struct rvu *rvu, u16 pcifunc, bool add)
2023
2024
{
2024
2025
int err = 0, idx, next_idx, last_idx;
2025
2026
struct nix_mce_list *mce_list;
···
2064
2065
2065
2066
/* Disable MCAM entry in NPC */
2066
2067
if (!mce_list->count) {
2067
-
rvu_npc_disable_bcast_entry(rvu, pcifunc);
2068
+
rvu_npc_enable_bcast_entry(rvu, pcifunc, false);
2068
2069
goto end;
2069
2070
}
2070
2071
+19
-7
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+19
-7
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
···
563
563
NIX_INTF_RX, &entry, true);
564
564
}
565
565
566
-
void rvu_npc_disable_bcast_entry(struct rvu *rvu, u16 pcifunc)
566
+
void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, bool enable)
567
567
{
568
568
struct npc_mcam *mcam = &rvu->hw->mcam;
569
569
int blkaddr, index;
···
576
576
pcifunc = pcifunc & ~RVU_PFVF_FUNC_MASK;
577
577
578
578
index = npc_get_nixlf_mcam_index(mcam, pcifunc, 0, NIXLF_BCAST_ENTRY);
579
-
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, false);
579
+
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);
580
580
}
581
581
582
582
void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,
···
655
655
nixlf, NIXLF_UCAST_ENTRY);
656
656
npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);
657
657
658
-
/* For PF, ena/dis promisc and bcast MCAM match entries */
659
-
if (pcifunc & RVU_PFVF_FUNC_MASK)
658
+
/* For PF, ena/dis promisc and bcast MCAM match entries.
659
+
* For VFs add/delete from bcast list when RX multicast
660
+
* feature is present.
661
+
*/
662
+
if (pcifunc & RVU_PFVF_FUNC_MASK && !rvu->hw->cap.nix_rx_multicast)
660
663
return;
661
664
662
665
/* For bcast, enable/disable only if it's action is not
663
666
* packet replication, incase if action is replication
664
-
* then this PF's nixlf is removed from bcast replication
667
+
* then this PF/VF's nixlf is removed from bcast replication
665
668
* list.
666
669
*/
667
-
index = npc_get_nixlf_mcam_index(mcam, pcifunc,
670
+
index = npc_get_nixlf_mcam_index(mcam, pcifunc & ~RVU_PFVF_FUNC_MASK,
668
671
nixlf, NIXLF_BCAST_ENTRY);
669
672
bank = npc_get_bank(mcam, index);
670
673
*(u64 *)&action = rvu_read64(rvu, blkaddr,
671
674
NPC_AF_MCAMEX_BANKX_ACTION(index & (mcam->banksize - 1), bank));
672
-
if (action.op != NIX_RX_ACTIONOP_MCAST)
675
+
676
+
/* VFs will not have BCAST entry */
677
+
if (action.op != NIX_RX_ACTIONOP_MCAST &&
678
+
!(pcifunc & RVU_PFVF_FUNC_MASK)) {
673
679
npc_enable_mcam_entry(rvu, mcam,
674
680
blkaddr, index, enable);
681
+
} else {
682
+
nix_update_bcast_mce_list(rvu, pcifunc, enable);
683
+
/* Enable PF's BCAST entry for packet replication */
684
+
rvu_npc_enable_bcast_entry(rvu, pcifunc, enable);
685
+
}
686
+
675
687
if (enable)
676
688
rvu_npc_enable_promisc_entry(rvu, pcifunc, nixlf);
677
689
else
+10
-6
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
+10
-6
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
···
375
375
dst_mbox = &pf->mbox;
376
376
dst_size = dst_mbox->mbox.tx_size -
377
377
ALIGN(sizeof(*mbox_hdr), MBOX_MSG_ALIGN);
378
-
/* Check if msgs fit into destination area */
379
-
if (mbox_hdr->msg_size > dst_size)
378
+
/* Check if msgs fit into destination area and has valid size */
379
+
if (mbox_hdr->msg_size > dst_size || !mbox_hdr->msg_size)
380
380
return -EINVAL;
381
381
382
382
dst_mdev = &dst_mbox->mbox.dev[0];
···
531
531
532
532
end:
533
533
offset = mbox->rx_start + msg->next_msgoff;
534
+
if (mdev->msgs_acked == (vf_mbox->up_num_msgs - 1))
535
+
__otx2_mbox_reset(mbox, 0);
534
536
mdev->msgs_acked++;
535
537
}
536
-
537
-
otx2_mbox_reset(mbox, vf_idx);
538
538
}
539
539
540
540
static irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq)
···
810
810
msg = (struct mbox_msghdr *)(mdev->mbase + offset);
811
811
otx2_process_pfaf_mbox_msg(pf, msg);
812
812
offset = mbox->rx_start + msg->next_msgoff;
813
+
if (mdev->msgs_acked == (af_mbox->num_msgs - 1))
814
+
__otx2_mbox_reset(mbox, 0);
813
815
mdev->msgs_acked++;
814
816
}
815
817
816
-
otx2_mbox_reset(mbox, 0);
817
818
}
818
819
819
820
static void otx2_handle_link_event(struct otx2_nic *pf)
···
1585
1584
1586
1585
err = otx2_rxtx_enable(pf, true);
1587
1586
if (err)
1588
-
goto err_free_cints;
1587
+
goto err_tx_stop_queues;
1589
1588
1590
1589
return 0;
1591
1590
1591
+
err_tx_stop_queues:
1592
+
netif_tx_stop_all_queues(netdev);
1593
+
netif_carrier_off(netdev);
1592
1594
err_free_cints:
1593
1595
otx2_free_cints(pf, qidx);
1594
1596
vec = pci_irq_vector(pf->pdev,
+1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c
+1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c
+2
-2
drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
+2
-2
drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
···
99
99
msg = (struct mbox_msghdr *)(mdev->mbase + offset);
100
100
otx2vf_process_vfaf_mbox_msg(af_mbox->pfvf, msg);
101
101
offset = mbox->rx_start + msg->next_msgoff;
102
+
if (mdev->msgs_acked == (af_mbox->num_msgs - 1))
103
+
__otx2_mbox_reset(mbox, 0);
102
104
mdev->msgs_acked++;
103
105
}
104
-
105
-
otx2_mbox_reset(mbox, 0);
106
106
}
107
107
108
108
static int otx2vf_process_mbox_msg_up(struct otx2_nic *vf,
+7
-3
drivers/net/ethernet/marvell/prestera/prestera_main.c
+7
-3
drivers/net/ethernet/marvell/prestera/prestera_main.c
···
482
482
return dev->netdev_ops == &prestera_netdev_ops;
483
483
}
484
484
485
-
static int prestera_lower_dev_walk(struct net_device *dev, void *data)
485
+
static int prestera_lower_dev_walk(struct net_device *dev,
486
+
struct netdev_nested_priv *priv)
486
487
{
487
-
struct prestera_port **pport = data;
488
+
struct prestera_port **pport = (struct prestera_port **)priv->data;
488
489
489
490
if (prestera_netdev_check(dev)) {
490
491
*pport = netdev_priv(dev);
···
498
497
struct prestera_port *prestera_port_dev_lower_find(struct net_device *dev)
499
498
{
500
499
struct prestera_port *port = NULL;
500
+
struct netdev_nested_priv priv = {
501
+
.data = (void *)&port,
502
+
};
501
503
502
504
if (prestera_netdev_check(dev))
503
505
return netdev_priv(dev);
504
506
505
-
netdev_walk_all_lower_dev(dev, prestera_lower_dev_walk, &port);
507
+
netdev_walk_all_lower_dev(dev, prestera_lower_dev_walk, &priv);
506
508
507
509
return port;
508
510
}
+144
-54
drivers/net/ethernet/mellanox/mlx5/core/cmd.c
+144
-54
drivers/net/ethernet/mellanox/mlx5/core/cmd.c
···
69
69
MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR = 0x10,
70
70
};
71
71
72
-
static struct mlx5_cmd_work_ent *alloc_cmd(struct mlx5_cmd *cmd,
73
-
struct mlx5_cmd_msg *in,
74
-
struct mlx5_cmd_msg *out,
75
-
void *uout, int uout_size,
76
-
mlx5_cmd_cbk_t cbk,
77
-
void *context, int page_queue)
72
+
static struct mlx5_cmd_work_ent *
73
+
cmd_alloc_ent(struct mlx5_cmd *cmd, struct mlx5_cmd_msg *in,
74
+
struct mlx5_cmd_msg *out, void *uout, int uout_size,
75
+
mlx5_cmd_cbk_t cbk, void *context, int page_queue)
78
76
{
79
77
gfp_t alloc_flags = cbk ? GFP_ATOMIC : GFP_KERNEL;
80
78
struct mlx5_cmd_work_ent *ent;
···
81
83
if (!ent)
82
84
return ERR_PTR(-ENOMEM);
83
85
86
+
ent->idx = -EINVAL;
84
87
ent->in = in;
85
88
ent->out = out;
86
89
ent->uout = uout;
···
90
91
ent->context = context;
91
92
ent->cmd = cmd;
92
93
ent->page_queue = page_queue;
94
+
refcount_set(&ent->refcnt, 1);
93
95
94
96
return ent;
97
+
}
98
+
99
+
static void cmd_free_ent(struct mlx5_cmd_work_ent *ent)
100
+
{
101
+
kfree(ent);
95
102
}
96
103
97
104
static u8 alloc_token(struct mlx5_cmd *cmd)
···
114
109
return token;
115
110
}
116
111
117
-
static int alloc_ent(struct mlx5_cmd *cmd)
112
+
static int cmd_alloc_index(struct mlx5_cmd *cmd)
118
113
{
119
114
unsigned long flags;
120
115
int ret;
···
128
123
return ret < cmd->max_reg_cmds ? ret : -ENOMEM;
129
124
}
130
125
131
-
static void free_ent(struct mlx5_cmd *cmd, int idx)
126
+
static void cmd_free_index(struct mlx5_cmd *cmd, int idx)
132
127
{
133
128
unsigned long flags;
134
129
135
130
spin_lock_irqsave(&cmd->alloc_lock, flags);
136
131
set_bit(idx, &cmd->bitmask);
137
132
spin_unlock_irqrestore(&cmd->alloc_lock, flags);
133
+
}
134
+
135
+
static void cmd_ent_get(struct mlx5_cmd_work_ent *ent)
136
+
{
137
+
refcount_inc(&ent->refcnt);
138
+
}
139
+
140
+
static void cmd_ent_put(struct mlx5_cmd_work_ent *ent)
141
+
{
142
+
if (!refcount_dec_and_test(&ent->refcnt))
143
+
return;
144
+
145
+
if (ent->idx >= 0)
146
+
cmd_free_index(ent->cmd, ent->idx);
147
+
148
+
cmd_free_ent(ent);
138
149
}
139
150
140
151
static struct mlx5_cmd_layout *get_inst(struct mlx5_cmd *cmd, int idx)
···
238
217
} while (time_before(jiffies, poll_end));
239
218
240
219
ent->ret = -ETIMEDOUT;
241
-
}
242
-
243
-
static void free_cmd(struct mlx5_cmd_work_ent *ent)
244
-
{
245
-
kfree(ent);
246
220
}
247
221
248
222
static int verify_signature(struct mlx5_cmd_work_ent *ent)
···
853
837
struct mlx5_core_dev *dev = container_of(ent->cmd, struct mlx5_core_dev,
854
838
cmd);
855
839
840
+
mlx5_cmd_eq_recover(dev);
841
+
842
+
/* Maybe got handled by eq recover ? */
843
+
if (!test_bit(MLX5_CMD_ENT_STATE_PENDING_COMP, &ent->state)) {
844
+
mlx5_core_warn(dev, "cmd[%d]: %s(0x%x) Async, recovered after timeout\n", ent->idx,
845
+
mlx5_command_str(msg_to_opcode(ent->in)), msg_to_opcode(ent->in));
846
+
goto out; /* phew, already handled */
847
+
}
848
+
856
849
ent->ret = -ETIMEDOUT;
857
-
mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
858
-
mlx5_command_str(msg_to_opcode(ent->in)),
859
-
msg_to_opcode(ent->in));
850
+
mlx5_core_warn(dev, "cmd[%d]: %s(0x%x) Async, timeout. Will cause a leak of a command resource\n",
851
+
ent->idx, mlx5_command_str(msg_to_opcode(ent->in)), msg_to_opcode(ent->in));
860
852
mlx5_cmd_comp_handler(dev, 1UL << ent->idx, true);
853
+
854
+
out:
855
+
cmd_ent_put(ent); /* for the cmd_ent_get() took on schedule delayed work */
861
856
}
862
857
863
858
static void free_msg(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *msg);
···
881
854
return true;
882
855
883
856
return cmd->allowed_opcode == opcode;
857
+
}
858
+
859
+
static int cmd_alloc_index_retry(struct mlx5_cmd *cmd)
860
+
{
861
+
unsigned long alloc_end = jiffies + msecs_to_jiffies(1000);
862
+
int idx;
863
+
864
+
retry:
865
+
idx = cmd_alloc_index(cmd);
866
+
if (idx < 0 && time_before(jiffies, alloc_end)) {
867
+
/* Index allocation can fail on heavy load of commands. This is a temporary
868
+
* situation as the current command already holds the semaphore, meaning that
869
+
* another command completion is being handled and it is expected to release
870
+
* the entry index soon.
871
+
*/
872
+
cpu_relax();
873
+
goto retry;
874
+
}
875
+
return idx;
876
+
}
877
+
878
+
bool mlx5_cmd_is_down(struct mlx5_core_dev *dev)
879
+
{
880
+
return pci_channel_offline(dev->pdev) ||
881
+
dev->cmd.state != MLX5_CMDIF_STATE_UP ||
882
+
dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR;
884
883
}
885
884
886
885
static void cmd_work_handler(struct work_struct *work)
···
926
873
sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
927
874
down(sem);
928
875
if (!ent->page_queue) {
929
-
alloc_ret = alloc_ent(cmd);
876
+
alloc_ret = cmd_alloc_index_retry(cmd);
930
877
if (alloc_ret < 0) {
931
878
mlx5_core_err_rl(dev, "failed to allocate command entry\n");
932
879
if (ent->callback) {
933
880
ent->callback(-EAGAIN, ent->context);
934
881
mlx5_free_cmd_msg(dev, ent->out);
935
882
free_msg(dev, ent->in);
936
-
free_cmd(ent);
883
+
cmd_ent_put(ent);
937
884
} else {
938
885
ent->ret = -EAGAIN;
939
886
complete(&ent->done);
···
969
916
ent->ts1 = ktime_get_ns();
970
917
cmd_mode = cmd->mode;
971
918
972
-
if (ent->callback)
973
-
schedule_delayed_work(&ent->cb_timeout_work, cb_timeout);
919
+
if (ent->callback && schedule_delayed_work(&ent->cb_timeout_work, cb_timeout))
920
+
cmd_ent_get(ent);
974
921
set_bit(MLX5_CMD_ENT_STATE_PENDING_COMP, &ent->state);
975
922
976
923
/* Skip sending command to fw if internal error */
977
-
if (pci_channel_offline(dev->pdev) ||
978
-
dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR ||
979
-
cmd->state != MLX5_CMDIF_STATE_UP ||
980
-
!opcode_allowed(&dev->cmd, ent->op)) {
924
+
if (mlx5_cmd_is_down(dev) || !opcode_allowed(&dev->cmd, ent->op)) {
981
925
u8 status = 0;
982
926
u32 drv_synd;
983
927
···
983
933
MLX5_SET(mbox_out, ent->out, syndrome, drv_synd);
984
934
985
935
mlx5_cmd_comp_handler(dev, 1UL << ent->idx, true);
986
-
/* no doorbell, no need to keep the entry */
987
-
free_ent(cmd, ent->idx);
988
-
if (ent->callback)
989
-
free_cmd(ent);
990
936
return;
991
937
}
992
938
939
+
cmd_ent_get(ent); /* for the _real_ FW event on completion */
993
940
/* ring doorbell after the descriptor is valid */
994
941
mlx5_core_dbg(dev, "writing 0x%x to command doorbell\n", 1 << ent->idx);
995
942
wmb();
···
1030
983
}
1031
984
}
1032
985
986
+
enum {
987
+
MLX5_CMD_TIMEOUT_RECOVER_MSEC = 5 * 1000,
988
+
};
989
+
990
+
static void wait_func_handle_exec_timeout(struct mlx5_core_dev *dev,
991
+
struct mlx5_cmd_work_ent *ent)
992
+
{
993
+
unsigned long timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_RECOVER_MSEC);
994
+
995
+
mlx5_cmd_eq_recover(dev);
996
+
997
+
/* Re-wait on the ent->done after executing the recovery flow. If the
998
+
* recovery flow (or any other recovery flow running simultaneously)
999
+
* has recovered an EQE, it should cause the entry to be completed by
1000
+
* the command interface.
1001
+
*/
1002
+
if (wait_for_completion_timeout(&ent->done, timeout)) {
1003
+
mlx5_core_warn(dev, "cmd[%d]: %s(0x%x) recovered after timeout\n", ent->idx,
1004
+
mlx5_command_str(msg_to_opcode(ent->in)), msg_to_opcode(ent->in));
1005
+
return;
1006
+
}
1007
+
1008
+
mlx5_core_warn(dev, "cmd[%d]: %s(0x%x) No done completion\n", ent->idx,
1009
+
mlx5_command_str(msg_to_opcode(ent->in)), msg_to_opcode(ent->in));
1010
+
1011
+
ent->ret = -ETIMEDOUT;
1012
+
mlx5_cmd_comp_handler(dev, 1UL << ent->idx, true);
1013
+
}
1014
+
1033
1015
static int wait_func(struct mlx5_core_dev *dev, struct mlx5_cmd_work_ent *ent)
1034
1016
{
1035
1017
unsigned long timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
···
1070
994
ent->ret = -ECANCELED;
1071
995
goto out_err;
1072
996
}
1073
-
if (cmd->mode == CMD_MODE_POLLING || ent->polling) {
997
+
if (cmd->mode == CMD_MODE_POLLING || ent->polling)
1074
998
wait_for_completion(&ent->done);
1075
-
} else if (!wait_for_completion_timeout(&ent->done, timeout)) {
1076
-
ent->ret = -ETIMEDOUT;
1077
-
mlx5_cmd_comp_handler(dev, 1UL << ent->idx, true);
1078
-
}
999
+
else if (!wait_for_completion_timeout(&ent->done, timeout))
1000
+
wait_func_handle_exec_timeout(dev, ent);
1079
1001
1080
1002
out_err:
1081
1003
err = ent->ret;
···
1113
1039
if (callback && page_queue)
1114
1040
return -EINVAL;
1115
1041
1116
-
ent = alloc_cmd(cmd, in, out, uout, uout_size, callback, context,
1117
-
page_queue);
1042
+
ent = cmd_alloc_ent(cmd, in, out, uout, uout_size,
1043
+
callback, context, page_queue);
1118
1044
if (IS_ERR(ent))
1119
1045
return PTR_ERR(ent);
1046
+
1047
+
/* put for this ent is when consumed, depending on the use case
1048
+
* 1) (!callback) blocking flow: by caller after wait_func completes
1049
+
* 2) (callback) flow: by mlx5_cmd_comp_handler() when ent is handled
1050
+
*/
1120
1051
1121
1052
ent->token = token;
1122
1053
ent->polling = force_polling;
···
1141
1062
}
1142
1063
1143
1064
if (callback)
1144
-
goto out;
1065
+
goto out; /* mlx5_cmd_comp_handler() will put(ent) */
1145
1066
1146
1067
err = wait_func(dev, ent);
1147
-
if (err == -ETIMEDOUT)
1148
-
goto out;
1149
-
if (err == -ECANCELED)
1068
+
if (err == -ETIMEDOUT || err == -ECANCELED)
1150
1069
goto out_free;
1151
1070
1152
1071
ds = ent->ts2 - ent->ts1;
···
1162
1085
*status = ent->status;
1163
1086
1164
1087
out_free:
1165
-
free_cmd(ent);
1088
+
cmd_ent_put(ent);
1166
1089
out:
1167
1090
return err;
1168
1091
}
···
1593
1516
if (!forced) {
1594
1517
mlx5_core_err(dev, "Command completion arrived after timeout (entry idx = %d).\n",
1595
1518
ent->idx);
1596
-
free_ent(cmd, ent->idx);
1597
-
free_cmd(ent);
1519
+
cmd_ent_put(ent);
1598
1520
}
1599
1521
continue;
1600
1522
}
1601
1523
1602
-
if (ent->callback)
1603
-
cancel_delayed_work(&ent->cb_timeout_work);
1524
+
if (ent->callback && cancel_delayed_work(&ent->cb_timeout_work))
1525
+
cmd_ent_put(ent); /* timeout work was canceled */
1526
+
1527
+
if (!forced || /* Real FW completion */
1528
+
pci_channel_offline(dev->pdev) || /* FW is inaccessible */
1529
+
dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
1530
+
cmd_ent_put(ent);
1531
+
1604
1532
if (ent->page_queue)
1605
1533
sem = &cmd->pages_sem;
1606
1534
else
···
1626
1544
mlx5_core_dbg(dev, "command completed. ret 0x%x, delivery status %s(0x%x)\n",
1627
1545
ent->ret, deliv_status_to_str(ent->status), ent->status);
1628
1546
}
1629
-
1630
-
/* only real completion will free the entry slot */
1631
-
if (!forced)
1632
-
free_ent(cmd, ent->idx);
1633
1547
1634
1548
if (ent->callback) {
1635
1549
ds = ent->ts2 - ent->ts1;
···
1654
1576
free_msg(dev, ent->in);
1655
1577
1656
1578
err = err ? err : ent->status;
1657
-
if (!forced)
1658
-
free_cmd(ent);
1579
+
/* final consumer is done, release ent */
1580
+
cmd_ent_put(ent);
1659
1581
callback(err, context);
1660
1582
} else {
1583
+
/* release wait_func() so mlx5_cmd_invoke()
1584
+
* can make the final ent_put()
1585
+
*/
1661
1586
complete(&ent->done);
1662
1587
}
1663
1588
up(sem);
···
1670
1589
1671
1590
void mlx5_cmd_trigger_completions(struct mlx5_core_dev *dev)
1672
1591
{
1592
+
struct mlx5_cmd *cmd = &dev->cmd;
1593
+
unsigned long bitmask;
1673
1594
unsigned long flags;
1674
1595
u64 vector;
1596
+
int i;
1675
1597
1676
1598
/* wait for pending handlers to complete */
1677
1599
mlx5_eq_synchronize_cmd_irq(dev);
···
1683
1599
if (!vector)
1684
1600
goto no_trig;
1685
1601
1602
+
bitmask = vector;
1603
+
/* we must increment the allocated entries refcount before triggering the completions
1604
+
* to guarantee pending commands will not get freed in the meanwhile.
1605
+
* For that reason, it also has to be done inside the alloc_lock.
1606
+
*/
1607
+
for_each_set_bit(i, &bitmask, (1 << cmd->log_sz))
1608
+
cmd_ent_get(cmd->ent_arr[i]);
1686
1609
vector |= MLX5_TRIGGERED_CMD_COMP;
1687
1610
spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags);
1688
1611
1689
1612
mlx5_core_dbg(dev, "vector 0x%llx\n", vector);
1690
1613
mlx5_cmd_comp_handler(dev, vector, true);
1614
+
for_each_set_bit(i, &bitmask, (1 << cmd->log_sz))
1615
+
cmd_ent_put(cmd->ent_arr[i]);
1691
1616
return;
1692
1617
1693
1618
no_trig:
···
1804
1711
u8 token;
1805
1712
1806
1713
opcode = MLX5_GET(mbox_in, in, opcode);
1807
-
if (pci_channel_offline(dev->pdev) ||
1808
-
dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR ||
1809
-
dev->cmd.state != MLX5_CMDIF_STATE_UP ||
1810
-
!opcode_allowed(&dev->cmd, opcode)) {
1714
+
if (mlx5_cmd_is_down(dev) || !opcode_allowed(&dev->cmd, opcode)) {
1811
1715
err = mlx5_internal_err_ret_value(dev, opcode, &drv_synd, &status);
1812
1716
MLX5_SET(mbox_out, out, status, status);
1813
1717
MLX5_SET(mbox_out, out, syndrome, drv_synd);
+7
-1
drivers/net/ethernet/mellanox/mlx5/core/en.h
+7
-1
drivers/net/ethernet/mellanox/mlx5/core/en.h
···
91
91
#define MLX5_MPWRQ_PAGES_PER_WQE BIT(MLX5_MPWRQ_WQE_PAGE_ORDER)
92
92
93
93
#define MLX5_MTT_OCTW(npages) (ALIGN(npages, 8) / 2)
94
-
#define MLX5E_REQUIRED_WQE_MTTS (ALIGN(MLX5_MPWRQ_PAGES_PER_WQE, 8))
94
+
/* Add another page to MLX5E_REQUIRED_WQE_MTTS as a buffer between
95
+
* WQEs, This page will absorb write overflow by the hardware, when
96
+
* receiving packets larger than MTU. These oversize packets are
97
+
* dropped by the driver at a later stage.
98
+
*/
99
+
#define MLX5E_REQUIRED_WQE_MTTS (ALIGN(MLX5_MPWRQ_PAGES_PER_WQE + 1, 8))
95
100
#define MLX5E_LOG_ALIGNED_MPWQE_PPW (ilog2(MLX5E_REQUIRED_WQE_MTTS))
96
101
#define MLX5E_REQUIRED_MTTS(wqes) (wqes * MLX5E_REQUIRED_WQE_MTTS)
97
102
#define MLX5E_MAX_RQ_NUM_MTTS \
···
631
626
u32 rqn;
632
627
struct mlx5_core_dev *mdev;
633
628
struct mlx5_core_mkey umr_mkey;
629
+
struct mlx5e_dma_info wqe_overflow;
634
630
635
631
/* XDP read-mostly */
636
632
struct xdp_rxq_info xdp_rxq;
+3
drivers/net/ethernet/mellanox/mlx5/core/en/port.c
+3
drivers/net/ethernet/mellanox/mlx5/core/en/port.c
···
569
569
if (fec_policy >= (1 << MLX5E_FEC_LLRS_272_257_1) && !fec_50g_per_lane)
570
570
return -EOPNOTSUPP;
571
571
572
+
if (fec_policy && !mlx5e_fec_in_caps(dev, fec_policy))
573
+
return -EOPNOTSUPP;
574
+
572
575
MLX5_SET(pplm_reg, in, local_port, 1);
573
576
err = mlx5_core_access_reg(dev, in, sz, out, sz, MLX5_REG_PPLM, 0, 0);
574
577
if (err)
+50
-31
drivers/net/ethernet/mellanox/mlx5/core/en/rep/neigh.c
+50
-31
drivers/net/ethernet/mellanox/mlx5/core/en/rep/neigh.c
···
110
110
rtnl_unlock();
111
111
}
112
112
113
+
struct neigh_update_work {
114
+
struct work_struct work;
115
+
struct neighbour *n;
116
+
struct mlx5e_neigh_hash_entry *nhe;
117
+
};
118
+
119
+
static void mlx5e_release_neigh_update_work(struct neigh_update_work *update_work)
120
+
{
121
+
neigh_release(update_work->n);
122
+
mlx5e_rep_neigh_entry_release(update_work->nhe);
123
+
kfree(update_work);
124
+
}
125
+
113
126
static void mlx5e_rep_neigh_update(struct work_struct *work)
114
127
{
115
-
struct mlx5e_neigh_hash_entry *nhe =
116
-
container_of(work, struct mlx5e_neigh_hash_entry, neigh_update_work);
117
-
struct neighbour *n = nhe->n;
128
+
struct neigh_update_work *update_work = container_of(work, struct neigh_update_work,
129
+
work);
130
+
struct mlx5e_neigh_hash_entry *nhe = update_work->nhe;
131
+
struct neighbour *n = update_work->n;
118
132
struct mlx5e_encap_entry *e;
119
133
unsigned char ha[ETH_ALEN];
120
134
struct mlx5e_priv *priv;
···
160
146
mlx5e_rep_update_flows(priv, e, neigh_connected, ha);
161
147
mlx5e_encap_put(priv, e);
162
148
}
163
-
mlx5e_rep_neigh_entry_release(nhe);
164
149
rtnl_unlock();
165
-
neigh_release(n);
150
+
mlx5e_release_neigh_update_work(update_work);
166
151
}
167
152
168
-
static void mlx5e_rep_queue_neigh_update_work(struct mlx5e_priv *priv,
169
-
struct mlx5e_neigh_hash_entry *nhe,
170
-
struct neighbour *n)
153
+
static struct neigh_update_work *mlx5e_alloc_neigh_update_work(struct mlx5e_priv *priv,
154
+
struct neighbour *n)
171
155
{
172
-
/* Take a reference to ensure the neighbour and mlx5 encap
173
-
* entry won't be destructed until we drop the reference in
174
-
* delayed work.
175
-
*/
176
-
neigh_hold(n);
156
+
struct neigh_update_work *update_work;
157
+
struct mlx5e_neigh_hash_entry *nhe;
158
+
struct mlx5e_neigh m_neigh = {};
177
159
178
-
/* This assignment is valid as long as the the neigh reference
179
-
* is taken
180
-
*/
181
-
nhe->n = n;
160
+
update_work = kzalloc(sizeof(*update_work), GFP_ATOMIC);
161
+
if (WARN_ON(!update_work))
162
+
return NULL;
182
163
183
-
if (!queue_work(priv->wq, &nhe->neigh_update_work)) {
184
-
mlx5e_rep_neigh_entry_release(nhe);
185
-
neigh_release(n);
164
+
m_neigh.dev = n->dev;
165
+
m_neigh.family = n->ops->family;
166
+
memcpy(&m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
167
+
168
+
/* Obtain reference to nhe as last step in order not to release it in
169
+
* atomic context.
170
+
*/
171
+
rcu_read_lock();
172
+
nhe = mlx5e_rep_neigh_entry_lookup(priv, &m_neigh);
173
+
rcu_read_unlock();
174
+
if (!nhe) {
175
+
kfree(update_work);
176
+
return NULL;
186
177
}
178
+
179
+
INIT_WORK(&update_work->work, mlx5e_rep_neigh_update);
180
+
neigh_hold(n);
181
+
update_work->n = n;
182
+
update_work->nhe = nhe;
183
+
184
+
return update_work;
187
185
}
188
186
189
187
static int mlx5e_rep_netevent_event(struct notifier_block *nb,
···
207
181
struct net_device *netdev = rpriv->netdev;
208
182
struct mlx5e_priv *priv = netdev_priv(netdev);
209
183
struct mlx5e_neigh_hash_entry *nhe = NULL;
210
-
struct mlx5e_neigh m_neigh = {};
184
+
struct neigh_update_work *update_work;
211
185
struct neigh_parms *p;
212
186
struct neighbour *n;
213
187
bool found = false;
···
222
196
#endif
223
197
return NOTIFY_DONE;
224
198
225
-
m_neigh.dev = n->dev;
226
-
m_neigh.family = n->ops->family;
227
-
memcpy(&m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
228
-
229
-
rcu_read_lock();
230
-
nhe = mlx5e_rep_neigh_entry_lookup(priv, &m_neigh);
231
-
rcu_read_unlock();
232
-
if (!nhe)
199
+
update_work = mlx5e_alloc_neigh_update_work(priv, n);
200
+
if (!update_work)
233
201
return NOTIFY_DONE;
234
202
235
-
mlx5e_rep_queue_neigh_update_work(priv, nhe, n);
203
+
queue_work(priv->wq, &update_work->work);
236
204
break;
237
205
238
206
case NETEVENT_DELAY_PROBE_TIME_UPDATE:
···
372
352
373
353
(*nhe)->priv = priv;
374
354
memcpy(&(*nhe)->m_neigh, &e->m_neigh, sizeof(e->m_neigh));
375
-
INIT_WORK(&(*nhe)->neigh_update_work, mlx5e_rep_neigh_update);
376
355
spin_lock_init(&(*nhe)->encap_list_lock);
377
356
INIT_LIST_HEAD(&(*nhe)->encap_list);
378
357
refcount_set(&(*nhe)->refcnt, 1);
+3
-1
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c
+3
-1
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c
···
243
243
case FLOW_ACT_MANGLE_HDR_TYPE_IP6:
244
244
ip6_offset = (offset - offsetof(struct ipv6hdr, saddr));
245
245
ip6_offset /= 4;
246
-
if (ip6_offset < 8)
246
+
if (ip6_offset < 4)
247
247
tuple->ip.src_v6.s6_addr32[ip6_offset] = cpu_to_be32(val);
248
+
else if (ip6_offset < 8)
249
+
tuple->ip.dst_v6.s6_addr32[ip6_offset - 4] = cpu_to_be32(val);
248
250
else
249
251
return -EOPNOTSUPP;
250
252
break;
+10
-4
drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
+10
-4
drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
···
217
217
break;
218
218
}
219
219
220
+
if (WARN_ONCE(*rule_p, "VLAN rule already exists type %d", rule_type))
221
+
return 0;
222
+
220
223
*rule_p = mlx5_add_flow_rules(ft, spec, &flow_act, &dest, 1);
221
224
222
225
if (IS_ERR(*rule_p)) {
···
400
397
for_each_set_bit(i, priv->fs.vlan.active_svlans, VLAN_N_VID)
401
398
mlx5e_add_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_MATCH_STAG_VID, i);
402
399
403
-
if (priv->fs.vlan.cvlan_filter_disabled &&
404
-
!(priv->netdev->flags & IFF_PROMISC))
400
+
if (priv->fs.vlan.cvlan_filter_disabled)
405
401
mlx5e_add_any_vid_rules(priv);
406
402
}
407
403
···
417
415
for_each_set_bit(i, priv->fs.vlan.active_svlans, VLAN_N_VID)
418
416
mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_MATCH_STAG_VID, i);
419
417
420
-
if (priv->fs.vlan.cvlan_filter_disabled &&
421
-
!(priv->netdev->flags & IFF_PROMISC))
418
+
WARN_ON_ONCE(!(test_bit(MLX5E_STATE_DESTROYING, &priv->state)));
419
+
420
+
/* must be called after DESTROY bit is set and
421
+
* set_rx_mode is called and flushed
422
+
*/
423
+
if (priv->fs.vlan.cvlan_filter_disabled)
422
424
mlx5e_del_any_vid_rules(priv);
423
425
}
424
426
+85
-19
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+85
-19
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
···
246
246
247
247
static int mlx5e_create_umr_mkey(struct mlx5_core_dev *mdev,
248
248
u64 npages, u8 page_shift,
249
-
struct mlx5_core_mkey *umr_mkey)
249
+
struct mlx5_core_mkey *umr_mkey,
250
+
dma_addr_t filler_addr)
250
251
{
251
-
int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
252
+
struct mlx5_mtt *mtt;
253
+
int inlen;
252
254
void *mkc;
253
255
u32 *in;
254
256
int err;
257
+
int i;
258
+
259
+
inlen = MLX5_ST_SZ_BYTES(create_mkey_in) + sizeof(*mtt) * npages;
255
260
256
261
in = kvzalloc(inlen, GFP_KERNEL);
257
262
if (!in)
···
276
271
MLX5_SET(mkc, mkc, translations_octword_size,
277
272
MLX5_MTT_OCTW(npages));
278
273
MLX5_SET(mkc, mkc, log_page_size, page_shift);
274
+
MLX5_SET(create_mkey_in, in, translations_octword_actual_size,
275
+
MLX5_MTT_OCTW(npages));
276
+
277
+
/* Initialize the mkey with all MTTs pointing to a default
278
+
* page (filler_addr). When the channels are activated, UMR
279
+
* WQEs will redirect the RX WQEs to the actual memory from
280
+
* the RQ's pool, while the gaps (wqe_overflow) remain mapped
281
+
* to the default page.
282
+
*/
283
+
mtt = MLX5_ADDR_OF(create_mkey_in, in, klm_pas_mtt);
284
+
for (i = 0 ; i < npages ; i++)
285
+
mtt[i].ptag = cpu_to_be64(filler_addr);
279
286
280
287
err = mlx5_core_create_mkey(mdev, umr_mkey, in, inlen);
281
288
···
299
282
{
300
283
u64 num_mtts = MLX5E_REQUIRED_MTTS(mlx5_wq_ll_get_size(&rq->mpwqe.wq));
301
284
302
-
return mlx5e_create_umr_mkey(mdev, num_mtts, PAGE_SHIFT, &rq->umr_mkey);
285
+
return mlx5e_create_umr_mkey(mdev, num_mtts, PAGE_SHIFT, &rq->umr_mkey,
286
+
rq->wqe_overflow.addr);
303
287
}
304
288
305
289
static inline u64 mlx5e_get_mpwqe_offset(struct mlx5e_rq *rq, u16 wqe_ix)
···
368
350
mlx5e_reporter_rq_cqe_err(rq);
369
351
}
370
352
353
+
static int mlx5e_alloc_mpwqe_rq_drop_page(struct mlx5e_rq *rq)
354
+
{
355
+
rq->wqe_overflow.page = alloc_page(GFP_KERNEL);
356
+
if (!rq->wqe_overflow.page)
357
+
return -ENOMEM;
358
+
359
+
rq->wqe_overflow.addr = dma_map_page(rq->pdev, rq->wqe_overflow.page, 0,
360
+
PAGE_SIZE, rq->buff.map_dir);
361
+
if (dma_mapping_error(rq->pdev, rq->wqe_overflow.addr)) {
362
+
__free_page(rq->wqe_overflow.page);
363
+
return -ENOMEM;
364
+
}
365
+
return 0;
366
+
}
367
+
368
+
static void mlx5e_free_mpwqe_rq_drop_page(struct mlx5e_rq *rq)
369
+
{
370
+
dma_unmap_page(rq->pdev, rq->wqe_overflow.addr, PAGE_SIZE,
371
+
rq->buff.map_dir);
372
+
__free_page(rq->wqe_overflow.page);
373
+
}
374
+
371
375
static int mlx5e_alloc_rq(struct mlx5e_channel *c,
372
376
struct mlx5e_params *params,
373
377
struct mlx5e_xsk_param *xsk,
···
436
396
rq_xdp_ix += params->num_channels * MLX5E_RQ_GROUP_XSK;
437
397
err = xdp_rxq_info_reg(&rq->xdp_rxq, rq->netdev, rq_xdp_ix);
438
398
if (err < 0)
439
-
goto err_rq_wq_destroy;
399
+
goto err_rq_xdp_prog;
440
400
441
401
rq->buff.map_dir = params->xdp_prog ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE;
442
402
rq->buff.headroom = mlx5e_get_rq_headroom(mdev, params, xsk);
···
446
406
case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:
447
407
err = mlx5_wq_ll_create(mdev, &rqp->wq, rqc_wq, &rq->mpwqe.wq,
448
408
&rq->wq_ctrl);
409
+
if (err)
410
+
goto err_rq_xdp;
411
+
412
+
err = mlx5e_alloc_mpwqe_rq_drop_page(rq);
449
413
if (err)
450
414
goto err_rq_wq_destroy;
451
415
···
468
424
469
425
err = mlx5e_create_rq_umr_mkey(mdev, rq);
470
426
if (err)
471
-
goto err_rq_wq_destroy;
427
+
goto err_rq_drop_page;
472
428
rq->mkey_be = cpu_to_be32(rq->umr_mkey.key);
473
429
474
430
err = mlx5e_rq_alloc_mpwqe_info(rq, c);
475
431
if (err)
476
-
goto err_free;
432
+
goto err_rq_mkey;
477
433
break;
478
434
default: /* MLX5_WQ_TYPE_CYCLIC */
479
435
err = mlx5_wq_cyc_create(mdev, &rqp->wq, rqc_wq, &rq->wqe.wq,
480
436
&rq->wq_ctrl);
481
437
if (err)
482
-
goto err_rq_wq_destroy;
438
+
goto err_rq_xdp;
483
439
484
440
rq->wqe.wq.db = &rq->wqe.wq.db[MLX5_RCV_DBR];
485
441
···
494
450
GFP_KERNEL, cpu_to_node(c->cpu));
495
451
if (!rq->wqe.frags) {
496
452
err = -ENOMEM;
497
-
goto err_free;
453
+
goto err_rq_wq_destroy;
498
454
}
499
455
500
456
err = mlx5e_init_di_list(rq, wq_sz, c->cpu);
501
457
if (err)
502
-
goto err_free;
458
+
goto err_rq_frags;
503
459
504
460
rq->mkey_be = c->mkey_be;
505
461
}
506
462
507
463
err = mlx5e_rq_set_handlers(rq, params, xsk);
508
464
if (err)
509
-
goto err_free;
465
+
goto err_free_by_rq_type;
510
466
511
467
if (xsk) {
512
468
err = xdp_rxq_info_reg_mem_model(&rq->xdp_rxq,
···
530
486
if (IS_ERR(rq->page_pool)) {
531
487
err = PTR_ERR(rq->page_pool);
532
488
rq->page_pool = NULL;
533
-
goto err_free;
489
+
goto err_free_by_rq_type;
534
490
}
535
491
err = xdp_rxq_info_reg_mem_model(&rq->xdp_rxq,
536
492
MEM_TYPE_PAGE_POOL, rq->page_pool);
537
493
}
538
494
if (err)
539
-
goto err_free;
495
+
goto err_free_by_rq_type;
540
496
541
497
for (i = 0; i < wq_sz; i++) {
542
498
if (rq->wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ) {
···
586
542
587
543
return 0;
588
544
589
-
err_free:
545
+
err_free_by_rq_type:
590
546
switch (rq->wq_type) {
591
547
case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:
592
548
kvfree(rq->mpwqe.info);
549
+
err_rq_mkey:
593
550
mlx5_core_destroy_mkey(mdev, &rq->umr_mkey);
551
+
err_rq_drop_page:
552
+
mlx5e_free_mpwqe_rq_drop_page(rq);
594
553
break;
595
554
default: /* MLX5_WQ_TYPE_CYCLIC */
596
-
kvfree(rq->wqe.frags);
597
555
mlx5e_free_di_list(rq);
556
+
err_rq_frags:
557
+
kvfree(rq->wqe.frags);
598
558
}
599
-
600
559
err_rq_wq_destroy:
560
+
mlx5_wq_destroy(&rq->wq_ctrl);
561
+
err_rq_xdp:
562
+
xdp_rxq_info_unreg(&rq->xdp_rxq);
563
+
err_rq_xdp_prog:
601
564
if (params->xdp_prog)
602
565
bpf_prog_put(params->xdp_prog);
603
-
xdp_rxq_info_unreg(&rq->xdp_rxq);
604
-
page_pool_destroy(rq->page_pool);
605
-
mlx5_wq_destroy(&rq->wq_ctrl);
606
566
607
567
return err;
608
568
}
···
628
580
case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:
629
581
kvfree(rq->mpwqe.info);
630
582
mlx5_core_destroy_mkey(rq->mdev, &rq->umr_mkey);
583
+
mlx5e_free_mpwqe_rq_drop_page(rq);
631
584
break;
632
585
default: /* MLX5_WQ_TYPE_CYCLIC */
633
586
kvfree(rq->wqe.frags);
···
4251
4202
}
4252
4203
#endif
4253
4204
4205
+
static bool mlx5e_gre_tunnel_inner_proto_offload_supported(struct mlx5_core_dev *mdev,
4206
+
struct sk_buff *skb)
4207
+
{
4208
+
switch (skb->inner_protocol) {
4209
+
case htons(ETH_P_IP):
4210
+
case htons(ETH_P_IPV6):
4211
+
case htons(ETH_P_TEB):
4212
+
return true;
4213
+
case htons(ETH_P_MPLS_UC):
4214
+
case htons(ETH_P_MPLS_MC):
4215
+
return MLX5_CAP_ETH(mdev, tunnel_stateless_mpls_over_gre);
4216
+
}
4217
+
return false;
4218
+
}
4219
+
4254
4220
static netdev_features_t mlx5e_tunnel_features_check(struct mlx5e_priv *priv,
4255
4221
struct sk_buff *skb,
4256
4222
netdev_features_t features)
···
4288
4224
4289
4225
switch (proto) {
4290
4226
case IPPROTO_GRE:
4291
-
return features;
4227
+
if (mlx5e_gre_tunnel_inner_proto_offload_supported(priv->mdev, skb))
4228
+
return features;
4229
+
break;
4292
4230
case IPPROTO_IPIP:
4293
4231
case IPPROTO_IPV6:
4294
4232
if (mlx5e_tunnel_proto_supported(priv->mdev, IPPROTO_IPIP))
-6
drivers/net/ethernet/mellanox/mlx5/core/en_rep.h
-6
drivers/net/ethernet/mellanox/mlx5/core/en_rep.h
···
134
134
/* encap list sharing the same neigh */
135
135
struct list_head encap_list;
136
136
137
-
/* valid only when the neigh reference is taken during
138
-
* neigh_update_work workqueue callback.
139
-
*/
140
-
struct neighbour *n;
141
-
struct work_struct neigh_update_work;
142
-
143
137
/* neigh hash entry can be deleted only when the refcount is zero.
144
138
* refcount is needed to avoid neigh hash entry removal by TC, while
145
139
* it's used by the neigh notification call.
+41
-1
drivers/net/ethernet/mellanox/mlx5/core/eq.c
+41
-1
drivers/net/ethernet/mellanox/mlx5/core/eq.c
···
189
189
return count_eqe;
190
190
}
191
191
192
+
static void mlx5_eq_async_int_lock(struct mlx5_eq_async *eq, unsigned long *flags)
193
+
__acquires(&eq->lock)
194
+
{
195
+
if (in_irq())
196
+
spin_lock(&eq->lock);
197
+
else
198
+
spin_lock_irqsave(&eq->lock, *flags);
199
+
}
200
+
201
+
static void mlx5_eq_async_int_unlock(struct mlx5_eq_async *eq, unsigned long *flags)
202
+
__releases(&eq->lock)
203
+
{
204
+
if (in_irq())
205
+
spin_unlock(&eq->lock);
206
+
else
207
+
spin_unlock_irqrestore(&eq->lock, *flags);
208
+
}
209
+
210
+
enum async_eq_nb_action {
211
+
ASYNC_EQ_IRQ_HANDLER = 0,
212
+
ASYNC_EQ_RECOVER = 1,
213
+
};
214
+
192
215
static int mlx5_eq_async_int(struct notifier_block *nb,
193
216
unsigned long action, void *data)
194
217
{
···
221
198
struct mlx5_eq_table *eqt;
222
199
struct mlx5_core_dev *dev;
223
200
struct mlx5_eqe *eqe;
201
+
unsigned long flags;
224
202
int num_eqes = 0;
225
203
226
204
dev = eq->dev;
227
205
eqt = dev->priv.eq_table;
206
+
207
+
mlx5_eq_async_int_lock(eq_async, &flags);
228
208
229
209
eqe = next_eqe_sw(eq);
230
210
if (!eqe)
···
249
223
250
224
out:
251
225
eq_update_ci(eq, 1);
226
+
mlx5_eq_async_int_unlock(eq_async, &flags);
252
227
253
-
return 0;
228
+
return unlikely(action == ASYNC_EQ_RECOVER) ? num_eqes : 0;
229
+
}
230
+
231
+
void mlx5_cmd_eq_recover(struct mlx5_core_dev *dev)
232
+
{
233
+
struct mlx5_eq_async *eq = &dev->priv.eq_table->cmd_eq;
234
+
int eqes;
235
+
236
+
eqes = mlx5_eq_async_int(&eq->irq_nb, ASYNC_EQ_RECOVER, NULL);
237
+
if (eqes)
238
+
mlx5_core_warn(dev, "Recovered %d EQEs on cmd_eq\n", eqes);
254
239
}
255
240
256
241
static void init_eq_buf(struct mlx5_eq *eq)
···
606
569
int err;
607
570
608
571
eq->irq_nb.notifier_call = mlx5_eq_async_int;
572
+
spin_lock_init(&eq->lock);
609
573
610
574
err = create_async_eq(dev, &eq->core, param);
611
575
if (err) {
···
694
656
695
657
cleanup_async_eq(dev, &table->pages_eq, "pages");
696
658
cleanup_async_eq(dev, &table->async_eq, "async");
659
+
mlx5_cmd_allowed_opcode(dev, MLX5_CMD_OP_DESTROY_EQ);
697
660
mlx5_cmd_use_polling(dev);
698
661
cleanup_async_eq(dev, &table->cmd_eq, "cmd");
662
+
mlx5_cmd_allowed_opcode(dev, CMD_ALLOWED_OPCODE_ALL);
699
663
mlx5_eq_notifier_unregister(dev, &table->cq_err_nb);
700
664
}
701
665
+2
drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h
+2
drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h
···
37
37
struct mlx5_eq_async {
38
38
struct mlx5_eq core;
39
39
struct notifier_block irq_nb;
40
+
spinlock_t lock; /* To avoid irq EQ handle races with resiliency flows */
40
41
};
41
42
42
43
struct mlx5_eq_comp {
···
82
81
struct cpumask *mlx5_eq_comp_cpumask(struct mlx5_core_dev *dev, int ix);
83
82
84
83
u32 mlx5_eq_poll_irq_disabled(struct mlx5_eq_comp *eq);
84
+
void mlx5_cmd_eq_recover(struct mlx5_core_dev *dev);
85
85
void mlx5_eq_synchronize_async_irq(struct mlx5_core_dev *dev);
86
86
void mlx5_eq_synchronize_cmd_irq(struct mlx5_core_dev *dev);
87
87
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
+13
-11
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
+13
-11
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
···
3328
3328
return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3329
3329
}
3330
3330
3331
-
static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev, void *data)
3331
+
static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev,
3332
+
struct netdev_nested_priv *priv)
3332
3333
{
3333
-
struct mlxsw_sp_port **p_mlxsw_sp_port = data;
3334
3334
int ret = 0;
3335
3335
3336
3336
if (mlxsw_sp_port_dev_check(lower_dev)) {
3337
-
*p_mlxsw_sp_port = netdev_priv(lower_dev);
3337
+
priv->data = (void *)netdev_priv(lower_dev);
3338
3338
ret = 1;
3339
3339
}
3340
3340
···
3343
3343
3344
3344
struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3345
3345
{
3346
-
struct mlxsw_sp_port *mlxsw_sp_port;
3346
+
struct netdev_nested_priv priv = {
3347
+
.data = NULL,
3348
+
};
3347
3349
3348
3350
if (mlxsw_sp_port_dev_check(dev))
3349
3351
return netdev_priv(dev);
3350
3352
3351
-
mlxsw_sp_port = NULL;
3352
-
netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &mlxsw_sp_port);
3353
+
netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &priv);
3353
3354
3354
-
return mlxsw_sp_port;
3355
+
return (struct mlxsw_sp_port *)priv.data;
3355
3356
}
3356
3357
3357
3358
struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
···
3365
3364
3366
3365
struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3367
3366
{
3368
-
struct mlxsw_sp_port *mlxsw_sp_port;
3367
+
struct netdev_nested_priv priv = {
3368
+
.data = NULL,
3369
+
};
3369
3370
3370
3371
if (mlxsw_sp_port_dev_check(dev))
3371
3372
return netdev_priv(dev);
3372
3373
3373
-
mlxsw_sp_port = NULL;
3374
3374
netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk,
3375
-
&mlxsw_sp_port);
3375
+
&priv);
3376
3376
3377
-
return mlxsw_sp_port;
3377
+
return (struct mlxsw_sp_port *)priv.data;
3378
3378
}
3379
3379
3380
3380
struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
+2
-1
drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c
+2
-1
drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c
···
292
292
int err;
293
293
294
294
group->tcam = tcam;
295
-
mutex_init(&group->lock);
296
295
INIT_LIST_HEAD(&group->region_list);
297
296
298
297
err = mlxsw_sp_acl_tcam_group_id_get(tcam, &group->id);
299
298
if (err)
300
299
return err;
300
+
301
+
mutex_init(&group->lock);
301
302
302
303
return 0;
303
304
}
+8
-3
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
+8
-3
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
···
7351
7351
return err;
7352
7352
}
7353
7353
7354
-
static int __mlxsw_sp_rif_macvlan_flush(struct net_device *dev, void *data)
7354
+
static int __mlxsw_sp_rif_macvlan_flush(struct net_device *dev,
7355
+
struct netdev_nested_priv *priv)
7355
7356
{
7356
-
struct mlxsw_sp_rif *rif = data;
7357
+
struct mlxsw_sp_rif *rif = (struct mlxsw_sp_rif *)priv->data;
7357
7358
7358
7359
if (!netif_is_macvlan(dev))
7359
7360
return 0;
···
7365
7364
7366
7365
static int mlxsw_sp_rif_macvlan_flush(struct mlxsw_sp_rif *rif)
7367
7366
{
7367
+
struct netdev_nested_priv priv = {
7368
+
.data = (void *)rif,
7369
+
};
7370
+
7368
7371
if (!netif_is_macvlan_port(rif->dev))
7369
7372
return 0;
7370
7373
7371
7374
netdev_warn(rif->dev, "Router interface is deleted. Upper macvlans will not work\n");
7372
7375
return netdev_walk_all_upper_dev_rcu(rif->dev,
7373
-
__mlxsw_sp_rif_macvlan_flush, rif);
7376
+
__mlxsw_sp_rif_macvlan_flush, &priv);
7374
7377
}
7375
7378
7376
7379
static void mlxsw_sp_rif_subport_setup(struct mlxsw_sp_rif *rif,
+7
-3
drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
+7
-3
drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
···
136
136
}
137
137
138
138
static int mlxsw_sp_bridge_device_upper_rif_destroy(struct net_device *dev,
139
-
void *data)
139
+
struct netdev_nested_priv *priv)
140
140
{
141
-
struct mlxsw_sp *mlxsw_sp = data;
141
+
struct mlxsw_sp *mlxsw_sp = priv->data;
142
142
143
143
mlxsw_sp_rif_destroy_by_dev(mlxsw_sp, dev);
144
144
return 0;
···
147
147
static void mlxsw_sp_bridge_device_rifs_destroy(struct mlxsw_sp *mlxsw_sp,
148
148
struct net_device *dev)
149
149
{
150
+
struct netdev_nested_priv priv = {
151
+
.data = (void *)mlxsw_sp,
152
+
};
153
+
150
154
mlxsw_sp_rif_destroy_by_dev(mlxsw_sp, dev);
151
155
netdev_walk_all_upper_dev_rcu(dev,
152
156
mlxsw_sp_bridge_device_upper_rif_destroy,
153
-
mlxsw_sp);
157
+
&priv);
154
158
}
155
159
156
160
static int mlxsw_sp_bridge_device_vxlan_init(struct mlxsw_sp_bridge *bridge,
+31
-21
drivers/net/ethernet/realtek/r8169_main.c
+31
-21
drivers/net/ethernet/realtek/r8169_main.c
···
2236
2236
default:
2237
2237
break;
2238
2238
}
2239
-
2240
-
clk_disable_unprepare(tp->clk);
2241
2239
}
2242
2240
2243
2241
static void rtl_pll_power_up(struct rtl8169_private *tp)
2244
2242
{
2245
-
clk_prepare_enable(tp->clk);
2246
-
2247
2243
switch (tp->mac_version) {
2248
2244
case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_33:
2249
2245
case RTL_GIGA_MAC_VER_37:
···
2897
2901
{ 0x08, 0x0001, 0x0002 },
2898
2902
{ 0x09, 0x0000, 0x0080 },
2899
2903
{ 0x19, 0x0000, 0x0224 },
2900
-
{ 0x00, 0x0000, 0x0004 },
2904
+
{ 0x00, 0x0000, 0x0008 },
2901
2905
{ 0x0c, 0x3df0, 0x0200 },
2902
2906
};
2903
2907
···
2914
2918
{ 0x06, 0x00c0, 0x0020 },
2915
2919
{ 0x0f, 0xffff, 0x5200 },
2916
2920
{ 0x19, 0x0000, 0x0224 },
2917
-
{ 0x00, 0x0000, 0x0004 },
2921
+
{ 0x00, 0x0000, 0x0008 },
2918
2922
{ 0x0c, 0x3df0, 0x0200 },
2919
2923
};
2920
2924
···
4816
4820
4817
4821
#ifdef CONFIG_PM
4818
4822
4819
-
static int __maybe_unused rtl8169_suspend(struct device *device)
4823
+
static int rtl8169_net_resume(struct rtl8169_private *tp)
4820
4824
{
4821
-
struct rtl8169_private *tp = dev_get_drvdata(device);
4822
-
4823
-
rtnl_lock();
4824
-
rtl8169_net_suspend(tp);
4825
-
rtnl_unlock();
4826
-
4827
-
return 0;
4828
-
}
4829
-
4830
-
static int rtl8169_resume(struct device *device)
4831
-
{
4832
-
struct rtl8169_private *tp = dev_get_drvdata(device);
4833
-
4834
4825
rtl_rar_set(tp, tp->dev->dev_addr);
4835
4826
4836
4827
if (tp->TxDescArray)
···
4826
4843
netif_device_attach(tp->dev);
4827
4844
4828
4845
return 0;
4846
+
}
4847
+
4848
+
static int __maybe_unused rtl8169_suspend(struct device *device)
4849
+
{
4850
+
struct rtl8169_private *tp = dev_get_drvdata(device);
4851
+
4852
+
rtnl_lock();
4853
+
rtl8169_net_suspend(tp);
4854
+
if (!device_may_wakeup(tp_to_dev(tp)))
4855
+
clk_disable_unprepare(tp->clk);
4856
+
rtnl_unlock();
4857
+
4858
+
return 0;
4859
+
}
4860
+
4861
+
static int __maybe_unused rtl8169_resume(struct device *device)
4862
+
{
4863
+
struct rtl8169_private *tp = dev_get_drvdata(device);
4864
+
4865
+
if (!device_may_wakeup(tp_to_dev(tp)))
4866
+
clk_prepare_enable(tp->clk);
4867
+
4868
+
/* Reportedly at least Asus X453MA truncates packets otherwise */
4869
+
if (tp->mac_version == RTL_GIGA_MAC_VER_37)
4870
+
rtl_init_rxcfg(tp);
4871
+
4872
+
return rtl8169_net_resume(tp);
4829
4873
}
4830
4874
4831
4875
static int rtl8169_runtime_suspend(struct device *device)
···
4878
4868
4879
4869
__rtl8169_set_wol(tp, tp->saved_wolopts);
4880
4870
4881
-
return rtl8169_resume(device);
4871
+
return rtl8169_net_resume(tp);
4882
4872
}
4883
4873
4884
4874
static int rtl8169_runtime_idle(struct device *device)
+55
-55
drivers/net/ethernet/renesas/ravb_main.c
+55
-55
drivers/net/ethernet/renesas/ravb_main.c
···
1339
1339
return error;
1340
1340
}
1341
1341
1342
-
/* MDIO bus init function */
1343
-
static int ravb_mdio_init(struct ravb_private *priv)
1344
-
{
1345
-
struct platform_device *pdev = priv->pdev;
1346
-
struct device *dev = &pdev->dev;
1347
-
int error;
1348
-
1349
-
/* Bitbang init */
1350
-
priv->mdiobb.ops = &bb_ops;
1351
-
1352
-
/* MII controller setting */
1353
-
priv->mii_bus = alloc_mdio_bitbang(&priv->mdiobb);
1354
-
if (!priv->mii_bus)
1355
-
return -ENOMEM;
1356
-
1357
-
/* Hook up MII support for ethtool */
1358
-
priv->mii_bus->name = "ravb_mii";
1359
-
priv->mii_bus->parent = dev;
1360
-
snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1361
-
pdev->name, pdev->id);
1362
-
1363
-
/* Register MDIO bus */
1364
-
error = of_mdiobus_register(priv->mii_bus, dev->of_node);
1365
-
if (error)
1366
-
goto out_free_bus;
1367
-
1368
-
return 0;
1369
-
1370
-
out_free_bus:
1371
-
free_mdio_bitbang(priv->mii_bus);
1372
-
return error;
1373
-
}
1374
-
1375
-
/* MDIO bus release function */
1376
-
static int ravb_mdio_release(struct ravb_private *priv)
1377
-
{
1378
-
/* Unregister mdio bus */
1379
-
mdiobus_unregister(priv->mii_bus);
1380
-
1381
-
/* Free bitbang info */
1382
-
free_mdio_bitbang(priv->mii_bus);
1383
-
1384
-
return 0;
1385
-
}
1386
-
1387
1342
/* Network device open function for Ethernet AVB */
1388
1343
static int ravb_open(struct net_device *ndev)
1389
1344
{
···
1346
1391
struct platform_device *pdev = priv->pdev;
1347
1392
struct device *dev = &pdev->dev;
1348
1393
int error;
1349
-
1350
-
/* MDIO bus init */
1351
-
error = ravb_mdio_init(priv);
1352
-
if (error) {
1353
-
netdev_err(ndev, "failed to initialize MDIO\n");
1354
-
return error;
1355
-
}
1356
1394
1357
1395
napi_enable(&priv->napi[RAVB_BE]);
1358
1396
napi_enable(&priv->napi[RAVB_NC]);
···
1424
1476
out_napi_off:
1425
1477
napi_disable(&priv->napi[RAVB_NC]);
1426
1478
napi_disable(&priv->napi[RAVB_BE]);
1427
-
ravb_mdio_release(priv);
1428
1479
return error;
1429
1480
}
1430
1481
···
1733
1786
ravb_ring_free(ndev, RAVB_BE);
1734
1787
ravb_ring_free(ndev, RAVB_NC);
1735
1788
1736
-
ravb_mdio_release(priv);
1737
-
1738
1789
return 0;
1739
1790
}
1740
1791
···
1883
1938
.ndo_set_mac_address = eth_mac_addr,
1884
1939
.ndo_set_features = ravb_set_features,
1885
1940
};
1941
+
1942
+
/* MDIO bus init function */
1943
+
static int ravb_mdio_init(struct ravb_private *priv)
1944
+
{
1945
+
struct platform_device *pdev = priv->pdev;
1946
+
struct device *dev = &pdev->dev;
1947
+
int error;
1948
+
1949
+
/* Bitbang init */
1950
+
priv->mdiobb.ops = &bb_ops;
1951
+
1952
+
/* MII controller setting */
1953
+
priv->mii_bus = alloc_mdio_bitbang(&priv->mdiobb);
1954
+
if (!priv->mii_bus)
1955
+
return -ENOMEM;
1956
+
1957
+
/* Hook up MII support for ethtool */
1958
+
priv->mii_bus->name = "ravb_mii";
1959
+
priv->mii_bus->parent = dev;
1960
+
snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1961
+
pdev->name, pdev->id);
1962
+
1963
+
/* Register MDIO bus */
1964
+
error = of_mdiobus_register(priv->mii_bus, dev->of_node);
1965
+
if (error)
1966
+
goto out_free_bus;
1967
+
1968
+
return 0;
1969
+
1970
+
out_free_bus:
1971
+
free_mdio_bitbang(priv->mii_bus);
1972
+
return error;
1973
+
}
1974
+
1975
+
/* MDIO bus release function */
1976
+
static int ravb_mdio_release(struct ravb_private *priv)
1977
+
{
1978
+
/* Unregister mdio bus */
1979
+
mdiobus_unregister(priv->mii_bus);
1980
+
1981
+
/* Free bitbang info */
1982
+
free_mdio_bitbang(priv->mii_bus);
1983
+
1984
+
return 0;
1985
+
}
1886
1986
1887
1987
static const struct of_device_id ravb_match_table[] = {
1888
1988
{ .compatible = "renesas,etheravb-r8a7790", .data = (void *)RCAR_GEN2 },
···
2203
2213
eth_hw_addr_random(ndev);
2204
2214
}
2205
2215
2216
+
/* MDIO bus init */
2217
+
error = ravb_mdio_init(priv);
2218
+
if (error) {
2219
+
dev_err(&pdev->dev, "failed to initialize MDIO\n");
2220
+
goto out_dma_free;
2221
+
}
2222
+
2206
2223
netif_napi_add(ndev, &priv->napi[RAVB_BE], ravb_poll, 64);
2207
2224
netif_napi_add(ndev, &priv->napi[RAVB_NC], ravb_poll, 64);
2208
2225
···
2231
2234
out_napi_del:
2232
2235
netif_napi_del(&priv->napi[RAVB_NC]);
2233
2236
netif_napi_del(&priv->napi[RAVB_BE]);
2237
+
ravb_mdio_release(priv);
2238
+
out_dma_free:
2234
2239
dma_free_coherent(ndev->dev.parent, priv->desc_bat_size, priv->desc_bat,
2235
2240
priv->desc_bat_dma);
2236
2241
···
2264
2265
unregister_netdev(ndev);
2265
2266
netif_napi_del(&priv->napi[RAVB_NC]);
2266
2267
netif_napi_del(&priv->napi[RAVB_BE]);
2268
+
ravb_mdio_release(priv);
2267
2269
pm_runtime_disable(&pdev->dev);
2268
2270
free_netdev(ndev);
2269
2271
platform_set_drvdata(pdev, NULL);
+6
-3
drivers/net/ethernet/rocker/rocker_main.c
+6
-3
drivers/net/ethernet/rocker/rocker_main.c
···
3102
3102
struct rocker_port *port;
3103
3103
};
3104
3104
3105
-
static int rocker_lower_dev_walk(struct net_device *lower_dev, void *_data)
3105
+
static int rocker_lower_dev_walk(struct net_device *lower_dev,
3106
+
struct netdev_nested_priv *priv)
3106
3107
{
3107
-
struct rocker_walk_data *data = _data;
3108
+
struct rocker_walk_data *data = (struct rocker_walk_data *)priv->data;
3108
3109
int ret = 0;
3109
3110
3110
3111
if (rocker_port_dev_check_under(lower_dev, data->rocker)) {
···
3119
3118
struct rocker_port *rocker_port_dev_lower_find(struct net_device *dev,
3120
3119
struct rocker *rocker)
3121
3120
{
3121
+
struct netdev_nested_priv priv;
3122
3122
struct rocker_walk_data data;
3123
3123
3124
3124
if (rocker_port_dev_check_under(dev, rocker))
···
3127
3125
3128
3126
data.rocker = rocker;
3129
3127
data.port = NULL;
3130
-
netdev_walk_all_lower_dev(dev, rocker_lower_dev_walk, &data);
3128
+
priv.data = (void *)&data;
3129
+
netdev_walk_all_lower_dev(dev, rocker_lower_dev_walk, &priv);
3131
3130
3132
3131
return data.port;
3133
3132
}
-1
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
-1
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
+2
drivers/net/ethernet/stmicro/stmmac/stmmac.h
+2
drivers/net/ethernet/stmicro/stmmac/stmmac.h
+15
-12
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+15
-12
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
···
692
692
edata->eee_enabled = priv->eee_enabled;
693
693
edata->eee_active = priv->eee_active;
694
694
edata->tx_lpi_timer = priv->tx_lpi_timer;
695
+
edata->tx_lpi_enabled = priv->tx_lpi_enabled;
695
696
696
697
return phylink_ethtool_get_eee(priv->phylink, edata);
697
698
}
···
703
702
struct stmmac_priv *priv = netdev_priv(dev);
704
703
int ret;
705
704
706
-
if (!edata->eee_enabled) {
705
+
if (!priv->dma_cap.eee)
706
+
return -EOPNOTSUPP;
707
+
708
+
if (priv->tx_lpi_enabled != edata->tx_lpi_enabled)
709
+
netdev_warn(priv->dev,
710
+
"Setting EEE tx-lpi is not supported\n");
711
+
712
+
if (!edata->eee_enabled)
707
713
stmmac_disable_eee_mode(priv);
708
-
} else {
709
-
/* We are asking for enabling the EEE but it is safe
710
-
* to verify all by invoking the eee_init function.
711
-
* In case of failure it will return an error.
712
-
*/
713
-
edata->eee_enabled = stmmac_eee_init(priv);
714
-
if (!edata->eee_enabled)
715
-
return -EOPNOTSUPP;
716
-
}
717
714
718
715
ret = phylink_ethtool_set_eee(priv->phylink, edata);
719
716
if (ret)
720
717
return ret;
721
718
722
-
priv->eee_enabled = edata->eee_enabled;
723
-
priv->tx_lpi_timer = edata->tx_lpi_timer;
719
+
if (edata->eee_enabled &&
720
+
priv->tx_lpi_timer != edata->tx_lpi_timer) {
721
+
priv->tx_lpi_timer = edata->tx_lpi_timer;
722
+
stmmac_eee_init(priv);
723
+
}
724
+
724
725
return 0;
725
726
}
726
727
+15
-8
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+15
-8
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
···
94
94
static int eee_timer = STMMAC_DEFAULT_LPI_TIMER;
95
95
module_param(eee_timer, int, 0644);
96
96
MODULE_PARM_DESC(eee_timer, "LPI tx expiration time in msec");
97
-
#define STMMAC_LPI_T(x) (jiffies + msecs_to_jiffies(x))
97
+
#define STMMAC_LPI_T(x) (jiffies + usecs_to_jiffies(x))
98
98
99
99
/* By default the driver will use the ring mode to manage tx and rx descriptors,
100
100
* but allow user to force to use the chain instead of the ring
···
344
344
struct stmmac_priv *priv = from_timer(priv, t, eee_ctrl_timer);
345
345
346
346
stmmac_enable_eee_mode(priv);
347
-
mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer));
347
+
mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
348
348
}
349
349
350
350
/**
···
357
357
*/
358
358
bool stmmac_eee_init(struct stmmac_priv *priv)
359
359
{
360
-
int tx_lpi_timer = priv->tx_lpi_timer;
360
+
int eee_tw_timer = priv->eee_tw_timer;
361
361
362
362
/* Using PCS we cannot dial with the phy registers at this stage
363
363
* so we do not support extra feature like EEE.
···
377
377
if (priv->eee_enabled) {
378
378
netdev_dbg(priv->dev, "disable EEE\n");
379
379
del_timer_sync(&priv->eee_ctrl_timer);
380
-
stmmac_set_eee_timer(priv, priv->hw, 0, tx_lpi_timer);
380
+
stmmac_set_eee_timer(priv, priv->hw, 0, eee_tw_timer);
381
381
}
382
382
mutex_unlock(&priv->lock);
383
383
return false;
···
385
385
386
386
if (priv->eee_active && !priv->eee_enabled) {
387
387
timer_setup(&priv->eee_ctrl_timer, stmmac_eee_ctrl_timer, 0);
388
-
mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer));
389
388
stmmac_set_eee_timer(priv, priv->hw, STMMAC_DEFAULT_LIT_LS,
390
-
tx_lpi_timer);
389
+
eee_tw_timer);
391
390
}
391
+
392
+
mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
392
393
393
394
mutex_unlock(&priv->lock);
394
395
netdev_dbg(priv->dev, "Energy-Efficient Ethernet initialized\n");
···
905
904
906
905
stmmac_mac_set(priv, priv->ioaddr, false);
907
906
priv->eee_active = false;
907
+
priv->tx_lpi_enabled = false;
908
908
stmmac_eee_init(priv);
909
909
stmmac_set_eee_pls(priv, priv->hw, false);
910
910
}
···
1003
1001
if (phy && priv->dma_cap.eee) {
1004
1002
priv->eee_active = phy_init_eee(phy, 1) >= 0;
1005
1003
priv->eee_enabled = stmmac_eee_init(priv);
1004
+
priv->tx_lpi_enabled = priv->eee_enabled;
1006
1005
stmmac_set_eee_pls(priv, priv->hw, true);
1007
1006
}
1008
1007
}
···
2046
2043
2047
2044
if ((priv->eee_enabled) && (!priv->tx_path_in_lpi_mode)) {
2048
2045
stmmac_enable_eee_mode(priv);
2049
-
mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer));
2046
+
mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
2050
2047
}
2051
2048
2052
2049
/* We still have pending packets, let's call for a new scheduling */
···
2681
2678
netdev_warn(priv->dev, "PTP init failed\n");
2682
2679
}
2683
2680
2684
-
priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
2681
+
priv->eee_tw_timer = STMMAC_DEFAULT_TWT_LS;
2682
+
2683
+
/* Convert the timer from msec to usec */
2684
+
if (!priv->tx_lpi_timer)
2685
+
priv->tx_lpi_timer = eee_timer * 1000;
2685
2686
2686
2687
if (priv->use_riwt) {
2687
2688
if (!priv->rx_riwt)
+4
-17
drivers/net/ethernet/via/via-rhine.c
+4
-17
drivers/net/ethernet/via/via-rhine.c
···
2
2
/*
3
3
Written 1998-2001 by Donald Becker.
4
4
5
-
Current Maintainer: Roger Luethi <rl@hellgate.ch>
5
+
Current Maintainer: Kevin Brace <kevinbrace@bracecomputerlab.com>
6
6
7
7
This software may be used and distributed according to the terms of
8
8
the GNU General Public License (GPL), incorporated herein by reference.
···
32
32
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
33
34
34
#define DRV_NAME "via-rhine"
35
-
#define DRV_VERSION "1.5.1"
36
-
#define DRV_RELDATE "2010-10-09"
37
35
38
36
#include <linux/types.h>
39
37
···
114
116
#include <asm/irq.h>
115
117
#include <linux/uaccess.h>
116
118
#include <linux/dmi.h>
117
-
118
-
/* These identify the driver base version and may not be removed. */
119
-
static const char version[] =
120
-
"v1.10-LK" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker";
121
119
122
120
MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
123
121
MODULE_DESCRIPTION("VIA Rhine PCI Fast Ethernet driver");
···
237
243
VT8233 = 0x60, /* Integrated MAC */
238
244
VT8235 = 0x74, /* Integrated MAC */
239
245
VT8237 = 0x78, /* Integrated MAC */
240
-
VTunknown1 = 0x7C,
246
+
VT8251 = 0x7C, /* Integrated MAC */
241
247
VT6105 = 0x80,
242
248
VT6105_B0 = 0x83,
243
249
VT6105L = 0x8A,
···
1045
1051
u32 quirks = 0;
1046
1052
#endif
1047
1053
1048
-
/* when built into the kernel, we only print version if device is found */
1049
-
#ifndef MODULE
1050
-
pr_info_once("%s\n", version);
1051
-
#endif
1052
-
1053
1054
rc = pci_enable_device(pdev);
1054
1055
if (rc)
1055
1056
goto err_out;
···
1695
1706
goto out_free_ring;
1696
1707
1697
1708
alloc_tbufs(dev);
1709
+
enable_mmio(rp->pioaddr, rp->quirks);
1710
+
rhine_power_init(dev);
1698
1711
rhine_chip_reset(dev);
1699
1712
rhine_task_enable(rp);
1700
1713
init_registers(dev);
···
2285
2294
struct device *hwdev = dev->dev.parent;
2286
2295
2287
2296
strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
2288
-
strlcpy(info->version, DRV_VERSION, sizeof(info->version));
2289
2297
strlcpy(info->bus_info, dev_name(hwdev), sizeof(info->bus_info));
2290
2298
}
2291
2299
···
2606
2616
int ret_pci, ret_platform;
2607
2617
2608
2618
/* when a module, this is printed whether or not devices are found in probe */
2609
-
#ifdef MODULE
2610
-
pr_info("%s\n", version);
2611
-
#endif
2612
2619
if (dmi_check_system(rhine_dmi_table)) {
2613
2620
/* these BIOSes fail at PXE boot if chip is in D3 */
2614
2621
avoid_D3 = true;
+1
drivers/net/mdio/Kconfig
+1
drivers/net/mdio/Kconfig
+16
-15
drivers/net/phy/realtek.c
+16
-15
drivers/net/phy/realtek.c
···
1
1
// SPDX-License-Identifier: GPL-2.0+
2
-
/*
3
-
* drivers/net/phy/realtek.c
2
+
/* drivers/net/phy/realtek.c
4
3
*
5
4
* Driver for Realtek PHYs
6
5
*
···
36
37
#define RTL8211F_ALDPS_ENABLE BIT(2)
37
38
#define RTL8211F_ALDPS_XTAL_OFF BIT(12)
38
39
39
-
#define RTL8211E_TX_DELAY BIT(1)
40
-
#define RTL8211E_RX_DELAY BIT(2)
41
-
#define RTL8211E_MODE_MII_GMII BIT(3)
40
+
#define RTL8211E_CTRL_DELAY BIT(13)
41
+
#define RTL8211E_TX_DELAY BIT(12)
42
+
#define RTL8211E_RX_DELAY BIT(11)
42
43
43
44
#define RTL8201F_ISR 0x1e
44
45
#define RTL8201F_IER 0x13
···
254
255
/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
255
256
switch (phydev->interface) {
256
257
case PHY_INTERFACE_MODE_RGMII:
257
-
val = 0;
258
+
val = RTL8211E_CTRL_DELAY | 0;
258
259
break;
259
260
case PHY_INTERFACE_MODE_RGMII_ID:
260
-
val = RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
261
+
val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
261
262
break;
262
263
case PHY_INTERFACE_MODE_RGMII_RXID:
263
-
val = RTL8211E_RX_DELAY;
264
+
val = RTL8211E_CTRL_DELAY | RTL8211E_RX_DELAY;
264
265
break;
265
266
case PHY_INTERFACE_MODE_RGMII_TXID:
266
-
val = RTL8211E_TX_DELAY;
267
+
val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY;
267
268
break;
268
269
default: /* the rest of the modes imply leaving delays as is. */
269
270
return 0;
···
271
272
272
273
/* According to a sample driver there is a 0x1c config register on the
273
274
* 0xa4 extension page (0x7) layout. It can be used to disable/enable
274
-
* the RX/TX delays otherwise controlled by RXDLY/TXDLY pins. It can
275
-
* also be used to customize the whole configuration register:
276
-
* 8:6 = PHY Address, 5:4 = Auto-Negotiation, 3 = Interface Mode Select,
277
-
* 2 = RX Delay, 1 = TX Delay, 0 = SELRGV (see original PHY datasheet
278
-
* for details).
275
+
* the RX/TX delays otherwise controlled by RXDLY/TXDLY pins.
276
+
* The configuration register definition:
277
+
* 14 = reserved
278
+
* 13 = Force Tx RX Delay controlled by bit12 bit11,
279
+
* 12 = RX Delay, 11 = TX Delay
280
+
* 10:0 = Test && debug settings reserved by realtek
279
281
*/
280
282
oldpage = phy_select_page(phydev, 0x7);
281
283
if (oldpage < 0)
···
286
286
if (ret)
287
287
goto err_restore_page;
288
288
289
-
ret = __phy_modify(phydev, 0x1c, RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
289
+
ret = __phy_modify(phydev, 0x1c, RTL8211E_CTRL_DELAY
290
+
| RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
290
291
val);
291
292
292
293
err_restore_page:
+2
-1
drivers/net/team/team.c
+2
-1
drivers/net/team/team.c
···
287
287
for (i--; i >= 0; i--)
288
288
__team_option_inst_del_option(team, dst_opts[i]);
289
289
290
-
i = option_count - 1;
290
+
i = option_count;
291
291
alloc_rollback:
292
292
for (i--; i >= 0; i--)
293
293
kfree(dst_opts[i]);
···
2112
2112
dev->header_ops = port_dev->header_ops;
2113
2113
dev->type = port_dev->type;
2114
2114
dev->hard_header_len = port_dev->hard_header_len;
2115
+
dev->needed_headroom = port_dev->needed_headroom;
2115
2116
dev->addr_len = port_dev->addr_len;
2116
2117
dev->mtu = port_dev->mtu;
2117
2118
memcpy(dev->broadcast, port_dev->broadcast, port_dev->addr_len);
+35
drivers/net/usb/ax88179_178a.c
+35
drivers/net/usb/ax88179_178a.c
···
1823
1823
.status = ax88179_status,
1824
1824
.link_reset = ax88179_link_reset,
1825
1825
.reset = ax88179_reset,
1826
+
.stop = ax88179_stop,
1827
+
.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1828
+
.rx_fixup = ax88179_rx_fixup,
1829
+
.tx_fixup = ax88179_tx_fixup,
1830
+
};
1831
+
1832
+
static const struct driver_info toshiba_info = {
1833
+
.description = "Toshiba USB Ethernet Adapter",
1834
+
.bind = ax88179_bind,
1835
+
.unbind = ax88179_unbind,
1836
+
.status = ax88179_status,
1837
+
.link_reset = ax88179_link_reset,
1838
+
.reset = ax88179_reset,
1839
+
.stop = ax88179_stop,
1840
+
.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1841
+
.rx_fixup = ax88179_rx_fixup,
1842
+
.tx_fixup = ax88179_tx_fixup,
1843
+
};
1844
+
1845
+
static const struct driver_info mct_info = {
1846
+
.description = "MCT USB 3.0 Gigabit Ethernet Adapter",
1847
+
.bind = ax88179_bind,
1848
+
.unbind = ax88179_unbind,
1849
+
.status = ax88179_status,
1850
+
.link_reset = ax88179_link_reset,
1851
+
.reset = ax88179_reset,
1852
+
.stop = ax88179_stop,
1826
1853
.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1827
1854
.rx_fixup = ax88179_rx_fixup,
1828
1855
.tx_fixup = ax88179_tx_fixup,
···
1888
1861
/* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1889
1862
USB_DEVICE(0x050d, 0x0128),
1890
1863
.driver_info = (unsigned long)&belkin_info,
1864
+
}, {
1865
+
/* Toshiba USB 3.0 GBit Ethernet Adapter */
1866
+
USB_DEVICE(0x0930, 0x0a13),
1867
+
.driver_info = (unsigned long)&toshiba_info,
1868
+
}, {
1869
+
/* Magic Control Technology U3-A9003 USB 3.0 Gigabit Ethernet Adapter */
1870
+
USB_DEVICE(0x0711, 0x0179),
1871
+
.driver_info = (unsigned long)&mct_info,
1891
1872
},
1892
1873
{ },
1893
1874
};
+27
-8
drivers/net/usb/pegasus.c
+27
-8
drivers/net/usb/pegasus.c
···
360
360
}
361
361
#endif /* PEGASUS_WRITE_EEPROM */
362
362
363
-
static inline void get_node_id(pegasus_t *pegasus, __u8 *id)
363
+
static inline int get_node_id(pegasus_t *pegasus, u8 *id)
364
364
{
365
-
int i;
366
-
__u16 w16;
365
+
int i, ret;
366
+
u16 w16;
367
367
368
368
for (i = 0; i < 3; i++) {
369
-
read_eprom_word(pegasus, i, &w16);
369
+
ret = read_eprom_word(pegasus, i, &w16);
370
+
if (ret < 0)
371
+
return ret;
370
372
((__le16 *) id)[i] = cpu_to_le16(w16);
371
373
}
374
+
375
+
return 0;
372
376
}
373
377
374
378
static void set_ethernet_addr(pegasus_t *pegasus)
375
379
{
376
-
__u8 node_id[6];
380
+
int ret;
381
+
u8 node_id[6];
377
382
378
383
if (pegasus->features & PEGASUS_II) {
379
-
get_registers(pegasus, 0x10, sizeof(node_id), node_id);
384
+
ret = get_registers(pegasus, 0x10, sizeof(node_id), node_id);
385
+
if (ret < 0)
386
+
goto err;
380
387
} else {
381
-
get_node_id(pegasus, node_id);
382
-
set_registers(pegasus, EthID, sizeof(node_id), node_id);
388
+
ret = get_node_id(pegasus, node_id);
389
+
if (ret < 0)
390
+
goto err;
391
+
ret = set_registers(pegasus, EthID, sizeof(node_id), node_id);
392
+
if (ret < 0)
393
+
goto err;
383
394
}
395
+
384
396
memcpy(pegasus->net->dev_addr, node_id, sizeof(node_id));
397
+
398
+
return;
399
+
err:
400
+
eth_hw_addr_random(pegasus->net);
401
+
dev_info(&pegasus->intf->dev, "software assigned MAC address.\n");
402
+
403
+
return;
385
404
}
386
405
387
406
static inline int reset_mac(pegasus_t *pegasus)
+7
-1
drivers/net/virtio_net.c
+7
-1
drivers/net/virtio_net.c
···
63
63
VIRTIO_NET_F_GUEST_CSUM
64
64
};
65
65
66
+
#define GUEST_OFFLOAD_LRO_MASK ((1ULL << VIRTIO_NET_F_GUEST_TSO4) | \
67
+
(1ULL << VIRTIO_NET_F_GUEST_TSO6) | \
68
+
(1ULL << VIRTIO_NET_F_GUEST_ECN) | \
69
+
(1ULL << VIRTIO_NET_F_GUEST_UFO))
70
+
66
71
struct virtnet_stat_desc {
67
72
char desc[ETH_GSTRING_LEN];
68
73
size_t offset;
···
2536
2531
if (features & NETIF_F_LRO)
2537
2532
offloads = vi->guest_offloads_capable;
2538
2533
else
2539
-
offloads = 0;
2534
+
offloads = vi->guest_offloads_capable &
2535
+
~GUEST_OFFLOAD_LRO_MASK;
2540
2536
2541
2537
err = virtnet_set_guest_offloads(vi, offloads);
2542
2538
if (err)
+2
-3
drivers/net/vmxnet3/vmxnet3_drv.c
+2
-3
drivers/net/vmxnet3/vmxnet3_drv.c
···
1032
1032
/* Use temporary descriptor to avoid touching bits multiple times */
1033
1033
union Vmxnet3_GenericDesc tempTxDesc;
1034
1034
#endif
1035
-
struct udphdr *udph;
1036
1035
1037
1036
count = txd_estimate(skb);
1038
1037
···
1134
1135
gdesc->txd.om = VMXNET3_OM_ENCAP;
1135
1136
gdesc->txd.msscof = ctx.mss;
1136
1137
1137
-
udph = udp_hdr(skb);
1138
-
if (udph->check)
1138
+
if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)
1139
1139
gdesc->txd.oco = 1;
1140
1140
} else {
1141
1141
gdesc->txd.hlen = ctx.l4_offset + ctx.l4_hdr_size;
···
3369
3371
.ndo_change_mtu = vmxnet3_change_mtu,
3370
3372
.ndo_fix_features = vmxnet3_fix_features,
3371
3373
.ndo_set_features = vmxnet3_set_features,
3374
+
.ndo_features_check = vmxnet3_features_check,
3372
3375
.ndo_get_stats64 = vmxnet3_get_stats64,
3373
3376
.ndo_tx_timeout = vmxnet3_tx_timeout,
3374
3377
.ndo_set_rx_mode = vmxnet3_set_mc,
+28
drivers/net/vmxnet3/vmxnet3_ethtool.c
+28
drivers/net/vmxnet3/vmxnet3_ethtool.c
···
267
267
return features;
268
268
}
269
269
270
+
netdev_features_t vmxnet3_features_check(struct sk_buff *skb,
271
+
struct net_device *netdev,
272
+
netdev_features_t features)
273
+
{
274
+
struct vmxnet3_adapter *adapter = netdev_priv(netdev);
275
+
276
+
/* Validate if the tunneled packet is being offloaded by the device */
277
+
if (VMXNET3_VERSION_GE_4(adapter) &&
278
+
skb->encapsulation && skb->ip_summed == CHECKSUM_PARTIAL) {
279
+
u8 l4_proto = 0;
280
+
281
+
switch (vlan_get_protocol(skb)) {
282
+
case htons(ETH_P_IP):
283
+
l4_proto = ip_hdr(skb)->protocol;
284
+
break;
285
+
case htons(ETH_P_IPV6):
286
+
l4_proto = ipv6_hdr(skb)->nexthdr;
287
+
break;
288
+
default:
289
+
return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
290
+
}
291
+
292
+
if (l4_proto != IPPROTO_UDP)
293
+
return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
294
+
}
295
+
return features;
296
+
}
297
+
270
298
static void vmxnet3_enable_encap_offloads(struct net_device *netdev)
271
299
{
272
300
struct vmxnet3_adapter *adapter = netdev_priv(netdev);
+4
drivers/net/vmxnet3/vmxnet3_int.h
+4
drivers/net/vmxnet3/vmxnet3_int.h
···
470
470
netdev_features_t
471
471
vmxnet3_fix_features(struct net_device *netdev, netdev_features_t features);
472
472
473
+
netdev_features_t
474
+
vmxnet3_features_check(struct sk_buff *skb,
475
+
struct net_device *netdev, netdev_features_t features);
476
+
473
477
int
474
478
vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
475
479
+26
-17
drivers/net/wan/x25_asy.c
+26
-17
drivers/net/wan/x25_asy.c
···
461
461
{
462
462
struct x25_asy *sl = netdev_priv(dev);
463
463
unsigned long len;
464
-
int err;
465
464
466
465
if (sl->tty == NULL)
467
466
return -ENODEV;
···
486
487
sl->xleft = 0;
487
488
sl->flags &= (1 << SLF_INUSE); /* Clear ESCAPE & ERROR flags */
488
489
489
-
netif_start_queue(dev);
490
-
491
-
/*
492
-
* Now attach LAPB
493
-
*/
494
-
err = lapb_register(dev, &x25_asy_callbacks);
495
-
if (err == LAPB_OK)
496
-
return 0;
490
+
return 0;
497
491
498
492
/* Cleanup */
499
493
kfree(sl->xbuff);
···
508
516
if (sl->tty)
509
517
clear_bit(TTY_DO_WRITE_WAKEUP, &sl->tty->flags);
510
518
511
-
netif_stop_queue(dev);
512
519
sl->rcount = 0;
513
520
sl->xleft = 0;
514
521
spin_unlock(&sl->lock);
···
592
601
static void x25_asy_close_tty(struct tty_struct *tty)
593
602
{
594
603
struct x25_asy *sl = tty->disc_data;
595
-
int err;
596
604
597
605
/* First make sure we're connected. */
598
606
if (!sl || sl->magic != X25_ASY_MAGIC)
···
601
611
if (sl->dev->flags & IFF_UP)
602
612
dev_close(sl->dev);
603
613
rtnl_unlock();
604
-
605
-
err = lapb_unregister(sl->dev);
606
-
if (err != LAPB_OK)
607
-
pr_err("%s: lapb_unregister error: %d\n",
608
-
__func__, err);
609
614
610
615
tty->disc_data = NULL;
611
616
sl->tty = NULL;
···
704
719
705
720
static int x25_asy_open_dev(struct net_device *dev)
706
721
{
722
+
int err;
707
723
struct x25_asy *sl = netdev_priv(dev);
708
724
if (sl->tty == NULL)
709
725
return -ENODEV;
726
+
727
+
err = lapb_register(dev, &x25_asy_callbacks);
728
+
if (err != LAPB_OK)
729
+
return -ENOMEM;
730
+
731
+
netif_start_queue(dev);
732
+
733
+
return 0;
734
+
}
735
+
736
+
static int x25_asy_close_dev(struct net_device *dev)
737
+
{
738
+
int err;
739
+
740
+
netif_stop_queue(dev);
741
+
742
+
err = lapb_unregister(dev);
743
+
if (err != LAPB_OK)
744
+
pr_err("%s: lapb_unregister error: %d\n",
745
+
__func__, err);
746
+
747
+
x25_asy_close(dev);
748
+
710
749
return 0;
711
750
}
712
751
713
752
static const struct net_device_ops x25_asy_netdev_ops = {
714
753
.ndo_open = x25_asy_open_dev,
715
-
.ndo_stop = x25_asy_close,
754
+
.ndo_stop = x25_asy_close_dev,
716
755
.ndo_start_xmit = x25_asy_xmit,
717
756
.ndo_tx_timeout = x25_asy_timeout,
718
757
.ndo_change_mtu = x25_asy_change_mtu,
+1
-1
drivers/net/wireless/mediatek/mt76/mt7615/init.c
+1
-1
drivers/net/wireless/mediatek/mt76/mt7615/init.c
···
481
481
dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
482
482
dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
483
483
dev->mphy.sband_5g.sband.vht_cap.cap |=
484
-
IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
484
+
IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
485
485
IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
486
486
mt7615_cap_dbdc_disable(dev);
487
487
dev->phy.dfs_state = -1;
+7
-3
drivers/net/wireless/quantenna/qtnfmac/core.c
+7
-3
drivers/net/wireless/quantenna/qtnfmac/core.c
···
670
670
return ndev->netdev_ops == &qtnf_netdev_ops;
671
671
}
672
672
673
-
static int qtnf_check_br_ports(struct net_device *dev, void *data)
673
+
static int qtnf_check_br_ports(struct net_device *dev,
674
+
struct netdev_nested_priv *priv)
674
675
{
675
-
struct net_device *ndev = data;
676
+
struct net_device *ndev = (struct net_device *)priv->data;
676
677
677
678
if (dev != ndev && netdev_port_same_parent_id(dev, ndev))
678
679
return -ENOTSUPP;
···
686
685
{
687
686
struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
688
687
const struct netdev_notifier_changeupper_info *info;
688
+
struct netdev_nested_priv priv = {
689
+
.data = (void *)ndev,
690
+
};
689
691
struct net_device *brdev;
690
692
struct qtnf_vif *vif;
691
693
struct qtnf_bus *bus;
···
728
724
} else {
729
725
ret = netdev_walk_all_lower_dev(brdev,
730
726
qtnf_check_br_ports,
731
-
ndev);
727
+
&priv);
732
728
}
733
729
734
730
break;
+6
-3
drivers/nvme/host/core.c
+6
-3
drivers/nvme/host/core.c
···
3041
3041
if (!cel)
3042
3042
return -ENOMEM;
3043
3043
3044
-
ret = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CMD_EFFECTS, 0, csi,
3044
+
ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
3045
3045
&cel->log, sizeof(cel->log), 0);
3046
3046
if (ret) {
3047
3047
kfree(cel);
···
3236
3236
if (ret < 0)
3237
3237
return ret;
3238
3238
3239
-
if (!ctrl->identified)
3240
-
nvme_hwmon_init(ctrl);
3239
+
if (!ctrl->identified) {
3240
+
ret = nvme_hwmon_init(ctrl);
3241
+
if (ret < 0)
3242
+
return ret;
3243
+
}
3241
3244
3242
3245
ctrl->identified = true;
3243
3246
+4
-2
drivers/nvme/host/fc.c
+4
-2
drivers/nvme/host/fc.c
···
3671
3671
spin_lock_irqsave(&nvme_fc_lock, flags);
3672
3672
list_for_each_entry(lport, &nvme_fc_lport_list, port_list) {
3673
3673
if (lport->localport.node_name != laddr.nn ||
3674
-
lport->localport.port_name != laddr.pn)
3674
+
lport->localport.port_name != laddr.pn ||
3675
+
lport->localport.port_state != FC_OBJSTATE_ONLINE)
3675
3676
continue;
3676
3677
3677
3678
list_for_each_entry(rport, &lport->endp_list, endp_list) {
3678
3679
if (rport->remoteport.node_name != raddr.nn ||
3679
-
rport->remoteport.port_name != raddr.pn)
3680
+
rport->remoteport.port_name != raddr.pn ||
3681
+
rport->remoteport.port_state != FC_OBJSTATE_ONLINE)
3680
3682
continue;
3681
3683
3682
3684
/* if fail to get reference fall through. Will error */
+6
-8
drivers/nvme/host/hwmon.c
+6
-8
drivers/nvme/host/hwmon.c
···
59
59
60
60
static int nvme_hwmon_get_smart_log(struct nvme_hwmon_data *data)
61
61
{
62
-
int ret;
63
-
64
-
ret = nvme_get_log(data->ctrl, NVME_NSID_ALL, NVME_LOG_SMART, 0,
62
+
return nvme_get_log(data->ctrl, NVME_NSID_ALL, NVME_LOG_SMART, 0,
65
63
NVME_CSI_NVM, &data->log, sizeof(data->log), 0);
66
-
67
-
return ret <= 0 ? ret : -EIO;
68
64
}
69
65
70
66
static int nvme_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
···
221
225
.info = nvme_hwmon_info,
222
226
};
223
227
224
-
void nvme_hwmon_init(struct nvme_ctrl *ctrl)
228
+
int nvme_hwmon_init(struct nvme_ctrl *ctrl)
225
229
{
226
230
struct device *dev = ctrl->dev;
227
231
struct nvme_hwmon_data *data;
···
230
234
231
235
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
232
236
if (!data)
233
-
return;
237
+
return 0;
234
238
235
239
data->ctrl = ctrl;
236
240
mutex_init(&data->read_lock);
···
240
244
dev_warn(ctrl->device,
241
245
"Failed to read smart log (error %d)\n", err);
242
246
devm_kfree(dev, data);
243
-
return;
247
+
return err;
244
248
}
245
249
246
250
hwmon = devm_hwmon_device_register_with_info(dev, "nvme", data,
···
250
254
dev_warn(dev, "Failed to instantiate hwmon device\n");
251
255
devm_kfree(dev, data);
252
256
}
257
+
258
+
return 0;
253
259
}
+5
-2
drivers/nvme/host/nvme.h
+5
-2
drivers/nvme/host/nvme.h
···
827
827
}
828
828
829
829
#ifdef CONFIG_NVME_HWMON
830
-
void nvme_hwmon_init(struct nvme_ctrl *ctrl);
830
+
int nvme_hwmon_init(struct nvme_ctrl *ctrl);
831
831
#else
832
-
static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { }
832
+
static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
833
+
{
834
+
return 0;
835
+
}
833
836
#endif
834
837
835
838
u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
+7
-7
drivers/nvme/host/pci.c
+7
-7
drivers/nvme/host/pci.c
···
940
940
struct nvme_completion *cqe = &nvmeq->cqes[idx];
941
941
struct request *req;
942
942
943
-
if (unlikely(cqe->command_id >= nvmeq->q_depth)) {
944
-
dev_warn(nvmeq->dev->ctrl.device,
945
-
"invalid id %d completed on queue %d\n",
946
-
cqe->command_id, le16_to_cpu(cqe->sq_id));
947
-
return;
948
-
}
949
-
950
943
/*
951
944
* AEN requests are special as they don't time out and can
952
945
* survive any kind of queue freeze and often don't respond to
···
953
960
}
954
961
955
962
req = blk_mq_tag_to_rq(nvme_queue_tagset(nvmeq), cqe->command_id);
963
+
if (unlikely(!req)) {
964
+
dev_warn(nvmeq->dev->ctrl.device,
965
+
"invalid id %d completed on queue %d\n",
966
+
cqe->command_id, le16_to_cpu(cqe->sq_id));
967
+
return;
968
+
}
969
+
956
970
trace_nvme_sq(req, cqe->sq_head, nvmeq->sq_tail);
957
971
if (!nvme_try_complete_req(req, cqe->status, cqe->result))
958
972
nvme_pci_complete_rq(req);
+3
-4
drivers/nvme/host/tcp.c
+3
-4
drivers/nvme/host/tcp.c
···
913
913
else
914
914
flags |= MSG_MORE | MSG_SENDPAGE_NOTLAST;
915
915
916
-
/* can't zcopy slab pages */
917
-
if (unlikely(PageSlab(page))) {
918
-
ret = sock_no_sendpage(queue->sock, page, offset, len,
916
+
if (sendpage_ok(page)) {
917
+
ret = kernel_sendpage(queue->sock, page, offset, len,
919
918
flags);
920
919
} else {
921
-
ret = kernel_sendpage(queue->sock, page, offset, len,
920
+
ret = sock_no_sendpage(queue->sock, page, offset, len,
922
921
flags);
923
922
}
924
923
if (ret <= 0)
+4
-7
drivers/pci/controller/pcie-rockchip-host.c
+4
-7
drivers/pci/controller/pcie-rockchip-host.c
···
71
71
static int rockchip_pcie_valid_device(struct rockchip_pcie *rockchip,
72
72
struct pci_bus *bus, int dev)
73
73
{
74
-
/* access only one slot on each root port */
75
-
if (pci_is_root_bus(bus) && dev > 0)
76
-
return 0;
77
-
78
74
/*
79
-
* do not read more than one device on the bus directly attached
75
+
* Access only one slot on each root port.
76
+
* Do not read more than one device on the bus directly attached
80
77
* to RC's downstream side.
81
78
*/
82
-
if (pci_is_root_bus(bus->parent) && dev > 0)
83
-
return 0;
79
+
if (pci_is_root_bus(bus) || pci_is_root_bus(bus->parent))
80
+
return dev == 0;
84
81
85
82
return 1;
86
83
}
+4
-2
drivers/phy/ti/phy-am654-serdes.c
+4
-2
drivers/phy/ti/phy-am654-serdes.c
···
725
725
pm_runtime_enable(dev);
726
726
727
727
phy = devm_phy_create(dev, NULL, &ops);
728
-
if (IS_ERR(phy))
729
-
return PTR_ERR(phy);
728
+
if (IS_ERR(phy)) {
729
+
ret = PTR_ERR(phy);
730
+
goto clk_err;
731
+
}
730
732
731
733
phy_set_drvdata(phy, am654_phy);
732
734
phy_provider = devm_of_phy_provider_register(dev, serdes_am654_xlate);
+13
-1
drivers/pinctrl/intel/pinctrl-cherryview.c
+13
-1
drivers/pinctrl/intel/pinctrl-cherryview.c
···
58
58
#define CHV_PADCTRL1_CFGLOCK BIT(31)
59
59
#define CHV_PADCTRL1_INVRXTX_SHIFT 4
60
60
#define CHV_PADCTRL1_INVRXTX_MASK GENMASK(7, 4)
61
+
#define CHV_PADCTRL1_INVRXTX_TXDATA BIT(7)
61
62
#define CHV_PADCTRL1_INVRXTX_RXDATA BIT(6)
62
63
#define CHV_PADCTRL1_INVRXTX_TXENABLE BIT(5)
63
64
#define CHV_PADCTRL1_ODEN BIT(3)
···
793
792
static void chv_gpio_clear_triggering(struct chv_pinctrl *pctrl,
794
793
unsigned int offset)
795
794
{
795
+
u32 invrxtx_mask = CHV_PADCTRL1_INVRXTX_MASK;
796
796
u32 value;
797
+
798
+
/*
799
+
* One some devices the GPIO should output the inverted value from what
800
+
* device-drivers / ACPI code expects (inverted external buffer?). The
801
+
* BIOS makes this work by setting the CHV_PADCTRL1_INVRXTX_TXDATA flag,
802
+
* preserve this flag if the pin is already setup as GPIO.
803
+
*/
804
+
value = chv_readl(pctrl, offset, CHV_PADCTRL0);
805
+
if (value & CHV_PADCTRL0_GPIOEN)
806
+
invrxtx_mask &= ~CHV_PADCTRL1_INVRXTX_TXDATA;
797
807
798
808
value = chv_readl(pctrl, offset, CHV_PADCTRL1);
799
809
value &= ~CHV_PADCTRL1_INTWAKECFG_MASK;
800
-
value &= ~CHV_PADCTRL1_INVRXTX_MASK;
810
+
value &= ~invrxtx_mask;
801
811
chv_writel(pctrl, offset, CHV_PADCTRL1, value);
802
812
}
803
813
+4
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+4
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
···
259
259
260
260
desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio_n];
261
261
262
+
/* if the GPIO is not supported for eint mode */
263
+
if (desc->eint.eint_m == NO_EINT_SUPPORT)
264
+
return virt_gpio;
265
+
262
266
if (desc->funcs && !desc->funcs[desc->eint.eint_m].name)
263
267
virt_gpio = true;
264
268
+1
-1
drivers/pinctrl/mvebu/pinctrl-armada-xp.c
+1
-1
drivers/pinctrl/mvebu/pinctrl-armada-xp.c
···
414
414
MPP_VAR_FUNCTION(0x1, "i2c0", "sck", V_98DX3236_PLUS)),
415
415
MPP_MODE(15,
416
416
MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS),
417
-
MPP_VAR_FUNCTION(0x4, "i2c0", "sda", V_98DX3236_PLUS)),
417
+
MPP_VAR_FUNCTION(0x1, "i2c0", "sda", V_98DX3236_PLUS)),
418
418
MPP_MODE(16,
419
419
MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS),
420
420
MPP_VAR_FUNCTION(0x4, "dev", "oe", V_98DX3236_PLUS)),
+1
-1
drivers/pinctrl/qcom/pinctrl-sm8250.c
+1
-1
drivers/pinctrl/qcom/pinctrl-sm8250.c
···
1308
1308
[178] = PINGROUP(178, WEST, _, _, _, _, _, _, _, _, _),
1309
1309
[179] = PINGROUP(179, WEST, _, _, _, _, _, _, _, _, _),
1310
1310
[180] = UFS_RESET(ufs_reset, 0xb8000),
1311
-
[181] = SDC_PINGROUP(sdc2_clk, 0x7000, 14, 6),
1311
+
[181] = SDC_PINGROUP(sdc2_clk, 0xb7000, 14, 6),
1312
1312
[182] = SDC_PINGROUP(sdc2_cmd, 0xb7000, 11, 3),
1313
1313
[183] = SDC_PINGROUP(sdc2_data, 0xb7000, 9, 0),
1314
1314
};
+3
-1
drivers/platform/olpc/olpc-ec.c
+3
-1
drivers/platform/olpc/olpc-ec.c
···
439
439
&config);
440
440
if (IS_ERR(ec->dcon_rdev)) {
441
441
dev_err(&pdev->dev, "failed to register DCON regulator\n");
442
-
return PTR_ERR(ec->dcon_rdev);
442
+
err = PTR_ERR(ec->dcon_rdev);
443
+
kfree(ec);
444
+
return err;
443
445
}
444
446
445
447
ec->dbgfs_dir = olpc_ec_setup_debugfs();
+2
drivers/platform/x86/Kconfig
+2
drivers/platform/x86/Kconfig
···
469
469
depends on BACKLIGHT_CLASS_DEVICE
470
470
depends on ACPI_VIDEO || ACPI_VIDEO = n
471
471
select INPUT_SPARSEKMAP
472
+
select NEW_LEDS
472
473
select LEDS_CLASS
473
474
help
474
475
This is a driver for laptops built by Fujitsu:
···
1113
1112
depends on ACPI_WMI
1114
1113
depends on INPUT
1115
1114
select INPUT_SPARSEKMAP
1115
+
select NEW_LEDS
1116
1116
select LEDS_CLASS
1117
1117
help
1118
1118
This driver adds support for hotkeys as well as control of keyboard
-24
drivers/platform/x86/asus-nb-wmi.c
-24
drivers/platform/x86/asus-nb-wmi.c
···
593
593
.detect_quirks = asus_nb_wmi_quirks,
594
594
};
595
595
596
-
static const struct dmi_system_id asus_nb_wmi_blacklist[] __initconst = {
597
-
{
598
-
/*
599
-
* asus-nb-wm adds no functionality. The T100TA has a detachable
600
-
* USB kbd, so no hotkeys and it has no WMI rfkill; and loading
601
-
* asus-nb-wm causes the camera LED to turn and _stay_ on.
602
-
*/
603
-
.matches = {
604
-
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
605
-
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TA"),
606
-
},
607
-
},
608
-
{
609
-
/* The Asus T200TA has the same issue as the T100TA */
610
-
.matches = {
611
-
DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
612
-
DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T200TA"),
613
-
},
614
-
},
615
-
{} /* Terminating entry */
616
-
};
617
596
618
597
static int __init asus_nb_wmi_init(void)
619
598
{
620
-
if (dmi_check_system(asus_nb_wmi_blacklist))
621
-
return -ENODEV;
622
-
623
599
return asus_wmi_register_driver(&asus_nb_wmi_driver);
624
600
}
625
601
+1
drivers/platform/x86/asus-wmi.c
+1
drivers/platform/x86/asus-wmi.c
+43
-9
drivers/platform/x86/intel-vbtn.c
+43
-9
drivers/platform/x86/intel-vbtn.c
···
167
167
return ACPI_SUCCESS(status);
168
168
}
169
169
170
+
/*
171
+
* There are several laptops (non 2-in-1) models out there which support VGBS,
172
+
* but simply always return 0, which we translate to SW_TABLET_MODE=1. This in
173
+
* turn causes userspace (libinput) to suppress events from the builtin
174
+
* keyboard and touchpad, making the laptop essentially unusable.
175
+
*
176
+
* Since the problem of wrongly reporting SW_TABLET_MODE=1 in combination
177
+
* with libinput, leads to a non-usable system. Where as OTOH many people will
178
+
* not even notice when SW_TABLET_MODE is not being reported, a DMI based allow
179
+
* list is used here. This list mainly matches on the chassis-type of 2-in-1s.
180
+
*
181
+
* There are also some 2-in-1s which use the intel-vbtn ACPI interface to report
182
+
* SW_TABLET_MODE with a chassis-type of 8 ("Portable") or 10 ("Notebook"),
183
+
* these are matched on a per model basis, since many normal laptops with a
184
+
* possible broken VGBS ACPI-method also use these chassis-types.
185
+
*/
186
+
static const struct dmi_system_id dmi_switches_allow_list[] = {
187
+
{
188
+
.matches = {
189
+
DMI_EXACT_MATCH(DMI_CHASSIS_TYPE, "31" /* Convertible */),
190
+
},
191
+
},
192
+
{
193
+
.matches = {
194
+
DMI_EXACT_MATCH(DMI_CHASSIS_TYPE, "32" /* Detachable */),
195
+
},
196
+
},
197
+
{
198
+
.matches = {
199
+
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
200
+
DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7130"),
201
+
},
202
+
},
203
+
{
204
+
.matches = {
205
+
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
206
+
DMI_MATCH(DMI_PRODUCT_NAME, "HP Stream x360 Convertible PC 11"),
207
+
},
208
+
},
209
+
{} /* Array terminator */
210
+
};
211
+
170
212
static bool intel_vbtn_has_switches(acpi_handle handle)
171
213
{
172
-
const char *chassis_type = dmi_get_system_info(DMI_CHASSIS_TYPE);
173
214
unsigned long long vgbs;
174
215
acpi_status status;
175
216
176
-
/*
177
-
* Some normal laptops have a VGBS method despite being non-convertible
178
-
* and their VGBS method always returns 0, causing detect_tablet_mode()
179
-
* to report SW_TABLET_MODE=1 to userspace, which causes issues.
180
-
* These laptops have a DMI chassis_type of 9 ("Laptop"), do not report
181
-
* switches on any devices with a DMI chassis_type of 9.
182
-
*/
183
-
if (chassis_type && strcmp(chassis_type, "9") == 0)
217
+
if (!dmi_check_system(dmi_switches_allow_list))
184
218
return false;
185
219
186
220
status = acpi_evaluate_integer(handle, "VGBS", NULL, &vgbs);
+17
-9
drivers/platform/x86/intel_pmc_core_pltdrv.c
+17
-9
drivers/platform/x86/intel_pmc_core_pltdrv.c
···
20
20
21
21
static void intel_pmc_core_release(struct device *dev)
22
22
{
23
-
/* Nothing to do. */
23
+
kfree(dev);
24
24
}
25
25
26
-
static struct platform_device pmc_core_device = {
27
-
.name = "intel_pmc_core",
28
-
.dev = {
29
-
.release = intel_pmc_core_release,
30
-
},
31
-
};
26
+
static struct platform_device *pmc_core_device;
32
27
33
28
/*
34
29
* intel_pmc_core_platform_ids is the list of platforms where we want to
···
47
52
48
53
static int __init pmc_core_platform_init(void)
49
54
{
55
+
int retval;
56
+
50
57
/* Skip creating the platform device if ACPI already has a device */
51
58
if (acpi_dev_present("INT33A1", NULL, -1))
52
59
return -ENODEV;
···
56
59
if (!x86_match_cpu(intel_pmc_core_platform_ids))
57
60
return -ENODEV;
58
61
59
-
return platform_device_register(&pmc_core_device);
62
+
pmc_core_device = kzalloc(sizeof(*pmc_core_device), GFP_KERNEL);
63
+
if (!pmc_core_device)
64
+
return -ENOMEM;
65
+
66
+
pmc_core_device->name = "intel_pmc_core";
67
+
pmc_core_device->dev.release = intel_pmc_core_release;
68
+
69
+
retval = platform_device_register(pmc_core_device);
70
+
if (retval)
71
+
kfree(pmc_core_device);
72
+
73
+
return retval;
60
74
}
61
75
62
76
static void __exit pmc_core_platform_exit(void)
63
77
{
64
-
platform_device_unregister(&pmc_core_device);
78
+
platform_device_unregister(pmc_core_device);
65
79
}
66
80
67
81
module_init(pmc_core_platform_init);
+13
-5
drivers/platform/x86/mlx-platform.c
+13
-5
drivers/platform/x86/mlx-platform.c
···
171
171
#define MLXPLAT_CPLD_NR_NONE -1
172
172
#define MLXPLAT_CPLD_PSU_DEFAULT_NR 10
173
173
#define MLXPLAT_CPLD_PSU_MSNXXXX_NR 4
174
-
#define MLXPLAT_CPLD_PSU_MSNXXXX_NR2 3
175
174
#define MLXPLAT_CPLD_FAN1_DEFAULT_NR 11
176
175
#define MLXPLAT_CPLD_FAN2_DEFAULT_NR 12
177
176
#define MLXPLAT_CPLD_FAN3_DEFAULT_NR 13
···
343
344
},
344
345
{
345
346
I2C_BOARD_INFO("dps460", 0x58),
347
+
},
348
+
};
349
+
350
+
static struct i2c_board_info mlxplat_mlxcpld_ext_pwr[] = {
351
+
{
352
+
I2C_BOARD_INFO("dps460", 0x5b),
353
+
},
354
+
{
355
+
I2C_BOARD_INFO("dps460", 0x5a),
346
356
},
347
357
};
348
358
···
929
921
.label = "pwr3",
930
922
.reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
931
923
.mask = BIT(2),
932
-
.hpdev.brdinfo = &mlxplat_mlxcpld_pwr[0],
933
-
.hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR2,
924
+
.hpdev.brdinfo = &mlxplat_mlxcpld_ext_pwr[0],
925
+
.hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
934
926
},
935
927
{
936
928
.label = "pwr4",
937
929
.reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
938
930
.mask = BIT(3),
939
-
.hpdev.brdinfo = &mlxplat_mlxcpld_pwr[1],
940
-
.hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR2,
931
+
.hpdev.brdinfo = &mlxplat_mlxcpld_ext_pwr[1],
932
+
.hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
941
933
},
942
934
};
943
935
+1
-1
drivers/platform/x86/pcengines-apuv2.c
+1
-1
drivers/platform/x86/pcengines-apuv2.c
···
32
32
#define APU2_GPIO_REG_LED3 AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
33
33
#define APU2_GPIO_REG_MODESW AMD_FCH_GPIO_REG_GPIO32_GE1
34
34
#define APU2_GPIO_REG_SIMSWAP AMD_FCH_GPIO_REG_GPIO33_GE2
35
-
#define APU2_GPIO_REG_MPCIE2 AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
35
+
#define APU2_GPIO_REG_MPCIE2 AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
36
36
#define APU2_GPIO_REG_MPCIE3 AMD_FCH_GPIO_REG_GPIO51
37
37
38
38
/* Order in which the GPIO lines are defined in the register list */
+4
-2
drivers/platform/x86/thinkpad_acpi.c
+4
-2
drivers/platform/x86/thinkpad_acpi.c
···
2569
2569
*/
2570
2570
static int hotkey_kthread(void *data)
2571
2571
{
2572
-
struct tp_nvram_state s[2];
2572
+
struct tp_nvram_state s[2] = { 0 };
2573
2573
u32 poll_mask, event_mask;
2574
2574
unsigned int si, so;
2575
2575
unsigned long t;
···
6829
6829
list_for_each_entry(child, &device->children, node) {
6830
6830
acpi_status status = acpi_evaluate_object(child->handle, "_BCL",
6831
6831
NULL, &buffer);
6832
-
if (ACPI_FAILURE(status))
6832
+
if (ACPI_FAILURE(status)) {
6833
+
buffer.length = ACPI_ALLOCATE_BUFFER;
6833
6834
continue;
6835
+
}
6834
6836
6835
6837
obj = (union acpi_object *)buffer.pointer;
6836
6838
if (!obj || (obj->type != ACPI_TYPE_PACKAGE)) {
+25
drivers/platform/x86/touchscreen_dmi.c
+25
drivers/platform/x86/touchscreen_dmi.c
···
373
373
.properties = jumper_ezpad_mini3_props,
374
374
};
375
375
376
+
static const struct property_entry mpman_converter9_props[] = {
377
+
PROPERTY_ENTRY_U32("touchscreen-min-x", 8),
378
+
PROPERTY_ENTRY_U32("touchscreen-min-y", 8),
379
+
PROPERTY_ENTRY_U32("touchscreen-size-x", 1664),
380
+
PROPERTY_ENTRY_U32("touchscreen-size-y", 880),
381
+
PROPERTY_ENTRY_BOOL("touchscreen-inverted-y"),
382
+
PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"),
383
+
PROPERTY_ENTRY_STRING("firmware-name", "gsl1680-mpman-converter9.fw"),
384
+
PROPERTY_ENTRY_U32("silead,max-fingers", 10),
385
+
{ }
386
+
};
387
+
388
+
static const struct ts_dmi_data mpman_converter9_data = {
389
+
.acpi_name = "MSSL1680:00",
390
+
.properties = mpman_converter9_props,
391
+
};
392
+
376
393
static const struct property_entry mpman_mpwin895cl_props[] = {
377
394
PROPERTY_ENTRY_U32("touchscreen-min-x", 3),
378
395
PROPERTY_ENTRY_U32("touchscreen-min-y", 9),
···
991
974
.matches = {
992
975
DMI_MATCH(DMI_SYS_VENDOR, "MEDIACOM"),
993
976
DMI_MATCH(DMI_PRODUCT_NAME, "FlexBook edge11 - M-FBE11"),
977
+
},
978
+
},
979
+
{
980
+
/* MP Man Converter 9 */
981
+
.driver_data = (void *)&mpman_converter9_data,
982
+
.matches = {
983
+
DMI_MATCH(DMI_SYS_VENDOR, "MPMAN"),
984
+
DMI_MATCH(DMI_PRODUCT_NAME, "Converter9"),
994
985
},
995
986
},
996
987
{
+4
-3
drivers/regulator/axp20x-regulator.c
+4
-3
drivers/regulator/axp20x-regulator.c
···
42
42
43
43
#define AXP20X_DCDC2_V_OUT_MASK GENMASK(5, 0)
44
44
#define AXP20X_DCDC3_V_OUT_MASK GENMASK(7, 0)
45
-
#define AXP20X_LDO24_V_OUT_MASK GENMASK(7, 4)
45
+
#define AXP20X_LDO2_V_OUT_MASK GENMASK(7, 4)
46
46
#define AXP20X_LDO3_V_OUT_MASK GENMASK(6, 0)
47
+
#define AXP20X_LDO4_V_OUT_MASK GENMASK(3, 0)
47
48
#define AXP20X_LDO5_V_OUT_MASK GENMASK(7, 4)
48
49
49
50
#define AXP20X_PWR_OUT_EXTEN_MASK BIT_MASK(0)
···
543
542
AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_DCDC3_MASK),
544
543
AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300),
545
544
AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100,
546
-
AXP20X_LDO24_V_OUT, AXP20X_LDO24_V_OUT_MASK,
545
+
AXP20X_LDO24_V_OUT, AXP20X_LDO2_V_OUT_MASK,
547
546
AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO2_MASK),
548
547
AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25,
549
548
AXP20X_LDO3_V_OUT, AXP20X_LDO3_V_OUT_MASK,
550
549
AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO3_MASK),
551
550
AXP_DESC_RANGES(AXP20X, LDO4, "ldo4", "ldo24in",
552
551
axp20x_ldo4_ranges, AXP20X_LDO4_V_OUT_NUM_VOLTAGES,
553
-
AXP20X_LDO24_V_OUT, AXP20X_LDO24_V_OUT_MASK,
552
+
AXP20X_LDO24_V_OUT, AXP20X_LDO4_V_OUT_MASK,
554
553
AXP20X_PWR_OUT_CTRL, AXP20X_PWR_OUT_LDO4_MASK),
555
554
AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100,
556
555
AXP20X_LDO5_V_OUT, AXP20X_LDO5_V_OUT_MASK,
+2
-1
drivers/s390/crypto/zcrypt_api.c
+2
-1
drivers/s390/crypto/zcrypt_api.c
···
1449
1449
if (!reqcnt)
1450
1450
return -ENOMEM;
1451
1451
zcrypt_perdev_reqcnt(reqcnt, AP_DEVICES);
1452
-
if (copy_to_user((int __user *) arg, reqcnt, sizeof(reqcnt)))
1452
+
if (copy_to_user((int __user *) arg, reqcnt,
1453
+
sizeof(u32) * AP_DEVICES))
1453
1454
rc = -EFAULT;
1454
1455
kfree(reqcnt);
1455
1456
return rc;
+16
-8
drivers/scsi/iscsi_tcp.c
+16
-8
drivers/scsi/iscsi_tcp.c
···
736
736
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
737
737
struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data;
738
738
struct sockaddr_in6 addr;
739
+
struct socket *sock;
739
740
int rc;
740
741
741
742
switch(param) {
···
748
747
spin_unlock_bh(&conn->session->frwd_lock);
749
748
return -ENOTCONN;
750
749
}
750
+
sock = tcp_sw_conn->sock;
751
+
sock_hold(sock->sk);
752
+
spin_unlock_bh(&conn->session->frwd_lock);
753
+
751
754
if (param == ISCSI_PARAM_LOCAL_PORT)
752
-
rc = kernel_getsockname(tcp_sw_conn->sock,
755
+
rc = kernel_getsockname(sock,
753
756
(struct sockaddr *)&addr);
754
757
else
755
-
rc = kernel_getpeername(tcp_sw_conn->sock,
758
+
rc = kernel_getpeername(sock,
756
759
(struct sockaddr *)&addr);
757
-
spin_unlock_bh(&conn->session->frwd_lock);
760
+
sock_put(sock->sk);
758
761
if (rc < 0)
759
762
return rc;
760
763
···
780
775
struct iscsi_tcp_conn *tcp_conn;
781
776
struct iscsi_sw_tcp_conn *tcp_sw_conn;
782
777
struct sockaddr_in6 addr;
778
+
struct socket *sock;
783
779
int rc;
784
780
785
781
switch (param) {
···
795
789
return -ENOTCONN;
796
790
}
797
791
tcp_conn = conn->dd_data;
798
-
799
792
tcp_sw_conn = tcp_conn->dd_data;
800
-
if (!tcp_sw_conn->sock) {
793
+
sock = tcp_sw_conn->sock;
794
+
if (!sock) {
801
795
spin_unlock_bh(&session->frwd_lock);
802
796
return -ENOTCONN;
803
797
}
804
-
805
-
rc = kernel_getsockname(tcp_sw_conn->sock,
806
-
(struct sockaddr *)&addr);
798
+
sock_hold(sock->sk);
807
799
spin_unlock_bh(&session->frwd_lock);
800
+
801
+
rc = kernel_getsockname(sock,
802
+
(struct sockaddr *)&addr);
803
+
sock_put(sock->sk);
808
804
if (rc < 0)
809
805
return rc;
810
806
+1
-1
drivers/scsi/libiscsi_tcp.c
+1
-1
drivers/scsi/libiscsi_tcp.c
···
128
128
* coalescing neighboring slab objects into a single frag which
129
129
* triggers one of hardened usercopy checks.
130
130
*/
131
-
if (!recv && page_count(sg_page(sg)) >= 1 && !PageSlab(sg_page(sg)))
131
+
if (!recv && sendpage_ok(sg_page(sg)))
132
132
return;
133
133
134
134
if (recv) {
+52
-24
drivers/scsi/lpfc/lpfc_hbadisc.c
+52
-24
drivers/scsi/lpfc/lpfc_hbadisc.c
···
71
71
static void lpfc_disc_flush_list(struct lpfc_vport *vport);
72
72
static void lpfc_unregister_fcfi_cmpl(struct lpfc_hba *, LPFC_MBOXQ_t *);
73
73
static int lpfc_fcf_inuse(struct lpfc_hba *);
74
+
static void lpfc_mbx_cmpl_read_sparam(struct lpfc_hba *, LPFC_MBOXQ_t *);
74
75
75
76
void
76
77
lpfc_terminate_rport_io(struct fc_rport *rport)
···
1139
1138
return;
1140
1139
}
1141
1140
1142
-
1143
1141
void
1144
1142
lpfc_mbx_cmpl_local_config_link(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
1145
1143
{
1146
1144
struct lpfc_vport *vport = pmb->vport;
1145
+
LPFC_MBOXQ_t *sparam_mb;
1146
+
struct lpfc_dmabuf *sparam_mp;
1147
+
int rc;
1147
1148
1148
1149
if (pmb->u.mb.mbxStatus)
1149
1150
goto out;
···
1170
1167
}
1171
1168
1172
1169
/* Start discovery by sending a FLOGI. port_state is identically
1173
-
* LPFC_FLOGI while waiting for FLOGI cmpl. Check if sending
1174
-
* the FLOGI is being deferred till after MBX_READ_SPARAM completes.
1170
+
* LPFC_FLOGI while waiting for FLOGI cmpl.
1175
1171
*/
1176
1172
if (vport->port_state != LPFC_FLOGI) {
1177
-
if (!(phba->hba_flag & HBA_DEFER_FLOGI))
1173
+
/* Issue MBX_READ_SPARAM to update CSPs before FLOGI if
1174
+
* bb-credit recovery is in place.
1175
+
*/
1176
+
if (phba->bbcredit_support && phba->cfg_enable_bbcr &&
1177
+
!(phba->link_flag & LS_LOOPBACK_MODE)) {
1178
+
sparam_mb = mempool_alloc(phba->mbox_mem_pool,
1179
+
GFP_KERNEL);
1180
+
if (!sparam_mb)
1181
+
goto sparam_out;
1182
+
1183
+
rc = lpfc_read_sparam(phba, sparam_mb, 0);
1184
+
if (rc) {
1185
+
mempool_free(sparam_mb, phba->mbox_mem_pool);
1186
+
goto sparam_out;
1187
+
}
1188
+
sparam_mb->vport = vport;
1189
+
sparam_mb->mbox_cmpl = lpfc_mbx_cmpl_read_sparam;
1190
+
rc = lpfc_sli_issue_mbox(phba, sparam_mb, MBX_NOWAIT);
1191
+
if (rc == MBX_NOT_FINISHED) {
1192
+
sparam_mp = (struct lpfc_dmabuf *)
1193
+
sparam_mb->ctx_buf;
1194
+
lpfc_mbuf_free(phba, sparam_mp->virt,
1195
+
sparam_mp->phys);
1196
+
kfree(sparam_mp);
1197
+
sparam_mb->ctx_buf = NULL;
1198
+
mempool_free(sparam_mb, phba->mbox_mem_pool);
1199
+
goto sparam_out;
1200
+
}
1201
+
1202
+
phba->hba_flag |= HBA_DEFER_FLOGI;
1203
+
} else {
1178
1204
lpfc_initial_flogi(vport);
1205
+
}
1179
1206
} else {
1180
1207
if (vport->fc_flag & FC_PT2PT)
1181
1208
lpfc_disc_start(vport);
···
1217
1184
"0306 CONFIG_LINK mbxStatus error x%x "
1218
1185
"HBA state x%x\n",
1219
1186
pmb->u.mb.mbxStatus, vport->port_state);
1187
+
sparam_out:
1220
1188
mempool_free(pmb, phba->mbox_mem_pool);
1221
1189
1222
1190
lpfc_linkdown(phba);
···
3273
3239
lpfc_linkup(phba);
3274
3240
sparam_mbox = NULL;
3275
3241
3276
-
if (!(phba->hba_flag & HBA_FCOE_MODE)) {
3277
-
cfglink_mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
3278
-
if (!cfglink_mbox)
3279
-
goto out;
3280
-
vport->port_state = LPFC_LOCAL_CFG_LINK;
3281
-
lpfc_config_link(phba, cfglink_mbox);
3282
-
cfglink_mbox->vport = vport;
3283
-
cfglink_mbox->mbox_cmpl = lpfc_mbx_cmpl_local_config_link;
3284
-
rc = lpfc_sli_issue_mbox(phba, cfglink_mbox, MBX_NOWAIT);
3285
-
if (rc == MBX_NOT_FINISHED) {
3286
-
mempool_free(cfglink_mbox, phba->mbox_mem_pool);
3287
-
goto out;
3288
-
}
3289
-
}
3290
-
3291
3242
sparam_mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
3292
3243
if (!sparam_mbox)
3293
3244
goto out;
···
3293
3274
goto out;
3294
3275
}
3295
3276
3296
-
if (phba->hba_flag & HBA_FCOE_MODE) {
3277
+
if (!(phba->hba_flag & HBA_FCOE_MODE)) {
3278
+
cfglink_mbox = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
3279
+
if (!cfglink_mbox)
3280
+
goto out;
3281
+
vport->port_state = LPFC_LOCAL_CFG_LINK;
3282
+
lpfc_config_link(phba, cfglink_mbox);
3283
+
cfglink_mbox->vport = vport;
3284
+
cfglink_mbox->mbox_cmpl = lpfc_mbx_cmpl_local_config_link;
3285
+
rc = lpfc_sli_issue_mbox(phba, cfglink_mbox, MBX_NOWAIT);
3286
+
if (rc == MBX_NOT_FINISHED) {
3287
+
mempool_free(cfglink_mbox, phba->mbox_mem_pool);
3288
+
goto out;
3289
+
}
3290
+
} else {
3297
3291
vport->port_state = LPFC_VPORT_UNKNOWN;
3298
3292
/*
3299
3293
* Add the driver's default FCF record at FCF index 0 now. This
···
3363
3331
}
3364
3332
/* Reset FCF roundrobin bmask for new discovery */
3365
3333
lpfc_sli4_clear_fcf_rr_bmask(phba);
3366
-
} else {
3367
-
if (phba->bbcredit_support && phba->cfg_enable_bbcr &&
3368
-
!(phba->link_flag & LS_LOOPBACK_MODE))
3369
-
phba->hba_flag |= HBA_DEFER_FLOGI;
3370
3334
}
3371
3335
3372
3336
/* Prepare for LINK up registrations */
+18
-16
drivers/scsi/sd.c
+18
-16
drivers/scsi/sd.c
···
2964
2964
2965
2965
if (sdkp->device->type == TYPE_ZBC) {
2966
2966
/* Host-managed */
2967
-
q->limits.zoned = BLK_ZONED_HM;
2967
+
blk_queue_set_zoned(sdkp->disk, BLK_ZONED_HM);
2968
2968
} else {
2969
2969
sdkp->zoned = (buffer[8] >> 4) & 3;
2970
-
if (sdkp->zoned == 1 && !disk_has_partitions(sdkp->disk)) {
2970
+
if (sdkp->zoned == 1) {
2971
2971
/* Host-aware */
2972
-
q->limits.zoned = BLK_ZONED_HA;
2972
+
blk_queue_set_zoned(sdkp->disk, BLK_ZONED_HA);
2973
2973
} else {
2974
-
/*
2975
-
* Treat drive-managed devices and host-aware devices
2976
-
* with partitions as regular block devices.
2977
-
*/
2978
-
q->limits.zoned = BLK_ZONED_NONE;
2979
-
if (sdkp->zoned == 2 && sdkp->first_scan)
2980
-
sd_printk(KERN_NOTICE, sdkp,
2981
-
"Drive-managed SMR disk\n");
2974
+
/* Regular disk or drive managed disk */
2975
+
blk_queue_set_zoned(sdkp->disk, BLK_ZONED_NONE);
2982
2976
}
2983
2977
}
2984
-
if (blk_queue_is_zoned(q) && sdkp->first_scan)
2978
+
2979
+
if (!sdkp->first_scan)
2980
+
goto out;
2981
+
2982
+
if (blk_queue_is_zoned(q)) {
2985
2983
sd_printk(KERN_NOTICE, sdkp, "Host-%s zoned block device\n",
2986
2984
q->limits.zoned == BLK_ZONED_HM ? "managed" : "aware");
2985
+
} else {
2986
+
if (sdkp->zoned == 1)
2987
+
sd_printk(KERN_NOTICE, sdkp,
2988
+
"Host-aware SMR disk used as regular disk\n");
2989
+
else if (sdkp->zoned == 2)
2990
+
sd_printk(KERN_NOTICE, sdkp,
2991
+
"Drive-managed SMR disk\n");
2992
+
}
2987
2993
2988
2994
out:
2989
2995
kfree(buffer);
···
3409
3403
sdkp->ATO = 0;
3410
3404
sdkp->first_scan = 1;
3411
3405
sdkp->max_medium_access_timeouts = SD_MAX_MEDIUM_TIMEOUTS;
3412
-
3413
-
error = sd_zbc_init_disk(sdkp);
3414
-
if (error)
3415
-
goto out_free_index;
3416
3406
3417
3407
sd_revalidate_disk(gd);
3418
3408
+1
-7
drivers/scsi/sd.h
+1
-7
drivers/scsi/sd.h
···
215
215
216
216
#ifdef CONFIG_BLK_DEV_ZONED
217
217
218
-
int sd_zbc_init_disk(struct scsi_disk *sdkp);
219
218
void sd_zbc_release_disk(struct scsi_disk *sdkp);
220
219
int sd_zbc_read_zones(struct scsi_disk *sdkp, unsigned char *buffer);
221
220
int sd_zbc_revalidate_zones(struct scsi_disk *sdkp);
···
229
230
unsigned int nr_blocks);
230
231
231
232
#else /* CONFIG_BLK_DEV_ZONED */
232
-
233
-
static inline int sd_zbc_init_disk(struct scsi_disk *sdkp)
234
-
{
235
-
return 0;
236
-
}
237
233
238
234
static inline void sd_zbc_release_disk(struct scsi_disk *sdkp) {}
239
235
···
253
259
static inline unsigned int sd_zbc_complete(struct scsi_cmnd *cmd,
254
260
unsigned int good_bytes, struct scsi_sense_hdr *sshdr)
255
261
{
256
-
return 0;
262
+
return good_bytes;
257
263
}
258
264
259
265
static inline blk_status_t sd_zbc_prepare_zone_append(struct scsi_cmnd *cmd,
+40
-26
drivers/scsi/sd_zbc.c
+40
-26
drivers/scsi/sd_zbc.c
···
651
651
sdkp->zone_blocks);
652
652
}
653
653
654
+
static int sd_zbc_init_disk(struct scsi_disk *sdkp)
655
+
{
656
+
sdkp->zones_wp_offset = NULL;
657
+
spin_lock_init(&sdkp->zones_wp_offset_lock);
658
+
sdkp->rev_wp_offset = NULL;
659
+
mutex_init(&sdkp->rev_mutex);
660
+
INIT_WORK(&sdkp->zone_wp_offset_work, sd_zbc_update_wp_offset_workfn);
661
+
sdkp->zone_wp_update_buf = kzalloc(SD_BUF_SIZE, GFP_KERNEL);
662
+
if (!sdkp->zone_wp_update_buf)
663
+
return -ENOMEM;
664
+
665
+
return 0;
666
+
}
667
+
668
+
void sd_zbc_release_disk(struct scsi_disk *sdkp)
669
+
{
670
+
kvfree(sdkp->zones_wp_offset);
671
+
sdkp->zones_wp_offset = NULL;
672
+
kfree(sdkp->zone_wp_update_buf);
673
+
sdkp->zone_wp_update_buf = NULL;
674
+
}
675
+
654
676
static void sd_zbc_revalidate_zones_cb(struct gendisk *disk)
655
677
{
656
678
struct scsi_disk *sdkp = scsi_disk(disk);
···
689
667
u32 max_append;
690
668
int ret = 0;
691
669
692
-
if (!sd_is_zoned(sdkp))
670
+
/*
671
+
* For all zoned disks, initialize zone append emulation data if not
672
+
* already done. This is necessary also for host-aware disks used as
673
+
* regular disks due to the presence of partitions as these partitions
674
+
* may be deleted and the disk zoned model changed back from
675
+
* BLK_ZONED_NONE to BLK_ZONED_HA.
676
+
*/
677
+
if (sd_is_zoned(sdkp) && !sdkp->zone_wp_update_buf) {
678
+
ret = sd_zbc_init_disk(sdkp);
679
+
if (ret)
680
+
return ret;
681
+
}
682
+
683
+
/*
684
+
* There is nothing to do for regular disks, including host-aware disks
685
+
* that have partitions.
686
+
*/
687
+
if (!blk_queue_is_zoned(q))
693
688
return 0;
694
689
695
690
/*
···
802
763
sdkp->capacity = 0;
803
764
804
765
return ret;
805
-
}
806
-
807
-
int sd_zbc_init_disk(struct scsi_disk *sdkp)
808
-
{
809
-
if (!sd_is_zoned(sdkp))
810
-
return 0;
811
-
812
-
sdkp->zones_wp_offset = NULL;
813
-
spin_lock_init(&sdkp->zones_wp_offset_lock);
814
-
sdkp->rev_wp_offset = NULL;
815
-
mutex_init(&sdkp->rev_mutex);
816
-
INIT_WORK(&sdkp->zone_wp_offset_work, sd_zbc_update_wp_offset_workfn);
817
-
sdkp->zone_wp_update_buf = kzalloc(SD_BUF_SIZE, GFP_KERNEL);
818
-
if (!sdkp->zone_wp_update_buf)
819
-
return -ENOMEM;
820
-
821
-
return 0;
822
-
}
823
-
824
-
void sd_zbc_release_disk(struct scsi_disk *sdkp)
825
-
{
826
-
kvfree(sdkp->zones_wp_offset);
827
-
sdkp->zones_wp_offset = NULL;
828
-
kfree(sdkp->zone_wp_update_buf);
829
-
sdkp->zone_wp_update_buf = NULL;
830
766
}
+1
-1
drivers/spi/spi-bcm-qspi.c
+1
-1
drivers/spi/spi-bcm-qspi.c
+1
-1
drivers/spi/spi-bcm2835.c
+1
-1
drivers/spi/spi-bcm2835.c
···
75
75
#define DRV_NAME "spi-bcm2835"
76
76
77
77
/* define polling limits */
78
-
unsigned int polling_limit_us = 30;
78
+
static unsigned int polling_limit_us = 30;
79
79
module_param(polling_limit_us, uint, 0664);
80
80
MODULE_PARM_DESC(polling_limit_us,
81
81
"time in us to run a transfer in polling mode\n");
+10
-8
drivers/spi/spi-fsl-dspi.c
+10
-8
drivers/spi/spi-fsl-dspi.c
···
174
174
.fifo_size = 16,
175
175
},
176
176
[LS2080A] = {
177
-
.trans_mode = DSPI_DMA_MODE,
177
+
.trans_mode = DSPI_XSPI_MODE,
178
178
.max_clock_factor = 8,
179
179
.fifo_size = 4,
180
180
},
181
181
[LS2085A] = {
182
-
.trans_mode = DSPI_DMA_MODE,
182
+
.trans_mode = DSPI_XSPI_MODE,
183
183
.max_clock_factor = 8,
184
184
.fifo_size = 4,
185
185
},
186
186
[LX2160A] = {
187
-
.trans_mode = DSPI_DMA_MODE,
187
+
.trans_mode = DSPI_XSPI_MODE,
188
188
.max_clock_factor = 8,
189
189
.fifo_size = 4,
190
190
},
···
1273
1273
void __iomem *base;
1274
1274
bool big_endian;
1275
1275
1276
-
ctlr = spi_alloc_master(&pdev->dev, sizeof(struct fsl_dspi));
1276
+
dspi = devm_kzalloc(&pdev->dev, sizeof(*dspi), GFP_KERNEL);
1277
+
if (!dspi)
1278
+
return -ENOMEM;
1279
+
1280
+
ctlr = spi_alloc_master(&pdev->dev, 0);
1277
1281
if (!ctlr)
1278
1282
return -ENOMEM;
1279
1283
1280
-
dspi = spi_controller_get_devdata(ctlr);
1281
1284
dspi->pdev = pdev;
1282
1285
dspi->ctlr = ctlr;
1283
1286
···
1417
1414
if (dspi->devtype_data->trans_mode != DSPI_DMA_MODE)
1418
1415
ctlr->ptp_sts_supported = true;
1419
1416
1420
-
platform_set_drvdata(pdev, ctlr);
1417
+
platform_set_drvdata(pdev, dspi);
1421
1418
1422
1419
ret = spi_register_controller(ctlr);
1423
1420
if (ret != 0) {
···
1440
1437
1441
1438
static int dspi_remove(struct platform_device *pdev)
1442
1439
{
1443
-
struct spi_controller *ctlr = platform_get_drvdata(pdev);
1444
-
struct fsl_dspi *dspi = spi_controller_get_devdata(ctlr);
1440
+
struct fsl_dspi *dspi = platform_get_drvdata(pdev);
1445
1441
1446
1442
/* Disconnect from the SPI framework */
1447
1443
spi_unregister_controller(dspi->ctlr);
+3
-2
drivers/spi/spi-fsl-espi.c
+3
-2
drivers/spi/spi-fsl-espi.c
···
564
564
static irqreturn_t fsl_espi_irq(s32 irq, void *context_data)
565
565
{
566
566
struct fsl_espi *espi = context_data;
567
-
u32 events;
567
+
u32 events, mask;
568
568
569
569
spin_lock(&espi->lock);
570
570
571
571
/* Get interrupt events(tx/rx) */
572
572
events = fsl_espi_read_reg(espi, ESPI_SPIE);
573
-
if (!events) {
573
+
mask = fsl_espi_read_reg(espi, ESPI_SPIM);
574
+
if (!(events & mask)) {
574
575
spin_unlock(&espi->lock);
575
576
return IRQ_NONE;
576
577
}
+2
-1
drivers/target/target_core_transport.c
+2
-1
drivers/target/target_core_transport.c
···
1840
1840
* out unpacked_lun for the original se_cmd.
1841
1841
*/
1842
1842
if (tm_type == TMR_ABORT_TASK && (flags & TARGET_SCF_LOOKUP_LUN_FROM_TAG)) {
1843
-
if (!target_lookup_lun_from_tag(se_sess, tag, &unpacked_lun))
1843
+
if (!target_lookup_lun_from_tag(se_sess, tag,
1844
+
&se_cmd->orig_fe_lun))
1844
1845
goto failure;
1845
1846
}
1846
1847
+34
-16
drivers/usb/core/driver.c
+34
-16
drivers/usb/core/driver.c
···
269
269
if (error)
270
270
return error;
271
271
272
+
/* Probe the USB device with the driver in hand, but only
273
+
* defer to a generic driver in case the current USB
274
+
* device driver has an id_table or a match function; i.e.,
275
+
* when the device driver was explicitly matched against
276
+
* a device.
277
+
*
278
+
* If the device driver does not have either of these,
279
+
* then we assume that it can bind to any device and is
280
+
* not truly a more specialized/non-generic driver, so a
281
+
* return value of -ENODEV should not force the device
282
+
* to be handled by the generic USB driver, as there
283
+
* can still be another, more specialized, device driver.
284
+
*
285
+
* This accommodates the usbip driver.
286
+
*
287
+
* TODO: What if, in the future, there are multiple
288
+
* specialized USB device drivers for a particular device?
289
+
* In such cases, there is a need to try all matching
290
+
* specialised device drivers prior to setting the
291
+
* use_generic_driver bit.
292
+
*/
272
293
error = udriver->probe(udev);
273
-
if (error == -ENODEV && udriver != &usb_generic_driver) {
294
+
if (error == -ENODEV && udriver != &usb_generic_driver &&
295
+
(udriver->id_table || udriver->match)) {
274
296
udev->use_generic_driver = 1;
275
297
return -EPROBE_DEFER;
276
298
}
···
853
831
udev = to_usb_device(dev);
854
832
udrv = to_usb_device_driver(drv);
855
833
856
-
if (udrv->id_table &&
857
-
usb_device_match_id(udev, udrv->id_table) != NULL) {
858
-
return 1;
859
-
}
834
+
if (udrv->id_table)
835
+
return usb_device_match_id(udev, udrv->id_table) != NULL;
860
836
861
837
if (udrv->match)
862
838
return udrv->match(udev);
863
-
return 0;
839
+
840
+
/* If the device driver under consideration does not have a
841
+
* id_table or a match function, then let the driver's probe
842
+
* function decide.
843
+
*/
844
+
return 1;
864
845
865
846
} else if (is_usb_interface(dev)) {
866
847
struct usb_interface *intf;
···
930
905
return 0;
931
906
}
932
907
933
-
static bool is_dev_usb_generic_driver(struct device *dev)
934
-
{
935
-
struct usb_device_driver *udd = dev->driver ?
936
-
to_usb_device_driver(dev->driver) : NULL;
937
-
938
-
return udd == &usb_generic_driver;
939
-
}
940
-
941
908
static int __usb_bus_reprobe_drivers(struct device *dev, void *data)
942
909
{
943
910
struct usb_device_driver *new_udriver = data;
944
911
struct usb_device *udev;
945
912
int ret;
946
913
947
-
if (!is_dev_usb_generic_driver(dev))
914
+
/* Don't reprobe if current driver isn't usb_generic_driver */
915
+
if (dev->driver != &usb_generic_driver.drvwrap.driver)
948
916
return 0;
949
917
950
918
udev = to_usb_device(dev);
951
919
if (usb_device_match_id(udev, new_udriver->id_table) == NULL &&
952
-
(!new_udriver->match || new_udriver->match(udev) != 0))
920
+
(!new_udriver->match || new_udriver->match(udev) == 0))
953
921
return 0;
954
922
955
923
ret = device_reprobe(dev);
+2
-28
drivers/usb/gadget/function/f_ncm.c
+2
-28
drivers/usb/gadget/function/f_ncm.c
···
1189
1189
const struct ndp_parser_opts *opts = ncm->parser_opts;
1190
1190
unsigned crc_len = ncm->is_crc ? sizeof(uint32_t) : 0;
1191
1191
int dgram_counter;
1192
-
bool ndp_after_header;
1193
1192
1194
1193
/* dwSignature */
1195
1194
if (get_unaligned_le32(tmp) != opts->nth_sign) {
···
1215
1216
}
1216
1217
1217
1218
ndp_index = get_ncm(&tmp, opts->ndp_index);
1218
-
ndp_after_header = false;
1219
1219
1220
1220
/* Run through all the NDP's in the NTB */
1221
1221
do {
···
1230
1232
ndp_index);
1231
1233
goto err;
1232
1234
}
1233
-
if (ndp_index == opts->nth_size)
1234
-
ndp_after_header = true;
1235
1235
1236
1236
/*
1237
1237
* walk through NDP
···
1308
1312
index2 = get_ncm(&tmp, opts->dgram_item_len);
1309
1313
dg_len2 = get_ncm(&tmp, opts->dgram_item_len);
1310
1314
1311
-
if (index2 == 0 || dg_len2 == 0)
1312
-
break;
1313
-
1314
1315
/* wDatagramIndex[1] */
1315
-
if (ndp_after_header) {
1316
-
if (index2 < opts->nth_size + opts->ndp_size) {
1317
-
INFO(port->func.config->cdev,
1318
-
"Bad index: %#X\n", index2);
1319
-
goto err;
1320
-
}
1321
-
} else {
1322
-
if (index2 < opts->nth_size + opts->dpe_size) {
1323
-
INFO(port->func.config->cdev,
1324
-
"Bad index: %#X\n", index2);
1325
-
goto err;
1326
-
}
1327
-
}
1328
1316
if (index2 > block_len - opts->dpe_size) {
1329
1317
INFO(port->func.config->cdev,
1330
1318
"Bad index: %#X\n", index2);
1331
-
goto err;
1332
-
}
1333
-
1334
-
/* wDatagramLength[1] */
1335
-
if ((dg_len2 < 14 + crc_len) ||
1336
-
(dg_len2 > frame_max)) {
1337
-
INFO(port->func.config->cdev,
1338
-
"Bad dgram length: %#X\n", dg_len);
1339
1319
goto err;
1340
1320
}
1341
1321
···
1331
1359
ndp_len -= 2 * (opts->dgram_item_len * 2);
1332
1360
1333
1361
dgram_counter++;
1362
+
if (index2 == 0 || dg_len2 == 0)
1363
+
break;
1334
1364
} while (ndp_len > 2 * (opts->dgram_item_len * 2));
1335
1365
} while (ndp_index);
1336
1366
-6
drivers/usb/usbip/stub_dev.c
-6
drivers/usb/usbip/stub_dev.c
···
461
461
return;
462
462
}
463
463
464
-
static bool usbip_match(struct usb_device *udev)
465
-
{
466
-
return true;
467
-
}
468
-
469
464
#ifdef CONFIG_PM
470
465
471
466
/* These functions need usb_port_suspend and usb_port_resume,
···
486
491
.name = "usbip-host",
487
492
.probe = stub_probe,
488
493
.disconnect = stub_disconnect,
489
-
.match = usbip_match,
490
494
#ifdef CONFIG_PM
491
495
.suspend = stub_suspend,
492
496
.resume = stub_resume,
+2
-2
drivers/vhost/iotlb.c
+2
-2
drivers/vhost/iotlb.c
···
149
149
* vhost_iotlb_itree_first - return the first overlapped range
150
150
* @iotlb: the IOTLB
151
151
* @start: start of IOVA range
152
-
* @end: end of IOVA range
152
+
* @last: last byte in IOVA range
153
153
*/
154
154
struct vhost_iotlb_map *
155
155
vhost_iotlb_itree_first(struct vhost_iotlb *iotlb, u64 start, u64 last)
···
162
162
* vhost_iotlb_itree_next - return the next overlapped range
163
163
* @map: the starting map node
164
164
* @start: start of IOVA range
165
-
* @end: end of IOVA range
165
+
* @last: last byte IOVA range
166
166
*/
167
167
struct vhost_iotlb_map *
168
168
vhost_iotlb_itree_next(struct vhost_iotlb_map *map, u64 start, u64 last)
+16
-14
drivers/vhost/vdpa.c
+16
-14
drivers/vhost/vdpa.c
···
353
353
struct vdpa_callback cb;
354
354
struct vhost_virtqueue *vq;
355
355
struct vhost_vring_state s;
356
-
u64 __user *featurep = argp;
357
-
u64 features;
358
356
u32 idx;
359
357
long r;
360
358
···
379
381
380
382
vq->last_avail_idx = vq_state.avail_index;
381
383
break;
382
-
case VHOST_GET_BACKEND_FEATURES:
383
-
features = VHOST_VDPA_BACKEND_FEATURES;
384
-
if (copy_to_user(featurep, &features, sizeof(features)))
385
-
return -EFAULT;
386
-
return 0;
387
-
case VHOST_SET_BACKEND_FEATURES:
388
-
if (copy_from_user(&features, featurep, sizeof(features)))
389
-
return -EFAULT;
390
-
if (features & ~VHOST_VDPA_BACKEND_FEATURES)
391
-
return -EOPNOTSUPP;
392
-
vhost_set_backend_features(&v->vdev, features);
393
-
return 0;
394
384
}
395
385
396
386
r = vhost_vring_ioctl(&v->vdev, cmd, argp);
···
426
440
struct vhost_vdpa *v = filep->private_data;
427
441
struct vhost_dev *d = &v->vdev;
428
442
void __user *argp = (void __user *)arg;
443
+
u64 __user *featurep = argp;
444
+
u64 features;
429
445
long r;
446
+
447
+
if (cmd == VHOST_SET_BACKEND_FEATURES) {
448
+
r = copy_from_user(&features, featurep, sizeof(features));
449
+
if (r)
450
+
return r;
451
+
if (features & ~VHOST_VDPA_BACKEND_FEATURES)
452
+
return -EOPNOTSUPP;
453
+
vhost_set_backend_features(&v->vdev, features);
454
+
return 0;
455
+
}
430
456
431
457
mutex_lock(&d->mutex);
432
458
···
473
475
break;
474
476
case VHOST_VDPA_SET_CONFIG_CALL:
475
477
r = vhost_vdpa_set_config_call(v, argp);
478
+
break;
479
+
case VHOST_GET_BACKEND_FEATURES:
480
+
features = VHOST_VDPA_BACKEND_FEATURES;
481
+
r = copy_to_user(featurep, &features, sizeof(features));
476
482
break;
477
483
default:
478
484
r = vhost_dev_ioctl(&v->vdev, cmd, argp);
+21
-8
drivers/xen/events/events_base.c
+21
-8
drivers/xen/events/events_base.c
···
92
92
/* Xen will never allocate port zero for any purpose. */
93
93
#define VALID_EVTCHN(chn) ((chn) != 0)
94
94
95
+
static struct irq_info *legacy_info_ptrs[NR_IRQS_LEGACY];
96
+
95
97
static struct irq_chip xen_dynamic_chip;
96
98
static struct irq_chip xen_percpu_chip;
97
99
static struct irq_chip xen_pirq_chip;
···
158
156
/* Get info for IRQ */
159
157
struct irq_info *info_for_irq(unsigned irq)
160
158
{
161
-
return irq_get_chip_data(irq);
159
+
if (irq < nr_legacy_irqs())
160
+
return legacy_info_ptrs[irq];
161
+
else
162
+
return irq_get_chip_data(irq);
163
+
}
164
+
165
+
static void set_info_for_irq(unsigned int irq, struct irq_info *info)
166
+
{
167
+
if (irq < nr_legacy_irqs())
168
+
legacy_info_ptrs[irq] = info;
169
+
else
170
+
irq_set_chip_data(irq, info);
162
171
}
163
172
164
173
/* Constructors for packed IRQ information. */
···
390
377
info->type = IRQT_UNBOUND;
391
378
info->refcnt = -1;
392
379
393
-
irq_set_chip_data(irq, info);
380
+
set_info_for_irq(irq, info);
394
381
395
382
list_add_tail(&info->list, &xen_irq_list_head);
396
383
}
···
439
426
440
427
static void xen_free_irq(unsigned irq)
441
428
{
442
-
struct irq_info *info = irq_get_chip_data(irq);
429
+
struct irq_info *info = info_for_irq(irq);
443
430
444
431
if (WARN_ON(!info))
445
432
return;
446
433
447
434
list_del(&info->list);
448
435
449
-
irq_set_chip_data(irq, NULL);
436
+
set_info_for_irq(irq, NULL);
450
437
451
438
WARN_ON(info->refcnt > 0);
452
439
···
616
603
static void __unbind_from_irq(unsigned int irq)
617
604
{
618
605
evtchn_port_t evtchn = evtchn_from_irq(irq);
619
-
struct irq_info *info = irq_get_chip_data(irq);
606
+
struct irq_info *info = info_for_irq(irq);
620
607
621
608
if (info->refcnt > 0) {
622
609
info->refcnt--;
···
1121
1108
1122
1109
void unbind_from_irqhandler(unsigned int irq, void *dev_id)
1123
1110
{
1124
-
struct irq_info *info = irq_get_chip_data(irq);
1111
+
struct irq_info *info = info_for_irq(irq);
1125
1112
1126
1113
if (WARN_ON(!info))
1127
1114
return;
···
1155
1142
if (irq == -1)
1156
1143
return -ENOENT;
1157
1144
1158
-
info = irq_get_chip_data(irq);
1145
+
info = info_for_irq(irq);
1159
1146
1160
1147
if (!info)
1161
1148
return -ENOENT;
···
1183
1170
if (irq == -1)
1184
1171
goto done;
1185
1172
1186
-
info = irq_get_chip_data(irq);
1173
+
info = info_for_irq(irq);
1187
1174
1188
1175
if (!info)
1189
1176
goto done;
+1
-1
fs/autofs/waitq.c
+1
-1
fs/autofs/waitq.c
+44
-2
fs/btrfs/dev-replace.c
+44
-2
fs/btrfs/dev-replace.c
···
599
599
wake_up(&fs_info->dev_replace.replace_wait);
600
600
}
601
601
602
+
/*
603
+
* When finishing the device replace, before swapping the source device with the
604
+
* target device we must update the chunk allocation state in the target device,
605
+
* as it is empty because replace works by directly copying the chunks and not
606
+
* through the normal chunk allocation path.
607
+
*/
608
+
static int btrfs_set_target_alloc_state(struct btrfs_device *srcdev,
609
+
struct btrfs_device *tgtdev)
610
+
{
611
+
struct extent_state *cached_state = NULL;
612
+
u64 start = 0;
613
+
u64 found_start;
614
+
u64 found_end;
615
+
int ret = 0;
616
+
617
+
lockdep_assert_held(&srcdev->fs_info->chunk_mutex);
618
+
619
+
while (!find_first_extent_bit(&srcdev->alloc_state, start,
620
+
&found_start, &found_end,
621
+
CHUNK_ALLOCATED, &cached_state)) {
622
+
ret = set_extent_bits(&tgtdev->alloc_state, found_start,
623
+
found_end, CHUNK_ALLOCATED);
624
+
if (ret)
625
+
break;
626
+
start = found_end + 1;
627
+
}
628
+
629
+
free_extent_state(cached_state);
630
+
return ret;
631
+
}
632
+
602
633
static int btrfs_dev_replace_finishing(struct btrfs_fs_info *fs_info,
603
634
int scrub_ret)
604
635
{
···
704
673
dev_replace->time_stopped = ktime_get_real_seconds();
705
674
dev_replace->item_needs_writeback = 1;
706
675
707
-
/* replace old device with new one in mapping tree */
676
+
/*
677
+
* Update allocation state in the new device and replace the old device
678
+
* with the new one in the mapping tree.
679
+
*/
708
680
if (!scrub_ret) {
681
+
scrub_ret = btrfs_set_target_alloc_state(src_device, tgt_device);
682
+
if (scrub_ret)
683
+
goto error;
709
684
btrfs_dev_replace_update_device_in_mapping_tree(fs_info,
710
685
src_device,
711
686
tgt_device);
···
722
685
btrfs_dev_name(src_device),
723
686
src_device->devid,
724
687
rcu_str_deref(tgt_device->name), scrub_ret);
688
+
error:
725
689
up_write(&dev_replace->rwsem);
726
690
mutex_unlock(&fs_info->chunk_mutex);
727
691
mutex_unlock(&fs_info->fs_devices->device_list_mutex);
···
783
745
/* replace the sysfs entry */
784
746
btrfs_sysfs_remove_devices_dir(fs_info->fs_devices, src_device);
785
747
btrfs_sysfs_update_devid(tgt_device);
786
-
btrfs_rm_dev_replace_free_srcdev(src_device);
748
+
if (test_bit(BTRFS_DEV_STATE_WRITEABLE, &src_device->dev_state))
749
+
btrfs_scratch_superblocks(fs_info, src_device->bdev,
750
+
src_device->name->str);
787
751
788
752
/* write back the superblocks */
789
753
trans = btrfs_start_transaction(root, 0);
···
793
753
btrfs_commit_transaction(trans);
794
754
795
755
mutex_unlock(&dev_replace->lock_finishing_cancel_unmount);
756
+
757
+
btrfs_rm_dev_replace_free_srcdev(src_device);
796
758
797
759
return 0;
798
760
}
+5
-6
fs/btrfs/disk-io.c
+5
-6
fs/btrfs/disk-io.c
···
636
636
csum_tree_block(eb, result);
637
637
638
638
if (memcmp_extent_buffer(eb, result, 0, csum_size)) {
639
-
u32 val;
640
-
u32 found = 0;
641
-
642
-
memcpy(&found, result, csum_size);
639
+
u8 val[BTRFS_CSUM_SIZE] = { 0 };
643
640
644
641
read_extent_buffer(eb, &val, 0, csum_size);
645
642
btrfs_warn_rl(fs_info,
646
-
"%s checksum verify failed on %llu wanted %x found %x level %d",
643
+
"%s checksum verify failed on %llu wanted " CSUM_FMT " found " CSUM_FMT " level %d",
647
644
fs_info->sb->s_id, eb->start,
648
-
val, found, btrfs_header_level(eb));
645
+
CSUM_FMT_VALUE(csum_size, val),
646
+
CSUM_FMT_VALUE(csum_size, result),
647
+
btrfs_header_level(eb));
649
648
ret = -EUCLEAN;
650
649
goto err;
651
650
}
+10
-6
fs/btrfs/sysfs.c
+10
-6
fs/btrfs/sysfs.c
···
1170
1170
disk_kobj->name);
1171
1171
}
1172
1172
1173
-
kobject_del(&one_device->devid_kobj);
1174
-
kobject_put(&one_device->devid_kobj);
1173
+
if (one_device->devid_kobj.state_initialized) {
1174
+
kobject_del(&one_device->devid_kobj);
1175
+
kobject_put(&one_device->devid_kobj);
1175
1176
1176
-
wait_for_completion(&one_device->kobj_unregister);
1177
+
wait_for_completion(&one_device->kobj_unregister);
1178
+
}
1177
1179
1178
1180
return 0;
1179
1181
}
···
1188
1186
sysfs_remove_link(fs_devices->devices_kobj,
1189
1187
disk_kobj->name);
1190
1188
}
1191
-
kobject_del(&one_device->devid_kobj);
1192
-
kobject_put(&one_device->devid_kobj);
1189
+
if (one_device->devid_kobj.state_initialized) {
1190
+
kobject_del(&one_device->devid_kobj);
1191
+
kobject_put(&one_device->devid_kobj);
1193
1192
1194
-
wait_for_completion(&one_device->kobj_unregister);
1193
+
wait_for_completion(&one_device->kobj_unregister);
1194
+
}
1195
1195
}
1196
1196
1197
1197
return 0;
+5
-8
fs/btrfs/volumes.c
+5
-8
fs/btrfs/volumes.c
···
1999
1999
return num_devices;
2000
2000
}
2001
2001
2002
-
static void btrfs_scratch_superblocks(struct btrfs_fs_info *fs_info,
2003
-
struct block_device *bdev,
2004
-
const char *device_path)
2002
+
void btrfs_scratch_superblocks(struct btrfs_fs_info *fs_info,
2003
+
struct block_device *bdev,
2004
+
const char *device_path)
2005
2005
{
2006
2006
struct btrfs_super_block *disk_super;
2007
2007
int copy_num;
···
2224
2224
struct btrfs_fs_info *fs_info = srcdev->fs_info;
2225
2225
struct btrfs_fs_devices *fs_devices = srcdev->fs_devices;
2226
2226
2227
-
if (test_bit(BTRFS_DEV_STATE_WRITEABLE, &srcdev->dev_state)) {
2228
-
/* zero out the old super if it is writable */
2229
-
btrfs_scratch_superblocks(fs_info, srcdev->bdev,
2230
-
srcdev->name->str);
2231
-
}
2227
+
mutex_lock(&uuid_mutex);
2232
2228
2233
2229
btrfs_close_bdev(srcdev);
2234
2230
synchronize_rcu();
···
2254
2258
close_fs_devices(fs_devices);
2255
2259
free_fs_devices(fs_devices);
2256
2260
}
2261
+
mutex_unlock(&uuid_mutex);
2257
2262
}
2258
2263
2259
2264
void btrfs_destroy_dev_replace_tgtdev(struct btrfs_device *tgtdev)
+3
fs/btrfs/volumes.h
+3
fs/btrfs/volumes.h
···
573
573
void btrfs_reset_fs_info_ptr(struct btrfs_fs_info *fs_info);
574
574
bool btrfs_check_rw_degradable(struct btrfs_fs_info *fs_info,
575
575
struct btrfs_device *failing_dev);
576
+
void btrfs_scratch_superblocks(struct btrfs_fs_info *fs_info,
577
+
struct block_device *bdev,
578
+
const char *device_path);
576
579
577
580
int btrfs_bg_type_to_factor(u64 flags);
578
581
const char *btrfs_bg_type_to_raid_name(u64 flags);
+31
-41
fs/eventpoll.c
+31
-41
fs/eventpoll.c
···
218
218
struct file *file;
219
219
220
220
/* used to optimize loop detection check */
221
-
struct list_head visited_list_link;
222
-
int visited;
221
+
u64 gen;
223
222
224
223
#ifdef CONFIG_NET_RX_BUSY_POLL
225
224
/* used to track busy poll napi_id */
···
273
274
*/
274
275
static DEFINE_MUTEX(epmutex);
275
276
277
+
static u64 loop_check_gen = 0;
278
+
276
279
/* Used to check for epoll file descriptor inclusion loops */
277
280
static struct nested_calls poll_loop_ncalls;
278
281
···
283
282
284
283
/* Slab cache used to allocate "struct eppoll_entry" */
285
284
static struct kmem_cache *pwq_cache __read_mostly;
286
-
287
-
/* Visited nodes during ep_loop_check(), so we can unset them when we finish */
288
-
static LIST_HEAD(visited_list);
289
285
290
286
/*
291
287
* List of files with newly added links, where we may need to limit the number
···
1448
1450
1449
1451
static int ep_create_wakeup_source(struct epitem *epi)
1450
1452
{
1451
-
const char *name;
1453
+
struct name_snapshot n;
1452
1454
struct wakeup_source *ws;
1453
1455
1454
1456
if (!epi->ep->ws) {
···
1457
1459
return -ENOMEM;
1458
1460
}
1459
1461
1460
-
name = epi->ffd.file->f_path.dentry->d_name.name;
1461
-
ws = wakeup_source_register(NULL, name);
1462
+
take_dentry_name_snapshot(&n, epi->ffd.file->f_path.dentry);
1463
+
ws = wakeup_source_register(NULL, n.name.name);
1464
+
release_dentry_name_snapshot(&n);
1462
1465
1463
1466
if (!ws)
1464
1467
return -ENOMEM;
···
1521
1522
RCU_INIT_POINTER(epi->ws, NULL);
1522
1523
}
1523
1524
1525
+
/* Add the current item to the list of active epoll hook for this file */
1526
+
spin_lock(&tfile->f_lock);
1527
+
list_add_tail_rcu(&epi->fllink, &tfile->f_ep_links);
1528
+
spin_unlock(&tfile->f_lock);
1529
+
1530
+
/*
1531
+
* Add the current item to the RB tree. All RB tree operations are
1532
+
* protected by "mtx", and ep_insert() is called with "mtx" held.
1533
+
*/
1534
+
ep_rbtree_insert(ep, epi);
1535
+
1536
+
/* now check if we've created too many backpaths */
1537
+
error = -EINVAL;
1538
+
if (full_check && reverse_path_check())
1539
+
goto error_remove_epi;
1540
+
1524
1541
/* Initialize the poll table using the queue callback */
1525
1542
epq.epi = epi;
1526
1543
init_poll_funcptr(&epq.pt, ep_ptable_queue_proc);
···
1558
1543
error = -ENOMEM;
1559
1544
if (epi->nwait < 0)
1560
1545
goto error_unregister;
1561
-
1562
-
/* Add the current item to the list of active epoll hook for this file */
1563
-
spin_lock(&tfile->f_lock);
1564
-
list_add_tail_rcu(&epi->fllink, &tfile->f_ep_links);
1565
-
spin_unlock(&tfile->f_lock);
1566
-
1567
-
/*
1568
-
* Add the current item to the RB tree. All RB tree operations are
1569
-
* protected by "mtx", and ep_insert() is called with "mtx" held.
1570
-
*/
1571
-
ep_rbtree_insert(ep, epi);
1572
-
1573
-
/* now check if we've created too many backpaths */
1574
-
error = -EINVAL;
1575
-
if (full_check && reverse_path_check())
1576
-
goto error_remove_epi;
1577
1546
1578
1547
/* We have to drop the new item inside our item list to keep track of it */
1579
1548
write_lock_irq(&ep->lock);
···
1587
1588
1588
1589
return 0;
1589
1590
1591
+
error_unregister:
1592
+
ep_unregister_pollwait(ep, epi);
1590
1593
error_remove_epi:
1591
1594
spin_lock(&tfile->f_lock);
1592
1595
list_del_rcu(&epi->fllink);
1593
1596
spin_unlock(&tfile->f_lock);
1594
1597
1595
1598
rb_erase_cached(&epi->rbn, &ep->rbr);
1596
-
1597
-
error_unregister:
1598
-
ep_unregister_pollwait(ep, epi);
1599
1599
1600
1600
/*
1601
1601
* We need to do this because an event could have been arrived on some
···
1970
1972
struct epitem *epi;
1971
1973
1972
1974
mutex_lock_nested(&ep->mtx, call_nests + 1);
1973
-
ep->visited = 1;
1974
-
list_add(&ep->visited_list_link, &visited_list);
1975
+
ep->gen = loop_check_gen;
1975
1976
for (rbp = rb_first_cached(&ep->rbr); rbp; rbp = rb_next(rbp)) {
1976
1977
epi = rb_entry(rbp, struct epitem, rbn);
1977
1978
if (unlikely(is_file_epoll(epi->ffd.file))) {
1978
1979
ep_tovisit = epi->ffd.file->private_data;
1979
-
if (ep_tovisit->visited)
1980
+
if (ep_tovisit->gen == loop_check_gen)
1980
1981
continue;
1981
1982
error = ep_call_nested(&poll_loop_ncalls,
1982
1983
ep_loop_check_proc, epi->ffd.file,
···
2016
2019
*/
2017
2020
static int ep_loop_check(struct eventpoll *ep, struct file *file)
2018
2021
{
2019
-
int ret;
2020
-
struct eventpoll *ep_cur, *ep_next;
2021
-
2022
-
ret = ep_call_nested(&poll_loop_ncalls,
2022
+
return ep_call_nested(&poll_loop_ncalls,
2023
2023
ep_loop_check_proc, file, ep, current);
2024
-
/* clear visited list */
2025
-
list_for_each_entry_safe(ep_cur, ep_next, &visited_list,
2026
-
visited_list_link) {
2027
-
ep_cur->visited = 0;
2028
-
list_del(&ep_cur->visited_list_link);
2029
-
}
2030
-
return ret;
2031
2024
}
2032
2025
2033
2026
static void clear_tfile_check_list(void)
···
2182
2195
goto error_tgt_fput;
2183
2196
if (op == EPOLL_CTL_ADD) {
2184
2197
if (!list_empty(&f.file->f_ep_links) ||
2198
+
ep->gen == loop_check_gen ||
2185
2199
is_file_epoll(tf.file)) {
2186
2200
mutex_unlock(&ep->mtx);
2187
2201
error = epoll_mutex_lock(&epmutex, 0, nonblock);
2188
2202
if (error)
2189
2203
goto error_tgt_fput;
2204
+
loop_check_gen++;
2190
2205
full_check = 1;
2191
2206
if (is_file_epoll(tf.file)) {
2192
2207
error = -ELOOP;
···
2252
2263
error_tgt_fput:
2253
2264
if (full_check) {
2254
2265
clear_tfile_check_list();
2266
+
loop_check_gen++;
2255
2267
mutex_unlock(&epmutex);
2256
2268
}
2257
2269
+25
-12
fs/io_uring.c
+25
-12
fs/io_uring.c
···
3049
3049
if (!wake_page_match(wpq, key))
3050
3050
return 0;
3051
3051
3052
+
req->rw.kiocb.ki_flags &= ~IOCB_WAITQ;
3052
3053
list_del_init(&wait->entry);
3053
3054
3054
3055
init_task_work(&req->task_work, io_req_task_submit);
···
3107
3106
wait->wait.flags = 0;
3108
3107
INIT_LIST_HEAD(&wait->wait.entry);
3109
3108
kiocb->ki_flags |= IOCB_WAITQ;
3109
+
kiocb->ki_flags &= ~IOCB_NOWAIT;
3110
3110
kiocb->ki_waitq = wait;
3111
3111
3112
3112
io_get_req_task(req);
···
3174
3172
goto done;
3175
3173
/* some cases will consume bytes even on error returns */
3176
3174
iov_iter_revert(iter, iov_count - iov_iter_count(iter));
3177
-
ret = io_setup_async_rw(req, iovec, inline_vecs, iter, false);
3178
-
if (ret)
3179
-
goto out_free;
3180
-
return -EAGAIN;
3175
+
ret = 0;
3176
+
goto copy_iov;
3181
3177
} else if (ret < 0) {
3182
3178
/* make sure -ERESTARTSYS -> -EINTR is done */
3183
3179
goto done;
···
4745
4745
if (mask && !(mask & poll->events))
4746
4746
return 0;
4747
4747
4748
+
list_del_init(&wait->entry);
4749
+
4748
4750
if (poll && poll->head) {
4749
4751
bool done;
4750
4752
···
5679
5677
io_put_file(req, req->splice.file_in,
5680
5678
(req->splice.flags & SPLICE_F_FD_IN_FIXED));
5681
5679
break;
5680
+
case IORING_OP_OPENAT:
5681
+
case IORING_OP_OPENAT2:
5682
+
if (req->open.filename)
5683
+
putname(req->open.filename);
5684
+
break;
5682
5685
}
5683
5686
req->flags &= ~REQ_F_NEED_CLEANUP;
5684
5687
}
···
6361
6354
struct io_ring_ctx *ctx, unsigned int max_ios)
6362
6355
{
6363
6356
blk_start_plug(&state->plug);
6364
-
#ifdef CONFIG_BLOCK
6365
-
state->plug.nowait = true;
6366
-
#endif
6367
6357
state->comp.nr = 0;
6368
6358
INIT_LIST_HEAD(&state->comp.list);
6369
6359
state->comp.ctx = ctx;
···
8422
8418
8423
8419
static void __io_uring_show_fdinfo(struct io_ring_ctx *ctx, struct seq_file *m)
8424
8420
{
8421
+
bool has_lock;
8425
8422
int i;
8426
8423
8427
-
mutex_lock(&ctx->uring_lock);
8424
+
/*
8425
+
* Avoid ABBA deadlock between the seq lock and the io_uring mutex,
8426
+
* since fdinfo case grabs it in the opposite direction of normal use
8427
+
* cases. If we fail to get the lock, we just don't iterate any
8428
+
* structures that could be going away outside the io_uring mutex.
8429
+
*/
8430
+
has_lock = mutex_trylock(&ctx->uring_lock);
8431
+
8428
8432
seq_printf(m, "UserFiles:\t%u\n", ctx->nr_user_files);
8429
-
for (i = 0; i < ctx->nr_user_files; i++) {
8433
+
for (i = 0; has_lock && i < ctx->nr_user_files; i++) {
8430
8434
struct fixed_file_table *table;
8431
8435
struct file *f;
8432
8436
···
8446
8434
seq_printf(m, "%5u: <none>\n", i);
8447
8435
}
8448
8436
seq_printf(m, "UserBufs:\t%u\n", ctx->nr_user_bufs);
8449
-
for (i = 0; i < ctx->nr_user_bufs; i++) {
8437
+
for (i = 0; has_lock && i < ctx->nr_user_bufs; i++) {
8450
8438
struct io_mapped_ubuf *buf = &ctx->user_bufs[i];
8451
8439
8452
8440
seq_printf(m, "%5u: 0x%llx/%u\n", i, buf->ubuf,
8453
8441
(unsigned int) buf->len);
8454
8442
}
8455
-
if (!idr_is_empty(&ctx->personality_idr)) {
8443
+
if (has_lock && !idr_is_empty(&ctx->personality_idr)) {
8456
8444
seq_printf(m, "Personalities:\n");
8457
8445
idr_for_each(&ctx->personality_idr, io_uring_show_cred, m);
8458
8446
}
···
8467
8455
req->task->task_works != NULL);
8468
8456
}
8469
8457
spin_unlock_irq(&ctx->completion_lock);
8470
-
mutex_unlock(&ctx->uring_lock);
8458
+
if (has_lock)
8459
+
mutex_unlock(&ctx->uring_lock);
8471
8460
}
8472
8461
8473
8462
static void io_uring_show_fdinfo(struct seq_file *m, struct file *f)
+3
fs/nfs/dir.c
+3
fs/nfs/dir.c
+22
-21
fs/nfs/flexfilelayout/flexfilelayout.c
+22
-21
fs/nfs/flexfilelayout/flexfilelayout.c
···
715
715
}
716
716
717
717
static void
718
-
ff_layout_mark_ds_unreachable(struct pnfs_layout_segment *lseg, int idx)
718
+
ff_layout_mark_ds_unreachable(struct pnfs_layout_segment *lseg, u32 idx)
719
719
{
720
720
struct nfs4_deviceid_node *devid = FF_LAYOUT_DEVID_NODE(lseg, idx);
721
721
···
724
724
}
725
725
726
726
static void
727
-
ff_layout_mark_ds_reachable(struct pnfs_layout_segment *lseg, int idx)
727
+
ff_layout_mark_ds_reachable(struct pnfs_layout_segment *lseg, u32 idx)
728
728
{
729
729
struct nfs4_deviceid_node *devid = FF_LAYOUT_DEVID_NODE(lseg, idx);
730
730
···
734
734
735
735
static struct nfs4_pnfs_ds *
736
736
ff_layout_choose_ds_for_read(struct pnfs_layout_segment *lseg,
737
-
int start_idx, int *best_idx,
737
+
u32 start_idx, u32 *best_idx,
738
738
bool check_device)
739
739
{
740
740
struct nfs4_ff_layout_segment *fls = FF_LAYOUT_LSEG(lseg);
741
741
struct nfs4_ff_layout_mirror *mirror;
742
742
struct nfs4_pnfs_ds *ds;
743
743
bool fail_return = false;
744
-
int idx;
744
+
u32 idx;
745
745
746
746
/* mirrors are initially sorted by efficiency */
747
747
for (idx = start_idx; idx < fls->mirror_array_cnt; idx++) {
···
766
766
767
767
static struct nfs4_pnfs_ds *
768
768
ff_layout_choose_any_ds_for_read(struct pnfs_layout_segment *lseg,
769
-
int start_idx, int *best_idx)
769
+
u32 start_idx, u32 *best_idx)
770
770
{
771
771
return ff_layout_choose_ds_for_read(lseg, start_idx, best_idx, false);
772
772
}
773
773
774
774
static struct nfs4_pnfs_ds *
775
775
ff_layout_choose_valid_ds_for_read(struct pnfs_layout_segment *lseg,
776
-
int start_idx, int *best_idx)
776
+
u32 start_idx, u32 *best_idx)
777
777
{
778
778
return ff_layout_choose_ds_for_read(lseg, start_idx, best_idx, true);
779
779
}
780
780
781
781
static struct nfs4_pnfs_ds *
782
782
ff_layout_choose_best_ds_for_read(struct pnfs_layout_segment *lseg,
783
-
int start_idx, int *best_idx)
783
+
u32 start_idx, u32 *best_idx)
784
784
{
785
785
struct nfs4_pnfs_ds *ds;
786
786
···
791
791
}
792
792
793
793
static struct nfs4_pnfs_ds *
794
-
ff_layout_get_ds_for_read(struct nfs_pageio_descriptor *pgio, int *best_idx)
794
+
ff_layout_get_ds_for_read(struct nfs_pageio_descriptor *pgio,
795
+
u32 *best_idx)
795
796
{
796
797
struct pnfs_layout_segment *lseg = pgio->pg_lseg;
797
798
struct nfs4_pnfs_ds *ds;
···
838
837
struct nfs_pgio_mirror *pgm;
839
838
struct nfs4_ff_layout_mirror *mirror;
840
839
struct nfs4_pnfs_ds *ds;
841
-
int ds_idx;
840
+
u32 ds_idx, i;
842
841
843
842
retry:
844
843
ff_layout_pg_check_layout(pgio, req);
···
864
863
goto retry;
865
864
}
866
865
867
-
mirror = FF_LAYOUT_COMP(pgio->pg_lseg, ds_idx);
866
+
for (i = 0; i < pgio->pg_mirror_count; i++) {
867
+
mirror = FF_LAYOUT_COMP(pgio->pg_lseg, i);
868
+
pgm = &pgio->pg_mirrors[i];
869
+
pgm->pg_bsize = mirror->mirror_ds->ds_versions[0].rsize;
870
+
}
868
871
869
872
pgio->pg_mirror_idx = ds_idx;
870
-
871
-
/* read always uses only one mirror - idx 0 for pgio layer */
872
-
pgm = &pgio->pg_mirrors[0];
873
-
pgm->pg_bsize = mirror->mirror_ds->ds_versions[0].rsize;
874
873
875
874
if (NFS_SERVER(pgio->pg_inode)->flags &
876
875
(NFS_MOUNT_SOFT|NFS_MOUNT_SOFTERR))
···
895
894
struct nfs4_ff_layout_mirror *mirror;
896
895
struct nfs_pgio_mirror *pgm;
897
896
struct nfs4_pnfs_ds *ds;
898
-
int i;
897
+
u32 i;
899
898
900
899
retry:
901
900
ff_layout_pg_check_layout(pgio, req);
···
1039
1038
static void ff_layout_resend_pnfs_read(struct nfs_pgio_header *hdr)
1040
1039
{
1041
1040
u32 idx = hdr->pgio_mirror_idx + 1;
1042
-
int new_idx = 0;
1041
+
u32 new_idx = 0;
1043
1042
1044
1043
if (ff_layout_choose_any_ds_for_read(hdr->lseg, idx + 1, &new_idx))
1045
1044
ff_layout_send_layouterror(hdr->lseg);
···
1076
1075
struct nfs4_state *state,
1077
1076
struct nfs_client *clp,
1078
1077
struct pnfs_layout_segment *lseg,
1079
-
int idx)
1078
+
u32 idx)
1080
1079
{
1081
1080
struct pnfs_layout_hdr *lo = lseg->pls_layout;
1082
1081
struct inode *inode = lo->plh_inode;
···
1150
1149
/* Retry all errors through either pNFS or MDS except for -EJUKEBOX */
1151
1150
static int ff_layout_async_handle_error_v3(struct rpc_task *task,
1152
1151
struct pnfs_layout_segment *lseg,
1153
-
int idx)
1152
+
u32 idx)
1154
1153
{
1155
1154
struct nfs4_deviceid_node *devid = FF_LAYOUT_DEVID_NODE(lseg, idx);
1156
1155
···
1185
1184
struct nfs4_state *state,
1186
1185
struct nfs_client *clp,
1187
1186
struct pnfs_layout_segment *lseg,
1188
-
int idx)
1187
+
u32 idx)
1189
1188
{
1190
1189
int vers = clp->cl_nfs_mod->rpc_vers->number;
1191
1190
···
1212
1211
}
1213
1212
1214
1213
static void ff_layout_io_track_ds_error(struct pnfs_layout_segment *lseg,
1215
-
int idx, u64 offset, u64 length,
1214
+
u32 idx, u64 offset, u64 length,
1216
1215
u32 *op_status, int opnum, int error)
1217
1216
{
1218
1217
struct nfs4_ff_layout_mirror *mirror;
···
1810
1809
loff_t offset = hdr->args.offset;
1811
1810
int vers;
1812
1811
struct nfs_fh *fh;
1813
-
int idx = hdr->pgio_mirror_idx;
1812
+
u32 idx = hdr->pgio_mirror_idx;
1814
1813
1815
1814
mirror = FF_LAYOUT_COMP(lseg, idx);
1816
1815
ds = nfs4_ff_layout_prepare_ds(lseg, mirror, true);
+9
-1
fs/nfs/nfs42proc.c
+9
-1
fs/nfs/nfs42proc.c
···
356
356
357
357
truncate_pagecache_range(dst_inode, pos_dst,
358
358
pos_dst + res->write_res.count);
359
-
359
+
spin_lock(&dst_inode->i_lock);
360
+
NFS_I(dst_inode)->cache_validity |= (NFS_INO_REVAL_PAGECACHE |
361
+
NFS_INO_REVAL_FORCED | NFS_INO_INVALID_SIZE |
362
+
NFS_INO_INVALID_ATTR | NFS_INO_INVALID_DATA);
363
+
spin_unlock(&dst_inode->i_lock);
364
+
spin_lock(&src_inode->i_lock);
365
+
NFS_I(src_inode)->cache_validity |= (NFS_INO_REVAL_PAGECACHE |
366
+
NFS_INO_REVAL_FORCED | NFS_INO_INVALID_ATIME);
367
+
spin_unlock(&src_inode->i_lock);
360
368
status = res->write_res.count;
361
369
out:
362
370
if (args->sync)
+41
-21
fs/pipe.c
+41
-21
fs/pipe.c
···
106
106
}
107
107
}
108
108
109
-
/* Drop the inode semaphore and wait for a pipe event, atomically */
110
-
void pipe_wait(struct pipe_inode_info *pipe)
111
-
{
112
-
DEFINE_WAIT(rdwait);
113
-
DEFINE_WAIT(wrwait);
114
-
115
-
/*
116
-
* Pipes are system-local resources, so sleeping on them
117
-
* is considered a noninteractive wait:
118
-
*/
119
-
prepare_to_wait(&pipe->rd_wait, &rdwait, TASK_INTERRUPTIBLE);
120
-
prepare_to_wait(&pipe->wr_wait, &wrwait, TASK_INTERRUPTIBLE);
121
-
pipe_unlock(pipe);
122
-
schedule();
123
-
finish_wait(&pipe->rd_wait, &rdwait);
124
-
finish_wait(&pipe->wr_wait, &wrwait);
125
-
pipe_lock(pipe);
126
-
}
127
-
128
109
static void anon_pipe_buf_release(struct pipe_inode_info *pipe,
129
110
struct pipe_buffer *buf)
130
111
{
···
1016
1035
return do_pipe2(fildes, 0);
1017
1036
}
1018
1037
1038
+
/*
1039
+
* This is the stupid "wait for pipe to be readable or writable"
1040
+
* model.
1041
+
*
1042
+
* See pipe_read/write() for the proper kind of exclusive wait,
1043
+
* but that requires that we wake up any other readers/writers
1044
+
* if we then do not end up reading everything (ie the whole
1045
+
* "wake_next_reader/writer" logic in pipe_read/write()).
1046
+
*/
1047
+
void pipe_wait_readable(struct pipe_inode_info *pipe)
1048
+
{
1049
+
pipe_unlock(pipe);
1050
+
wait_event_interruptible(pipe->rd_wait, pipe_readable(pipe));
1051
+
pipe_lock(pipe);
1052
+
}
1053
+
1054
+
void pipe_wait_writable(struct pipe_inode_info *pipe)
1055
+
{
1056
+
pipe_unlock(pipe);
1057
+
wait_event_interruptible(pipe->wr_wait, pipe_writable(pipe));
1058
+
pipe_lock(pipe);
1059
+
}
1060
+
1061
+
/*
1062
+
* This depends on both the wait (here) and the wakeup (wake_up_partner)
1063
+
* holding the pipe lock, so "*cnt" is stable and we know a wakeup cannot
1064
+
* race with the count check and waitqueue prep.
1065
+
*
1066
+
* Normally in order to avoid races, you'd do the prepare_to_wait() first,
1067
+
* then check the condition you're waiting for, and only then sleep. But
1068
+
* because of the pipe lock, we can check the condition before being on
1069
+
* the wait queue.
1070
+
*
1071
+
* We use the 'rd_wait' waitqueue for pipe partner waiting.
1072
+
*/
1019
1073
static int wait_for_partner(struct pipe_inode_info *pipe, unsigned int *cnt)
1020
1074
{
1075
+
DEFINE_WAIT(rdwait);
1021
1076
int cur = *cnt;
1022
1077
1023
1078
while (cur == *cnt) {
1024
-
pipe_wait(pipe);
1079
+
prepare_to_wait(&pipe->rd_wait, &rdwait, TASK_INTERRUPTIBLE);
1080
+
pipe_unlock(pipe);
1081
+
schedule();
1082
+
finish_wait(&pipe->rd_wait, &rdwait);
1083
+
pipe_lock(pipe);
1025
1084
if (signal_pending(current))
1026
1085
break;
1027
1086
}
···
1071
1050
static void wake_up_partner(struct pipe_inode_info *pipe)
1072
1051
{
1073
1052
wake_up_interruptible_all(&pipe->rd_wait);
1074
-
wake_up_interruptible_all(&pipe->wr_wait);
1075
1053
}
1076
1054
1077
1055
static int fifo_open(struct inode *inode, struct file *filp)
+8
fs/read_write.c
+8
fs/read_write.c
···
538
538
inc_syscw(current);
539
539
return ret;
540
540
}
541
+
/*
542
+
* This "EXPORT_SYMBOL_GPL()" is more of a "EXPORT_SYMBOL_DONTUSE()",
543
+
* but autofs is one of the few internal kernel users that actually
544
+
* wants this _and_ can be built as a module. So we need to export
545
+
* this symbol for autofs, even though it really isn't appropriate
546
+
* for any other kernel modules.
547
+
*/
548
+
EXPORT_SYMBOL_GPL(__kernel_write);
541
549
542
550
ssize_t kernel_write(struct file *file, const void *buf, size_t count,
543
551
loff_t *pos)
+4
-4
fs/splice.c
+4
-4
fs/splice.c
···
563
563
sd->need_wakeup = false;
564
564
}
565
565
566
-
pipe_wait(pipe);
566
+
pipe_wait_readable(pipe);
567
567
}
568
568
569
569
return 1;
···
1077
1077
return -EAGAIN;
1078
1078
if (signal_pending(current))
1079
1079
return -ERESTARTSYS;
1080
-
pipe_wait(pipe);
1080
+
pipe_wait_writable(pipe);
1081
1081
}
1082
1082
}
1083
1083
···
1454
1454
ret = -EAGAIN;
1455
1455
break;
1456
1456
}
1457
-
pipe_wait(pipe);
1457
+
pipe_wait_readable(pipe);
1458
1458
}
1459
1459
1460
1460
pipe_unlock(pipe);
···
1493
1493
ret = -ERESTARTSYS;
1494
1494
break;
1495
1495
}
1496
-
pipe_wait(pipe);
1496
+
pipe_wait_writable(pipe);
1497
1497
}
1498
1498
1499
1499
pipe_unlock(pipe);
+1
-1
include/asm-generic/vmlinux.lds.h
+1
-1
include/asm-generic/vmlinux.lds.h
+1
-1
include/linux/acpi.h
+1
-1
include/linux/acpi.h
···
958
958
acpi_status acpi_os_prepare_extended_sleep(u8 sleep_state,
959
959
u32 val_a, u32 val_b);
960
960
961
-
#ifdef CONFIG_X86
961
+
#ifndef CONFIG_IA64
962
962
void arch_reserve_mem_area(acpi_physical_address addr, size_t size);
963
963
#else
964
964
static inline void arch_reserve_mem_area(acpi_physical_address addr,
+1
-2
include/linux/blk_types.h
+1
-2
include/linux/blk_types.h
···
497
497
498
498
typedef unsigned int blk_qc_t;
499
499
#define BLK_QC_T_NONE -1U
500
-
#define BLK_QC_T_EAGAIN -2U
501
500
#define BLK_QC_T_SHIFT 16
502
501
#define BLK_QC_T_INTERNAL (1U << 31)
503
502
504
503
static inline bool blk_qc_t_valid(blk_qc_t cookie)
505
504
{
506
-
return cookie != BLK_QC_T_NONE && cookie != BLK_QC_T_EAGAIN;
505
+
return cookie != BLK_QC_T_NONE;
507
506
}
508
507
509
508
static inline unsigned int blk_qc_t_to_queue_num(blk_qc_t cookie)
+2
include/linux/blkdev.h
+2
include/linux/blkdev.h
+1
include/linux/memstick.h
+1
include/linux/memstick.h
+3
include/linux/mlx5/driver.h
+3
include/linux/mlx5/driver.h
···
766
766
u64 ts2;
767
767
u16 op;
768
768
bool polling;
769
+
/* Track the max comp handlers */
770
+
refcount_t refcnt;
769
771
};
770
772
771
773
struct mlx5_pas {
···
934
932
int mlx5_cmd_exec_polling(struct mlx5_core_dev *dev, void *in, int in_size,
935
933
void *out, int out_size);
936
934
void mlx5_cmd_mbox_status(void *out, u8 *status, u32 *syndrome);
935
+
bool mlx5_cmd_is_down(struct mlx5_core_dev *dev);
937
936
938
937
int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type);
939
938
int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn);
+2
-2
include/linux/mm.h
+2
-2
include/linux/mm.h
···
1646
1646
void free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
1647
1647
unsigned long end, unsigned long floor, unsigned long ceiling);
1648
1648
int copy_page_range(struct mm_struct *dst, struct mm_struct *src,
1649
-
struct vm_area_struct *vma);
1649
+
struct vm_area_struct *vma, struct vm_area_struct *new);
1650
1650
int follow_pte_pmd(struct mm_struct *mm, unsigned long address,
1651
1651
struct mmu_notifier_range *range,
1652
1652
pte_t **ptepp, pmd_t **pmdpp, spinlock_t **ptlp);
···
2416
2416
2417
2417
extern void set_dma_reserve(unsigned long new_dma_reserve);
2418
2418
extern void memmap_init_zone(unsigned long, int, unsigned long, unsigned long,
2419
-
enum memmap_context, struct vmem_altmap *);
2419
+
enum meminit_context, struct vmem_altmap *);
2420
2420
extern void setup_per_zone_wmarks(void);
2421
2421
extern int __meminit init_per_zone_wmark_min(void);
2422
2422
extern void mem_init(void);
+10
include/linux/mm_types.h
+10
include/linux/mm_types.h
···
436
436
*/
437
437
atomic_t mm_count;
438
438
439
+
/**
440
+
* @has_pinned: Whether this mm has pinned any pages. This can
441
+
* be either replaced in the future by @pinned_vm when it
442
+
* becomes stable, or grow into a counter on its own. We're
443
+
* aggresive on this bit now - even if the pinned pages were
444
+
* unpinned later on, we'll still keep this bit set for the
445
+
* lifecycle of this mm just for simplicity.
446
+
*/
447
+
atomic_t has_pinned;
448
+
439
449
#ifdef CONFIG_MMU
440
450
atomic_long_t pgtables_bytes; /* PTE page table pages */
441
451
#endif
+8
-3
include/linux/mmzone.h
+8
-3
include/linux/mmzone.h
···
824
824
unsigned int alloc_flags);
825
825
bool zone_watermark_ok_safe(struct zone *z, unsigned int order,
826
826
unsigned long mark, int highest_zoneidx);
827
-
enum memmap_context {
828
-
MEMMAP_EARLY,
829
-
MEMMAP_HOTPLUG,
827
+
/*
828
+
* Memory initialization context, use to differentiate memory added by
829
+
* the platform statically or via memory hotplug interface.
830
+
*/
831
+
enum meminit_context {
832
+
MEMINIT_EARLY,
833
+
MEMINIT_HOTPLUG,
830
834
};
835
+
831
836
extern void init_currently_empty_zone(struct zone *zone, unsigned long start_pfn,
832
837
unsigned long size);
833
838
+16
include/linux/net.h
+16
include/linux/net.h
···
21
21
#include <linux/rcupdate.h>
22
22
#include <linux/once.h>
23
23
#include <linux/fs.h>
24
+
#include <linux/mm.h>
24
25
#include <linux/sockptr.h>
25
26
26
27
#include <uapi/linux/net.h>
···
289
288
get_random_once((buf), (nbytes))
290
289
#define net_get_random_once_wait(buf, nbytes) \
291
290
get_random_once_wait((buf), (nbytes))
291
+
292
+
/*
293
+
* E.g. XFS meta- & log-data is in slab pages, or bcache meta
294
+
* data pages, or other high order pages allocated by
295
+
* __get_free_pages() without __GFP_COMP, which have a page_count
296
+
* of 0 and/or have PageSlab() set. We cannot use send_page for
297
+
* those, as that does get_page(); put_page(); and would cause
298
+
* either a VM_BUG directly, or __page_cache_release a page that
299
+
* would actually still be referenced by someone, leading to some
300
+
* obscure delayed Oops somewhere else.
301
+
*/
302
+
static inline bool sendpage_ok(struct page *page)
303
+
{
304
+
return !PageSlab(page) && page_count(page) >= 1;
305
+
}
292
306
293
307
int kernel_sendmsg(struct socket *sock, struct msghdr *msg, struct kvec *vec,
294
308
size_t num, size_t len);
+59
-14
include/linux/netdevice.h
+59
-14
include/linux/netdevice.h
···
1842
1842
* @udp_tunnel_nic: UDP tunnel offload state
1843
1843
* @xdp_state: stores info on attached XDP BPF programs
1844
1844
*
1845
+
* @nested_level: Used as as a parameter of spin_lock_nested() of
1846
+
* dev->addr_list_lock.
1847
+
* @unlink_list: As netif_addr_lock() can be called recursively,
1848
+
* keep a list of interfaces to be deleted.
1849
+
*
1845
1850
* FIXME: cleanup struct net_device such that network protocol info
1846
1851
* moves out.
1847
1852
*/
···
1951
1946
unsigned short type;
1952
1947
unsigned short hard_header_len;
1953
1948
unsigned char min_header_len;
1949
+
unsigned char name_assign_type;
1954
1950
1955
1951
unsigned short needed_headroom;
1956
1952
unsigned short needed_tailroom;
···
1962
1956
unsigned char addr_len;
1963
1957
unsigned char upper_level;
1964
1958
unsigned char lower_level;
1959
+
1965
1960
unsigned short neigh_priv_len;
1966
1961
unsigned short dev_id;
1967
1962
unsigned short dev_port;
1968
1963
spinlock_t addr_list_lock;
1969
-
unsigned char name_assign_type;
1970
-
bool uc_promisc;
1964
+
1971
1965
struct netdev_hw_addr_list uc;
1972
1966
struct netdev_hw_addr_list mc;
1973
1967
struct netdev_hw_addr_list dev_addrs;
···
1975
1969
#ifdef CONFIG_SYSFS
1976
1970
struct kset *queues_kset;
1977
1971
#endif
1972
+
#ifdef CONFIG_LOCKDEP
1973
+
struct list_head unlink_list;
1974
+
#endif
1978
1975
unsigned int promiscuity;
1979
1976
unsigned int allmulti;
1977
+
bool uc_promisc;
1978
+
#ifdef CONFIG_LOCKDEP
1979
+
unsigned char nested_level;
1980
+
#endif
1980
1981
1981
1982
1982
1983
/* Protocol-specific pointers */
···
4294
4281
4295
4282
static inline void netif_addr_lock(struct net_device *dev)
4296
4283
{
4297
-
spin_lock(&dev->addr_list_lock);
4298
-
}
4284
+
unsigned char nest_level = 0;
4299
4285
4300
-
static inline void netif_addr_lock_nested(struct net_device *dev)
4301
-
{
4302
-
spin_lock_nested(&dev->addr_list_lock, dev->lower_level);
4286
+
#ifdef CONFIG_LOCKDEP
4287
+
nest_level = dev->nested_level;
4288
+
#endif
4289
+
spin_lock_nested(&dev->addr_list_lock, nest_level);
4303
4290
}
4304
4291
4305
4292
static inline void netif_addr_lock_bh(struct net_device *dev)
4306
4293
{
4307
-
spin_lock_bh(&dev->addr_list_lock);
4294
+
unsigned char nest_level = 0;
4295
+
4296
+
#ifdef CONFIG_LOCKDEP
4297
+
nest_level = dev->nested_level;
4298
+
#endif
4299
+
local_bh_disable();
4300
+
spin_lock_nested(&dev->addr_list_lock, nest_level);
4308
4301
}
4309
4302
4310
4303
static inline void netif_addr_unlock(struct net_device *dev)
···
4495
4476
extern int dev_tx_weight;
4496
4477
extern int gro_normal_batch;
4497
4478
4479
+
enum {
4480
+
NESTED_SYNC_IMM_BIT,
4481
+
NESTED_SYNC_TODO_BIT,
4482
+
};
4483
+
4484
+
#define __NESTED_SYNC_BIT(bit) ((u32)1 << (bit))
4485
+
#define __NESTED_SYNC(name) __NESTED_SYNC_BIT(NESTED_SYNC_ ## name ## _BIT)
4486
+
4487
+
#define NESTED_SYNC_IMM __NESTED_SYNC(IMM)
4488
+
#define NESTED_SYNC_TODO __NESTED_SYNC(TODO)
4489
+
4490
+
struct netdev_nested_priv {
4491
+
unsigned char flags;
4492
+
void *data;
4493
+
};
4494
+
4498
4495
bool netdev_has_upper_dev(struct net_device *dev, struct net_device *upper_dev);
4499
4496
struct net_device *netdev_upper_get_next_dev_rcu(struct net_device *dev,
4500
4497
struct list_head **iter);
4501
4498
struct net_device *netdev_all_upper_get_next_dev_rcu(struct net_device *dev,
4502
4499
struct list_head **iter);
4500
+
4501
+
#ifdef CONFIG_LOCKDEP
4502
+
static LIST_HEAD(net_unlink_list);
4503
+
4504
+
static inline void net_unlink_todo(struct net_device *dev)
4505
+
{
4506
+
if (list_empty(&dev->unlink_list))
4507
+
list_add_tail(&dev->unlink_list, &net_unlink_list);
4508
+
}
4509
+
#endif
4503
4510
4504
4511
/* iterate through upper list, must be called under RCU read lock */
4505
4512
#define netdev_for_each_upper_dev_rcu(dev, updev, iter) \
···
4536
4491
4537
4492
int netdev_walk_all_upper_dev_rcu(struct net_device *dev,
4538
4493
int (*fn)(struct net_device *upper_dev,
4539
-
void *data),
4540
-
void *data);
4494
+
struct netdev_nested_priv *priv),
4495
+
struct netdev_nested_priv *priv);
4541
4496
4542
4497
bool netdev_has_upper_dev_all_rcu(struct net_device *dev,
4543
4498
struct net_device *upper_dev);
···
4574
4529
struct list_head **iter);
4575
4530
int netdev_walk_all_lower_dev(struct net_device *dev,
4576
4531
int (*fn)(struct net_device *lower_dev,
4577
-
void *data),
4578
-
void *data);
4532
+
struct netdev_nested_priv *priv),
4533
+
struct netdev_nested_priv *priv);
4579
4534
int netdev_walk_all_lower_dev_rcu(struct net_device *dev,
4580
4535
int (*fn)(struct net_device *lower_dev,
4581
-
void *data),
4582
-
void *data);
4536
+
struct netdev_nested_priv *priv),
4537
+
struct netdev_nested_priv *priv);
4583
4538
4584
4539
void *netdev_adjacent_get_private(struct list_head *adj_list);
4585
4540
void *netdev_lower_get_first_private_rcu(struct net_device *dev);
+2
-2
include/linux/nfs_xdr.h
+2
-2
include/linux/nfs_xdr.h
···
1611
1611
__u64 mds_offset; /* Filelayout dense stripe */
1612
1612
struct nfs_page_array page_array;
1613
1613
struct nfs_client *ds_clp; /* pNFS data server */
1614
-
int ds_commit_idx; /* ds index if ds_clp is set */
1615
-
int pgio_mirror_idx;/* mirror index in pgio layer */
1614
+
u32 ds_commit_idx; /* ds index if ds_clp is set */
1615
+
u32 pgio_mirror_idx;/* mirror index in pgio layer */
1616
1616
};
1617
1617
1618
1618
struct nfs_mds_commit_info {
+7
-4
include/linux/node.h
+7
-4
include/linux/node.h
···
99
99
typedef void (*node_registration_func_t)(struct node *);
100
100
101
101
#if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_NUMA)
102
-
extern int link_mem_sections(int nid, unsigned long start_pfn,
103
-
unsigned long end_pfn);
102
+
int link_mem_sections(int nid, unsigned long start_pfn,
103
+
unsigned long end_pfn,
104
+
enum meminit_context context);
104
105
#else
105
106
static inline int link_mem_sections(int nid, unsigned long start_pfn,
106
-
unsigned long end_pfn)
107
+
unsigned long end_pfn,
108
+
enum meminit_context context)
107
109
{
108
110
return 0;
109
111
}
···
130
128
if (error)
131
129
return error;
132
130
/* link memory sections under this node */
133
-
error = link_mem_sections(nid, start_pfn, end_pfn);
131
+
error = link_mem_sections(nid, start_pfn, end_pfn,
132
+
MEMINIT_EARLY);
134
133
}
135
134
136
135
return error;
+10
include/linux/pgtable.h
+10
include/linux/pgtable.h
···
1427
1427
#define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1428
1428
#endif
1429
1429
1430
+
#ifndef p4d_offset_lockless
1431
+
#define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1432
+
#endif
1433
+
#ifndef pud_offset_lockless
1434
+
#define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1435
+
#endif
1436
+
#ifndef pmd_offset_lockless
1437
+
#define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1438
+
#endif
1439
+
1430
1440
/*
1431
1441
* p?d_leaf() - true if this entry is a final mapping to a physical address.
1432
1442
* This differs from p?d_huge() by the fact that they are always available (if
+3
-2
include/linux/pipe_fs_i.h
+3
-2
include/linux/pipe_fs_i.h
···
240
240
extern unsigned long pipe_user_pages_hard;
241
241
extern unsigned long pipe_user_pages_soft;
242
242
243
-
/* Drop the inode semaphore and wait for a pipe event, atomically */
244
-
void pipe_wait(struct pipe_inode_info *pipe);
243
+
/* Wait for a pipe to be readable/writable while dropping the pipe lock */
244
+
void pipe_wait_readable(struct pipe_inode_info *);
245
+
void pipe_wait_writable(struct pipe_inode_info *);
245
246
246
247
struct pipe_inode_info *alloc_pipe_info(void);
247
248
void free_pipe_info(struct pipe_inode_info *);
+1
-1
include/linux/platform_data/gpio/gpio-amd-fch.h
+1
-1
include/linux/platform_data/gpio/gpio-amd-fch.h
···
19
19
#define AMD_FCH_GPIO_REG_GPIO49 0x40
20
20
#define AMD_FCH_GPIO_REG_GPIO50 0x41
21
21
#define AMD_FCH_GPIO_REG_GPIO51 0x42
22
-
#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP0 0x43
22
+
#define AMD_FCH_GPIO_REG_GPIO55_DEVSLP0 0x43
23
23
#define AMD_FCH_GPIO_REG_GPIO57 0x44
24
24
#define AMD_FCH_GPIO_REG_GPIO58 0x45
25
25
#define AMD_FCH_GPIO_REG_GPIO59_DEVSLP1 0x46
+5
include/linux/vmstat.h
+5
include/linux/vmstat.h
···
312
312
static inline void __mod_node_page_state(struct pglist_data *pgdat,
313
313
enum node_stat_item item, int delta)
314
314
{
315
+
if (vmstat_item_in_bytes(item)) {
316
+
VM_WARN_ON_ONCE(delta & (PAGE_SIZE - 1));
317
+
delta >>= PAGE_SHIFT;
318
+
}
319
+
315
320
node_page_state_add(delta, pgdat, item);
316
321
}
317
322
+2
-5
include/media/videobuf2-core.h
+2
-5
include/media/videobuf2-core.h
···
744
744
* vb2_core_reqbufs() - Initiate streaming.
745
745
* @q: pointer to &struct vb2_queue with videobuf2 queue.
746
746
* @memory: memory type, as defined by &enum vb2_memory.
747
-
* @flags: auxiliary queue/buffer management flags. Currently, the only
748
-
* used flag is %V4L2_FLAG_MEMORY_NON_CONSISTENT.
749
747
* @count: requested buffer count.
750
748
*
751
749
* Videobuf2 core helper to implement VIDIOC_REQBUF() operation. It is called
···
768
770
* Return: returns zero on success; an error code otherwise.
769
771
*/
770
772
int vb2_core_reqbufs(struct vb2_queue *q, enum vb2_memory memory,
771
-
unsigned int flags, unsigned int *count);
773
+
unsigned int *count);
772
774
773
775
/**
774
776
* vb2_core_create_bufs() - Allocate buffers and any required auxiliary structs
775
777
* @q: pointer to &struct vb2_queue with videobuf2 queue.
776
778
* @memory: memory type, as defined by &enum vb2_memory.
777
-
* @flags: auxiliary queue/buffer management flags.
778
779
* @count: requested buffer count.
779
780
* @requested_planes: number of planes requested.
780
781
* @requested_sizes: array with the size of the planes.
···
791
794
* Return: returns zero on success; an error code otherwise.
792
795
*/
793
796
int vb2_core_create_bufs(struct vb2_queue *q, enum vb2_memory memory,
794
-
unsigned int flags, unsigned int *count,
797
+
unsigned int *count,
795
798
unsigned int requested_planes,
796
799
const unsigned int requested_sizes[]);
797
800
-2
include/net/act_api.h
-2
include/net/act_api.h
···
166
166
struct nlattr *est, struct tc_action **a,
167
167
const struct tc_action_ops *ops, int bind,
168
168
u32 flags);
169
-
void tcf_idr_insert(struct tc_action_net *tn, struct tc_action *a);
170
-
171
169
void tcf_idr_cleanup(struct tc_action_net *tn, u32 index);
172
170
int tcf_idr_check_alloc(struct tc_action_net *tn, u32 *index,
173
171
struct tc_action **a, int bind);
+1
include/net/genetlink.h
+1
include/net/genetlink.h
···
139
139
* @flags: flags
140
140
* @maxattr: maximum number of attributes supported
141
141
* @policy: netlink policy (takes precedence over family policy)
142
+
* @validate: validation flags from enum genl_validate_flags
142
143
* @doit: standard command callback
143
144
* @start: start callback for dumps
144
145
* @dumpit: callback for dumpers
+6
include/net/ip.h
+6
include/net/ip.h
···
436
436
bool forwarding)
437
437
{
438
438
struct net *net = dev_net(dst->dev);
439
+
unsigned int mtu;
439
440
440
441
if (net->ipv4.sysctl_ip_fwd_use_pmtu ||
441
442
ip_mtu_locked(dst) ||
442
443
!forwarding)
443
444
return dst_mtu(dst);
445
+
446
+
/* 'forwarding = true' case should always honour route mtu */
447
+
mtu = dst_metric_raw(dst, RTAX_MTU);
448
+
if (mtu)
449
+
return mtu;
444
450
445
451
return min(READ_ONCE(dst->dev->mtu), IP_MAX_MTU);
446
452
}
+6
-10
include/net/xfrm.h
+6
-10
include/net/xfrm.h
···
1773
1773
static inline int xfrm_replay_clone(struct xfrm_state *x,
1774
1774
struct xfrm_state *orig)
1775
1775
{
1776
-
x->replay_esn = kzalloc(xfrm_replay_state_esn_len(orig->replay_esn),
1776
+
1777
+
x->replay_esn = kmemdup(orig->replay_esn,
1778
+
xfrm_replay_state_esn_len(orig->replay_esn),
1777
1779
GFP_KERNEL);
1778
1780
if (!x->replay_esn)
1779
1781
return -ENOMEM;
1780
-
1781
-
x->replay_esn->bmp_len = orig->replay_esn->bmp_len;
1782
-
x->replay_esn->replay_window = orig->replay_esn->replay_window;
1783
-
1784
-
x->preplay_esn = kmemdup(x->replay_esn,
1785
-
xfrm_replay_state_esn_len(x->replay_esn),
1782
+
x->preplay_esn = kmemdup(orig->preplay_esn,
1783
+
xfrm_replay_state_esn_len(orig->preplay_esn),
1786
1784
GFP_KERNEL);
1787
-
if (!x->preplay_esn) {
1788
-
kfree(x->replay_esn);
1785
+
if (!x->preplay_esn)
1789
1786
return -ENOMEM;
1790
-
}
1791
1787
1792
1788
return 0;
1793
1789
}
+4
-4
include/soc/mscc/ocelot_ana.h
+4
-4
include/soc/mscc/ocelot_ana.h
···
252
252
#define ANA_SG_CONFIG_REG_3_LIST_LENGTH_M GENMASK(18, 16)
253
253
#define ANA_SG_CONFIG_REG_3_LIST_LENGTH_X(x) (((x) & GENMASK(18, 16)) >> 16)
254
254
#define ANA_SG_CONFIG_REG_3_GATE_ENABLE BIT(20)
255
-
#define ANA_SG_CONFIG_REG_3_INIT_IPS(x) (((x) << 24) & GENMASK(27, 24))
256
-
#define ANA_SG_CONFIG_REG_3_INIT_IPS_M GENMASK(27, 24)
257
-
#define ANA_SG_CONFIG_REG_3_INIT_IPS_X(x) (((x) & GENMASK(27, 24)) >> 24)
258
-
#define ANA_SG_CONFIG_REG_3_INIT_GATE_STATE BIT(28)
255
+
#define ANA_SG_CONFIG_REG_3_INIT_IPS(x) (((x) << 21) & GENMASK(24, 21))
256
+
#define ANA_SG_CONFIG_REG_3_INIT_IPS_M GENMASK(24, 21)
257
+
#define ANA_SG_CONFIG_REG_3_INIT_IPS_X(x) (((x) & GENMASK(24, 21)) >> 21)
258
+
#define ANA_SG_CONFIG_REG_3_INIT_GATE_STATE BIT(25)
259
259
260
260
#define ANA_SG_GCL_GS_CONFIG_RSZ 0x4
261
261
+1
include/uapi/linux/snmp.h
+1
include/uapi/linux/snmp.h
···
288
288
LINUX_MIB_TCPTIMEOUTREHASH, /* TCPTimeoutRehash */
289
289
LINUX_MIB_TCPDUPLICATEDATAREHASH, /* TCPDuplicateDataRehash */
290
290
LINUX_MIB_TCPDSACKRECVSEGS, /* TCPDSACKRecvSegs */
291
+
LINUX_MIB_TCPDSACKIGNOREDDUBIOUS, /* TCPDSACKIgnoredDubious */
291
292
__LINUX_MIB_MAX
292
293
};
293
294
+2
-11
include/uapi/linux/videodev2.h
+2
-11
include/uapi/linux/videodev2.h
···
191
191
V4L2_MEMORY_DMABUF = 4,
192
192
};
193
193
194
-
#define V4L2_FLAG_MEMORY_NON_CONSISTENT (1 << 0)
195
-
196
194
/* see also http://vektor.theorem.ca/graphics/ycbcr/ */
197
195
enum v4l2_colorspace {
198
196
/*
···
947
949
__u32 type; /* enum v4l2_buf_type */
948
950
__u32 memory; /* enum v4l2_memory */
949
951
__u32 capabilities;
950
-
union {
951
-
__u32 flags;
952
-
__u32 reserved[1];
953
-
};
952
+
__u32 reserved[1];
954
953
};
955
954
956
955
/* capabilities for struct v4l2_requestbuffers and v4l2_create_buffers */
···
2451
2456
* @memory: enum v4l2_memory; buffer memory type
2452
2457
* @format: frame format, for which buffers are requested
2453
2458
* @capabilities: capabilities of this buffer type.
2454
-
* @flags: additional buffer management attributes (ignored unless the
2455
-
* queue has V4L2_BUF_CAP_SUPPORTS_MMAP_CACHE_HINTS capability
2456
-
* and configured for MMAP streaming I/O).
2457
2459
* @reserved: future extensions
2458
2460
*/
2459
2461
struct v4l2_create_buffers {
···
2459
2467
__u32 memory;
2460
2468
struct v4l2_format format;
2461
2469
__u32 capabilities;
2462
-
__u32 flags;
2463
-
__u32 reserved[6];
2470
+
__u32 reserved[7];
2464
2471
};
2465
2472
2466
2473
/*
+3
-3
kernel/bpf/sysfs_btf.c
+3
-3
kernel/bpf/sysfs_btf.c
···
30
30
31
31
static int __init btf_vmlinux_init(void)
32
32
{
33
-
if (!__start_BTF)
33
+
bin_attr_btf_vmlinux.size = __stop_BTF - __start_BTF;
34
+
35
+
if (!__start_BTF || bin_attr_btf_vmlinux.size == 0)
34
36
return 0;
35
37
36
38
btf_kobj = kobject_create_and_add("btf", kernel_kobj);
37
39
if (!btf_kobj)
38
40
return -ENOMEM;
39
-
40
-
bin_attr_btf_vmlinux.size = __stop_BTF - __start_BTF;
41
41
42
42
return sysfs_create_bin_file(btf_kobj, &bin_attr_btf_vmlinux);
43
43
}
+2
-1
kernel/fork.c
+2
-1
kernel/fork.c
···
589
589
590
590
mm->map_count++;
591
591
if (!(tmp->vm_flags & VM_WIPEONFORK))
592
-
retval = copy_page_range(mm, oldmm, mpnt);
592
+
retval = copy_page_range(mm, oldmm, mpnt, tmp);
593
593
594
594
if (tmp->vm_ops && tmp->vm_ops->open)
595
595
tmp->vm_ops->open(tmp);
···
1011
1011
mm_pgtables_bytes_init(mm);
1012
1012
mm->map_count = 0;
1013
1013
mm->locked_vm = 0;
1014
+
atomic_set(&mm->has_pinned, 0);
1014
1015
atomic64_set(&mm->pinned_vm, 0);
1015
1016
memset(&mm->rss_stat, 0, sizeof(mm->rss_stat));
1016
1017
spin_lock_init(&mm->page_table_lock);
+2
kernel/rcu/tree.c
+2
kernel/rcu/tree.c
···
673
673
lockdep_assert_irqs_disabled();
674
674
rcu_eqs_enter(false);
675
675
}
676
+
EXPORT_SYMBOL_GPL(rcu_idle_enter);
676
677
677
678
#ifdef CONFIG_NO_HZ_FULL
678
679
/**
···
887
886
rcu_eqs_exit(false);
888
887
local_irq_restore(flags);
889
888
}
889
+
EXPORT_SYMBOL_GPL(rcu_idle_exit);
890
890
891
891
#ifdef CONFIG_NO_HZ_FULL
892
892
/**
+2
-4
kernel/trace/ftrace.c
+2
-4
kernel/trace/ftrace.c
···
6993
6993
{
6994
6994
int bit;
6995
6995
6996
-
if ((op->flags & FTRACE_OPS_FL_RCU) && !rcu_is_watching())
6997
-
return;
6998
-
6999
6996
bit = trace_test_and_set_recursion(TRACE_LIST_START, TRACE_LIST_MAX);
7000
6997
if (bit < 0)
7001
6998
return;
7002
6999
7003
7000
preempt_disable_notrace();
7004
7001
7005
-
op->func(ip, parent_ip, op, regs);
7002
+
if (!(op->flags & FTRACE_OPS_FL_RCU) || rcu_is_watching())
7003
+
op->func(ip, parent_ip, op, regs);
7006
7004
7007
7005
preempt_enable_notrace();
7008
7006
trace_clear_recursion(bit);
+6
-4
kernel/trace/trace.c
+6
-4
kernel/trace/trace.c
···
3546
3546
if (iter->ent && iter->ent != iter->temp) {
3547
3547
if ((!iter->temp || iter->temp_size < iter->ent_size) &&
3548
3548
!WARN_ON_ONCE(iter->temp == static_temp_buf)) {
3549
-
kfree(iter->temp);
3550
-
iter->temp = kmalloc(iter->ent_size, GFP_KERNEL);
3551
-
if (!iter->temp)
3549
+
void *temp;
3550
+
temp = kmalloc(iter->ent_size, GFP_KERNEL);
3551
+
if (!temp)
3552
3552
return NULL;
3553
+
kfree(iter->temp);
3554
+
iter->temp = temp;
3555
+
iter->temp_size = iter->ent_size;
3553
3556
}
3554
3557
memcpy(iter->temp, iter->ent, iter->ent_size);
3555
-
iter->temp_size = iter->ent_size;
3556
3558
iter->ent = iter->temp;
3557
3559
}
3558
3560
entry = __find_next_entry(iter, ent_cpu, NULL, ent_ts);
+24
-14
lib/bootconfig.c
+24
-14
lib/bootconfig.c
···
31
31
static struct xbc_node *last_parent __initdata;
32
32
static const char *xbc_err_msg __initdata;
33
33
static int xbc_err_pos __initdata;
34
+
static int open_brace[XBC_DEPTH_MAX] __initdata;
35
+
static int brace_index __initdata;
34
36
35
37
static int __init xbc_parse_error(const char *msg, const char *p)
36
38
{
···
433
431
return p;
434
432
}
435
433
436
-
static int __init __xbc_open_brace(void)
434
+
static int __init __xbc_open_brace(char *p)
437
435
{
438
-
/* Mark the last key as open brace */
439
-
last_parent->next = XBC_NODE_MAX;
436
+
/* Push the last key as open brace */
437
+
open_brace[brace_index++] = xbc_node_index(last_parent);
438
+
if (brace_index >= XBC_DEPTH_MAX)
439
+
return xbc_parse_error("Exceed max depth of braces", p);
440
440
441
441
return 0;
442
442
}
443
443
444
444
static int __init __xbc_close_brace(char *p)
445
445
{
446
-
struct xbc_node *node;
447
-
448
-
if (!last_parent || last_parent->next != XBC_NODE_MAX)
446
+
brace_index--;
447
+
if (!last_parent || brace_index < 0 ||
448
+
(open_brace[brace_index] != xbc_node_index(last_parent)))
449
449
return xbc_parse_error("Unexpected closing brace", p);
450
450
451
-
node = last_parent;
452
-
node->next = 0;
453
-
do {
454
-
node = xbc_node_get_parent(node);
455
-
} while (node && node->next != XBC_NODE_MAX);
456
-
last_parent = node;
451
+
if (brace_index == 0)
452
+
last_parent = NULL;
453
+
else
454
+
last_parent = &xbc_nodes[open_brace[brace_index - 1]];
457
455
458
456
return 0;
459
457
}
···
494
492
break;
495
493
}
496
494
if (strchr(",;\n#}", c)) {
497
-
v = strim(v);
498
495
*p++ = '\0';
496
+
v = strim(v);
499
497
break;
500
498
}
501
499
}
···
663
661
return ret;
664
662
*k = n;
665
663
666
-
return __xbc_open_brace();
664
+
return __xbc_open_brace(n - 1);
667
665
}
668
666
669
667
static int __init xbc_close_brace(char **k, char *n)
···
682
680
{
683
681
int i, depth, len, wlen;
684
682
struct xbc_node *n, *m;
683
+
684
+
/* Brace closing */
685
+
if (brace_index) {
686
+
n = &xbc_nodes[open_brace[brace_index]];
687
+
return xbc_parse_error("Brace is not closed",
688
+
xbc_node_get_data(n));
689
+
}
685
690
686
691
/* Empty tree */
687
692
if (xbc_node_num == 0) {
···
754
745
xbc_node_num = 0;
755
746
memblock_free(__pa(xbc_nodes), sizeof(struct xbc_node) * XBC_NODE_MAX);
756
747
xbc_nodes = NULL;
748
+
brace_index = 0;
757
749
}
758
750
759
751
/**
+1
lib/memregion.c
+1
lib/memregion.c
+1
-1
lib/random32.c
+1
-1
lib/random32.c
+24
lib/string.c
+24
lib/string.c
···
272
272
}
273
273
EXPORT_SYMBOL(strscpy_pad);
274
274
275
+
/**
276
+
* stpcpy - copy a string from src to dest returning a pointer to the new end
277
+
* of dest, including src's %NUL-terminator. May overrun dest.
278
+
* @dest: pointer to end of string being copied into. Must be large enough
279
+
* to receive copy.
280
+
* @src: pointer to the beginning of string being copied from. Must not overlap
281
+
* dest.
282
+
*
283
+
* stpcpy differs from strcpy in a key way: the return value is a pointer
284
+
* to the new %NUL-terminating character in @dest. (For strcpy, the return
285
+
* value is a pointer to the start of @dest). This interface is considered
286
+
* unsafe as it doesn't perform bounds checking of the inputs. As such it's
287
+
* not recommended for usage. Instead, its definition is provided in case
288
+
* the compiler lowers other libcalls to stpcpy.
289
+
*/
290
+
char *stpcpy(char *__restrict__ dest, const char *__restrict__ src);
291
+
char *stpcpy(char *__restrict__ dest, const char *__restrict__ src)
292
+
{
293
+
while ((*dest++ = *src++) != '\0')
294
+
/* nothing */;
295
+
return --dest;
296
+
}
297
+
EXPORT_SYMBOL(stpcpy);
298
+
275
299
#ifndef __HAVE_ARCH_STRCAT
276
300
/**
277
301
* strcat - Append one %NUL-terminated string to another
+5
-1
mm/filemap.c
+5
-1
mm/filemap.c
···
2365
2365
}
2366
2366
2367
2367
if (!PageUptodate(page)) {
2368
-
error = lock_page_killable(page);
2368
+
if (iocb->ki_flags & IOCB_WAITQ)
2369
+
error = lock_page_async(page, iocb->ki_waitq);
2370
+
else
2371
+
error = lock_page_killable(page);
2372
+
2369
2373
if (unlikely(error))
2370
2374
goto readpage_error;
2371
2375
if (!PageUptodate(page)) {
+15
-9
mm/gup.c
+15
-9
mm/gup.c
···
1255
1255
BUG_ON(*locked != 1);
1256
1256
}
1257
1257
1258
+
if (flags & FOLL_PIN)
1259
+
atomic_set(&mm->has_pinned, 1);
1260
+
1258
1261
/*
1259
1262
* FOLL_PIN and FOLL_GET are mutually exclusive. Traditional behavior
1260
1263
* is to set FOLL_GET if the caller wants pages[] filled in (but has
···
2488
2485
return 1;
2489
2486
}
2490
2487
2491
-
static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
2488
+
static int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr, unsigned long end,
2492
2489
unsigned int flags, struct page **pages, int *nr)
2493
2490
{
2494
2491
unsigned long next;
2495
2492
pmd_t *pmdp;
2496
2493
2497
-
pmdp = pmd_offset(&pud, addr);
2494
+
pmdp = pmd_offset_lockless(pudp, pud, addr);
2498
2495
do {
2499
2496
pmd_t pmd = READ_ONCE(*pmdp);
2500
2497
···
2531
2528
return 1;
2532
2529
}
2533
2530
2534
-
static int gup_pud_range(p4d_t p4d, unsigned long addr, unsigned long end,
2531
+
static int gup_pud_range(p4d_t *p4dp, p4d_t p4d, unsigned long addr, unsigned long end,
2535
2532
unsigned int flags, struct page **pages, int *nr)
2536
2533
{
2537
2534
unsigned long next;
2538
2535
pud_t *pudp;
2539
2536
2540
-
pudp = pud_offset(&p4d, addr);
2537
+
pudp = pud_offset_lockless(p4dp, p4d, addr);
2541
2538
do {
2542
2539
pud_t pud = READ_ONCE(*pudp);
2543
2540
···
2552
2549
if (!gup_huge_pd(__hugepd(pud_val(pud)), addr,
2553
2550
PUD_SHIFT, next, flags, pages, nr))
2554
2551
return 0;
2555
-
} else if (!gup_pmd_range(pud, addr, next, flags, pages, nr))
2552
+
} else if (!gup_pmd_range(pudp, pud, addr, next, flags, pages, nr))
2556
2553
return 0;
2557
2554
} while (pudp++, addr = next, addr != end);
2558
2555
2559
2556
return 1;
2560
2557
}
2561
2558
2562
-
static int gup_p4d_range(pgd_t pgd, unsigned long addr, unsigned long end,
2559
+
static int gup_p4d_range(pgd_t *pgdp, pgd_t pgd, unsigned long addr, unsigned long end,
2563
2560
unsigned int flags, struct page **pages, int *nr)
2564
2561
{
2565
2562
unsigned long next;
2566
2563
p4d_t *p4dp;
2567
2564
2568
-
p4dp = p4d_offset(&pgd, addr);
2565
+
p4dp = p4d_offset_lockless(pgdp, pgd, addr);
2569
2566
do {
2570
2567
p4d_t p4d = READ_ONCE(*p4dp);
2571
2568
···
2577
2574
if (!gup_huge_pd(__hugepd(p4d_val(p4d)), addr,
2578
2575
P4D_SHIFT, next, flags, pages, nr))
2579
2576
return 0;
2580
-
} else if (!gup_pud_range(p4d, addr, next, flags, pages, nr))
2577
+
} else if (!gup_pud_range(p4dp, p4d, addr, next, flags, pages, nr))
2581
2578
return 0;
2582
2579
} while (p4dp++, addr = next, addr != end);
2583
2580
···
2605
2602
if (!gup_huge_pd(__hugepd(pgd_val(pgd)), addr,
2606
2603
PGDIR_SHIFT, next, flags, pages, nr))
2607
2604
return;
2608
-
} else if (!gup_p4d_range(pgd, addr, next, flags, pages, nr))
2605
+
} else if (!gup_p4d_range(pgdp, pgd, addr, next, flags, pages, nr))
2609
2606
return;
2610
2607
} while (pgdp++, addr = next, addr != end);
2611
2608
}
···
2662
2659
FOLL_FORCE | FOLL_PIN | FOLL_GET |
2663
2660
FOLL_FAST_ONLY)))
2664
2661
return -EINVAL;
2662
+
2663
+
if (gup_flags & FOLL_PIN)
2664
+
atomic_set(¤t->mm->has_pinned, 1);
2665
2665
2666
2666
if (!(gup_flags & FOLL_FAST_ONLY))
2667
2667
might_lock_read(¤t->mm->mmap_lock);
+28
mm/huge_memory.c
+28
mm/huge_memory.c
···
1074
1074
1075
1075
src_page = pmd_page(pmd);
1076
1076
VM_BUG_ON_PAGE(!PageHead(src_page), src_page);
1077
+
1078
+
/*
1079
+
* If this page is a potentially pinned page, split and retry the fault
1080
+
* with smaller page size. Normally this should not happen because the
1081
+
* userspace should use MADV_DONTFORK upon pinned regions. This is a
1082
+
* best effort that the pinned pages won't be replaced by another
1083
+
* random page during the coming copy-on-write.
1084
+
*/
1085
+
if (unlikely(is_cow_mapping(vma->vm_flags) &&
1086
+
atomic_read(&src_mm->has_pinned) &&
1087
+
page_maybe_dma_pinned(src_page))) {
1088
+
pte_free(dst_mm, pgtable);
1089
+
spin_unlock(src_ptl);
1090
+
spin_unlock(dst_ptl);
1091
+
__split_huge_pmd(vma, src_pmd, addr, false, NULL);
1092
+
return -EAGAIN;
1093
+
}
1094
+
1077
1095
get_page(src_page);
1078
1096
page_dup_rmap(src_page, true);
1079
1097
add_mm_counter(dst_mm, MM_ANONPAGES, HPAGE_PMD_NR);
···
1193
1175
*/
1194
1176
if (is_huge_zero_pud(pud)) {
1195
1177
/* No huge zero pud yet */
1178
+
}
1179
+
1180
+
/* Please refer to comments in copy_huge_pmd() */
1181
+
if (unlikely(is_cow_mapping(vma->vm_flags) &&
1182
+
atomic_read(&src_mm->has_pinned) &&
1183
+
page_maybe_dma_pinned(pud_page(pud)))) {
1184
+
spin_unlock(src_ptl);
1185
+
spin_unlock(dst_ptl);
1186
+
__split_huge_pud(vma, src_pud, addr);
1187
+
return -EAGAIN;
1196
1188
}
1197
1189
1198
1190
pudp_set_wrprotect(src_mm, addr, src_pud);
+1
-1
mm/madvise.c
+1
-1
mm/madvise.c
+2
-2
mm/memcontrol.c
+2
-2
mm/memcontrol.c
···
1538
1538
memcg_page_state(memcg, WORKINGSET_ACTIVATE_ANON));
1539
1539
seq_buf_printf(&s, "workingset_activate_file %lu\n",
1540
1540
memcg_page_state(memcg, WORKINGSET_ACTIVATE_FILE));
1541
-
seq_buf_printf(&s, "workingset_restore %lu\n",
1541
+
seq_buf_printf(&s, "workingset_restore_anon %lu\n",
1542
1542
memcg_page_state(memcg, WORKINGSET_RESTORE_ANON));
1543
-
seq_buf_printf(&s, "workingset_restore %lu\n",
1543
+
seq_buf_printf(&s, "workingset_restore_file %lu\n",
1544
1544
memcg_page_state(memcg, WORKINGSET_RESTORE_FILE));
1545
1545
seq_buf_printf(&s, "workingset_nodereclaim %lu\n",
1546
1546
memcg_page_state(memcg, WORKINGSET_NODERECLAIM));
+280
-91
mm/memory.c
+280
-91
mm/memory.c
···
695
695
* covered by this vma.
696
696
*/
697
697
698
-
static inline unsigned long
699
-
copy_one_pte(struct mm_struct *dst_mm, struct mm_struct *src_mm,
698
+
static unsigned long
699
+
copy_nonpresent_pte(struct mm_struct *dst_mm, struct mm_struct *src_mm,
700
700
pte_t *dst_pte, pte_t *src_pte, struct vm_area_struct *vma,
701
701
unsigned long addr, int *rss)
702
702
{
703
703
unsigned long vm_flags = vma->vm_flags;
704
704
pte_t pte = *src_pte;
705
705
struct page *page;
706
+
swp_entry_t entry = pte_to_swp_entry(pte);
706
707
707
-
/* pte contains position in swap or file, so copy. */
708
-
if (unlikely(!pte_present(pte))) {
709
-
swp_entry_t entry = pte_to_swp_entry(pte);
708
+
if (likely(!non_swap_entry(entry))) {
709
+
if (swap_duplicate(entry) < 0)
710
+
return entry.val;
710
711
711
-
if (likely(!non_swap_entry(entry))) {
712
-
if (swap_duplicate(entry) < 0)
713
-
return entry.val;
714
-
715
-
/* make sure dst_mm is on swapoff's mmlist. */
716
-
if (unlikely(list_empty(&dst_mm->mmlist))) {
717
-
spin_lock(&mmlist_lock);
718
-
if (list_empty(&dst_mm->mmlist))
719
-
list_add(&dst_mm->mmlist,
720
-
&src_mm->mmlist);
721
-
spin_unlock(&mmlist_lock);
722
-
}
723
-
rss[MM_SWAPENTS]++;
724
-
} else if (is_migration_entry(entry)) {
725
-
page = migration_entry_to_page(entry);
726
-
727
-
rss[mm_counter(page)]++;
728
-
729
-
if (is_write_migration_entry(entry) &&
730
-
is_cow_mapping(vm_flags)) {
731
-
/*
732
-
* COW mappings require pages in both
733
-
* parent and child to be set to read.
734
-
*/
735
-
make_migration_entry_read(&entry);
736
-
pte = swp_entry_to_pte(entry);
737
-
if (pte_swp_soft_dirty(*src_pte))
738
-
pte = pte_swp_mksoft_dirty(pte);
739
-
if (pte_swp_uffd_wp(*src_pte))
740
-
pte = pte_swp_mkuffd_wp(pte);
741
-
set_pte_at(src_mm, addr, src_pte, pte);
742
-
}
743
-
} else if (is_device_private_entry(entry)) {
744
-
page = device_private_entry_to_page(entry);
745
-
746
-
/*
747
-
* Update rss count even for unaddressable pages, as
748
-
* they should treated just like normal pages in this
749
-
* respect.
750
-
*
751
-
* We will likely want to have some new rss counters
752
-
* for unaddressable pages, at some point. But for now
753
-
* keep things as they are.
754
-
*/
755
-
get_page(page);
756
-
rss[mm_counter(page)]++;
757
-
page_dup_rmap(page, false);
758
-
759
-
/*
760
-
* We do not preserve soft-dirty information, because so
761
-
* far, checkpoint/restore is the only feature that
762
-
* requires that. And checkpoint/restore does not work
763
-
* when a device driver is involved (you cannot easily
764
-
* save and restore device driver state).
765
-
*/
766
-
if (is_write_device_private_entry(entry) &&
767
-
is_cow_mapping(vm_flags)) {
768
-
make_device_private_entry_read(&entry);
769
-
pte = swp_entry_to_pte(entry);
770
-
if (pte_swp_uffd_wp(*src_pte))
771
-
pte = pte_swp_mkuffd_wp(pte);
772
-
set_pte_at(src_mm, addr, src_pte, pte);
773
-
}
712
+
/* make sure dst_mm is on swapoff's mmlist. */
713
+
if (unlikely(list_empty(&dst_mm->mmlist))) {
714
+
spin_lock(&mmlist_lock);
715
+
if (list_empty(&dst_mm->mmlist))
716
+
list_add(&dst_mm->mmlist,
717
+
&src_mm->mmlist);
718
+
spin_unlock(&mmlist_lock);
774
719
}
775
-
goto out_set_pte;
720
+
rss[MM_SWAPENTS]++;
721
+
} else if (is_migration_entry(entry)) {
722
+
page = migration_entry_to_page(entry);
723
+
724
+
rss[mm_counter(page)]++;
725
+
726
+
if (is_write_migration_entry(entry) &&
727
+
is_cow_mapping(vm_flags)) {
728
+
/*
729
+
* COW mappings require pages in both
730
+
* parent and child to be set to read.
731
+
*/
732
+
make_migration_entry_read(&entry);
733
+
pte = swp_entry_to_pte(entry);
734
+
if (pte_swp_soft_dirty(*src_pte))
735
+
pte = pte_swp_mksoft_dirty(pte);
736
+
if (pte_swp_uffd_wp(*src_pte))
737
+
pte = pte_swp_mkuffd_wp(pte);
738
+
set_pte_at(src_mm, addr, src_pte, pte);
739
+
}
740
+
} else if (is_device_private_entry(entry)) {
741
+
page = device_private_entry_to_page(entry);
742
+
743
+
/*
744
+
* Update rss count even for unaddressable pages, as
745
+
* they should treated just like normal pages in this
746
+
* respect.
747
+
*
748
+
* We will likely want to have some new rss counters
749
+
* for unaddressable pages, at some point. But for now
750
+
* keep things as they are.
751
+
*/
752
+
get_page(page);
753
+
rss[mm_counter(page)]++;
754
+
page_dup_rmap(page, false);
755
+
756
+
/*
757
+
* We do not preserve soft-dirty information, because so
758
+
* far, checkpoint/restore is the only feature that
759
+
* requires that. And checkpoint/restore does not work
760
+
* when a device driver is involved (you cannot easily
761
+
* save and restore device driver state).
762
+
*/
763
+
if (is_write_device_private_entry(entry) &&
764
+
is_cow_mapping(vm_flags)) {
765
+
make_device_private_entry_read(&entry);
766
+
pte = swp_entry_to_pte(entry);
767
+
if (pte_swp_uffd_wp(*src_pte))
768
+
pte = pte_swp_mkuffd_wp(pte);
769
+
set_pte_at(src_mm, addr, src_pte, pte);
770
+
}
771
+
}
772
+
set_pte_at(dst_mm, addr, dst_pte, pte);
773
+
return 0;
774
+
}
775
+
776
+
/*
777
+
* Copy a present and normal page if necessary.
778
+
*
779
+
* NOTE! The usual case is that this doesn't need to do
780
+
* anything, and can just return a positive value. That
781
+
* will let the caller know that it can just increase
782
+
* the page refcount and re-use the pte the traditional
783
+
* way.
784
+
*
785
+
* But _if_ we need to copy it because it needs to be
786
+
* pinned in the parent (and the child should get its own
787
+
* copy rather than just a reference to the same page),
788
+
* we'll do that here and return zero to let the caller
789
+
* know we're done.
790
+
*
791
+
* And if we need a pre-allocated page but don't yet have
792
+
* one, return a negative error to let the preallocation
793
+
* code know so that it can do so outside the page table
794
+
* lock.
795
+
*/
796
+
static inline int
797
+
copy_present_page(struct mm_struct *dst_mm, struct mm_struct *src_mm,
798
+
pte_t *dst_pte, pte_t *src_pte,
799
+
struct vm_area_struct *vma, struct vm_area_struct *new,
800
+
unsigned long addr, int *rss, struct page **prealloc,
801
+
pte_t pte, struct page *page)
802
+
{
803
+
struct page *new_page;
804
+
805
+
if (!is_cow_mapping(vma->vm_flags))
806
+
return 1;
807
+
808
+
/*
809
+
* The trick starts.
810
+
*
811
+
* What we want to do is to check whether this page may
812
+
* have been pinned by the parent process. If so,
813
+
* instead of wrprotect the pte on both sides, we copy
814
+
* the page immediately so that we'll always guarantee
815
+
* the pinned page won't be randomly replaced in the
816
+
* future.
817
+
*
818
+
* To achieve this, we do the following:
819
+
*
820
+
* 1. Write-protect the pte if it's writable. This is
821
+
* to protect concurrent write fast-gup with
822
+
* FOLL_PIN, so that we'll fail the fast-gup with
823
+
* the write bit removed.
824
+
*
825
+
* 2. Check page_maybe_dma_pinned() to see whether this
826
+
* page may have been pinned.
827
+
*
828
+
* The order of these steps is important to serialize
829
+
* against the fast-gup code (gup_pte_range()) on the
830
+
* pte check and try_grab_compound_head(), so that
831
+
* we'll make sure either we'll capture that fast-gup
832
+
* so we'll copy the pinned page here, or we'll fail
833
+
* that fast-gup.
834
+
*
835
+
* NOTE! Even if we don't end up copying the page,
836
+
* we won't undo this wrprotect(), because the normal
837
+
* reference copy will need it anyway.
838
+
*/
839
+
if (pte_write(pte))
840
+
ptep_set_wrprotect(src_mm, addr, src_pte);
841
+
842
+
/*
843
+
* These are the "normally we can just copy by reference"
844
+
* checks.
845
+
*/
846
+
if (likely(!atomic_read(&src_mm->has_pinned)))
847
+
return 1;
848
+
if (likely(!page_maybe_dma_pinned(page)))
849
+
return 1;
850
+
851
+
/*
852
+
* Uhhuh. It looks like the page might be a pinned page,
853
+
* and we actually need to copy it. Now we can set the
854
+
* source pte back to being writable.
855
+
*/
856
+
if (pte_write(pte))
857
+
set_pte_at(src_mm, addr, src_pte, pte);
858
+
859
+
new_page = *prealloc;
860
+
if (!new_page)
861
+
return -EAGAIN;
862
+
863
+
/*
864
+
* We have a prealloc page, all good! Take it
865
+
* over and copy the page & arm it.
866
+
*/
867
+
*prealloc = NULL;
868
+
copy_user_highpage(new_page, page, addr, vma);
869
+
__SetPageUptodate(new_page);
870
+
page_add_new_anon_rmap(new_page, new, addr, false);
871
+
lru_cache_add_inactive_or_unevictable(new_page, new);
872
+
rss[mm_counter(new_page)]++;
873
+
874
+
/* All done, just insert the new page copy in the child */
875
+
pte = mk_pte(new_page, new->vm_page_prot);
876
+
pte = maybe_mkwrite(pte_mkdirty(pte), new);
877
+
set_pte_at(dst_mm, addr, dst_pte, pte);
878
+
return 0;
879
+
}
880
+
881
+
/*
882
+
* Copy one pte. Returns 0 if succeeded, or -EAGAIN if one preallocated page
883
+
* is required to copy this pte.
884
+
*/
885
+
static inline int
886
+
copy_present_pte(struct mm_struct *dst_mm, struct mm_struct *src_mm,
887
+
pte_t *dst_pte, pte_t *src_pte, struct vm_area_struct *vma,
888
+
struct vm_area_struct *new,
889
+
unsigned long addr, int *rss, struct page **prealloc)
890
+
{
891
+
unsigned long vm_flags = vma->vm_flags;
892
+
pte_t pte = *src_pte;
893
+
struct page *page;
894
+
895
+
page = vm_normal_page(vma, addr, pte);
896
+
if (page) {
897
+
int retval;
898
+
899
+
retval = copy_present_page(dst_mm, src_mm,
900
+
dst_pte, src_pte,
901
+
vma, new,
902
+
addr, rss, prealloc,
903
+
pte, page);
904
+
if (retval <= 0)
905
+
return retval;
906
+
907
+
get_page(page);
908
+
page_dup_rmap(page, false);
909
+
rss[mm_counter(page)]++;
776
910
}
777
911
778
912
/*
···
934
800
if (!(vm_flags & VM_UFFD_WP))
935
801
pte = pte_clear_uffd_wp(pte);
936
802
937
-
page = vm_normal_page(vma, addr, pte);
938
-
if (page) {
939
-
get_page(page);
940
-
page_dup_rmap(page, false);
941
-
rss[mm_counter(page)]++;
942
-
}
943
-
944
-
out_set_pte:
945
803
set_pte_at(dst_mm, addr, dst_pte, pte);
946
804
return 0;
947
805
}
948
806
807
+
static inline struct page *
808
+
page_copy_prealloc(struct mm_struct *src_mm, struct vm_area_struct *vma,
809
+
unsigned long addr)
810
+
{
811
+
struct page *new_page;
812
+
813
+
new_page = alloc_page_vma(GFP_HIGHUSER_MOVABLE, vma, addr);
814
+
if (!new_page)
815
+
return NULL;
816
+
817
+
if (mem_cgroup_charge(new_page, src_mm, GFP_KERNEL)) {
818
+
put_page(new_page);
819
+
return NULL;
820
+
}
821
+
cgroup_throttle_swaprate(new_page, GFP_KERNEL);
822
+
823
+
return new_page;
824
+
}
825
+
949
826
static int copy_pte_range(struct mm_struct *dst_mm, struct mm_struct *src_mm,
950
827
pmd_t *dst_pmd, pmd_t *src_pmd, struct vm_area_struct *vma,
828
+
struct vm_area_struct *new,
951
829
unsigned long addr, unsigned long end)
952
830
{
953
831
pte_t *orig_src_pte, *orig_dst_pte;
954
832
pte_t *src_pte, *dst_pte;
955
833
spinlock_t *src_ptl, *dst_ptl;
956
-
int progress = 0;
834
+
int progress, ret = 0;
957
835
int rss[NR_MM_COUNTERS];
958
836
swp_entry_t entry = (swp_entry_t){0};
837
+
struct page *prealloc = NULL;
959
838
960
839
again:
840
+
progress = 0;
961
841
init_rss_vec(rss);
962
842
963
843
dst_pte = pte_alloc_map_lock(dst_mm, dst_pmd, addr, &dst_ptl);
964
-
if (!dst_pte)
965
-
return -ENOMEM;
844
+
if (!dst_pte) {
845
+
ret = -ENOMEM;
846
+
goto out;
847
+
}
966
848
src_pte = pte_offset_map(src_pmd, addr);
967
849
src_ptl = pte_lockptr(src_mm, src_pmd);
968
850
spin_lock_nested(src_ptl, SINGLE_DEPTH_NESTING);
···
1001
851
progress++;
1002
852
continue;
1003
853
}
1004
-
entry.val = copy_one_pte(dst_mm, src_mm, dst_pte, src_pte,
854
+
if (unlikely(!pte_present(*src_pte))) {
855
+
entry.val = copy_nonpresent_pte(dst_mm, src_mm,
856
+
dst_pte, src_pte,
1005
857
vma, addr, rss);
1006
-
if (entry.val)
858
+
if (entry.val)
859
+
break;
860
+
progress += 8;
861
+
continue;
862
+
}
863
+
/* copy_present_pte() will clear `*prealloc' if consumed */
864
+
ret = copy_present_pte(dst_mm, src_mm, dst_pte, src_pte,
865
+
vma, new, addr, rss, &prealloc);
866
+
/*
867
+
* If we need a pre-allocated page for this pte, drop the
868
+
* locks, allocate, and try again.
869
+
*/
870
+
if (unlikely(ret == -EAGAIN))
1007
871
break;
872
+
if (unlikely(prealloc)) {
873
+
/*
874
+
* pre-alloc page cannot be reused by next time so as
875
+
* to strictly follow mempolicy (e.g., alloc_page_vma()
876
+
* will allocate page according to address). This
877
+
* could only happen if one pinned pte changed.
878
+
*/
879
+
put_page(prealloc);
880
+
prealloc = NULL;
881
+
}
1008
882
progress += 8;
1009
883
} while (dst_pte++, src_pte++, addr += PAGE_SIZE, addr != end);
1010
884
···
1040
866
cond_resched();
1041
867
1042
868
if (entry.val) {
1043
-
if (add_swap_count_continuation(entry, GFP_KERNEL) < 0)
869
+
if (add_swap_count_continuation(entry, GFP_KERNEL) < 0) {
870
+
ret = -ENOMEM;
871
+
goto out;
872
+
}
873
+
entry.val = 0;
874
+
} else if (ret) {
875
+
WARN_ON_ONCE(ret != -EAGAIN);
876
+
prealloc = page_copy_prealloc(src_mm, vma, addr);
877
+
if (!prealloc)
1044
878
return -ENOMEM;
1045
-
progress = 0;
879
+
/* We've captured and resolved the error. Reset, try again. */
880
+
ret = 0;
1046
881
}
1047
882
if (addr != end)
1048
883
goto again;
1049
-
return 0;
884
+
out:
885
+
if (unlikely(prealloc))
886
+
put_page(prealloc);
887
+
return ret;
1050
888
}
1051
889
1052
890
static inline int copy_pmd_range(struct mm_struct *dst_mm, struct mm_struct *src_mm,
1053
891
pud_t *dst_pud, pud_t *src_pud, struct vm_area_struct *vma,
892
+
struct vm_area_struct *new,
1054
893
unsigned long addr, unsigned long end)
1055
894
{
1056
895
pmd_t *src_pmd, *dst_pmd;
···
1090
903
if (pmd_none_or_clear_bad(src_pmd))
1091
904
continue;
1092
905
if (copy_pte_range(dst_mm, src_mm, dst_pmd, src_pmd,
1093
-
vma, addr, next))
906
+
vma, new, addr, next))
1094
907
return -ENOMEM;
1095
908
} while (dst_pmd++, src_pmd++, addr = next, addr != end);
1096
909
return 0;
···
1098
911
1099
912
static inline int copy_pud_range(struct mm_struct *dst_mm, struct mm_struct *src_mm,
1100
913
p4d_t *dst_p4d, p4d_t *src_p4d, struct vm_area_struct *vma,
914
+
struct vm_area_struct *new,
1101
915
unsigned long addr, unsigned long end)
1102
916
{
1103
917
pud_t *src_pud, *dst_pud;
···
1125
937
if (pud_none_or_clear_bad(src_pud))
1126
938
continue;
1127
939
if (copy_pmd_range(dst_mm, src_mm, dst_pud, src_pud,
1128
-
vma, addr, next))
940
+
vma, new, addr, next))
1129
941
return -ENOMEM;
1130
942
} while (dst_pud++, src_pud++, addr = next, addr != end);
1131
943
return 0;
···
1133
945
1134
946
static inline int copy_p4d_range(struct mm_struct *dst_mm, struct mm_struct *src_mm,
1135
947
pgd_t *dst_pgd, pgd_t *src_pgd, struct vm_area_struct *vma,
948
+
struct vm_area_struct *new,
1136
949
unsigned long addr, unsigned long end)
1137
950
{
1138
951
p4d_t *src_p4d, *dst_p4d;
···
1148
959
if (p4d_none_or_clear_bad(src_p4d))
1149
960
continue;
1150
961
if (copy_pud_range(dst_mm, src_mm, dst_p4d, src_p4d,
1151
-
vma, addr, next))
962
+
vma, new, addr, next))
1152
963
return -ENOMEM;
1153
964
} while (dst_p4d++, src_p4d++, addr = next, addr != end);
1154
965
return 0;
1155
966
}
1156
967
1157
968
int copy_page_range(struct mm_struct *dst_mm, struct mm_struct *src_mm,
1158
-
struct vm_area_struct *vma)
969
+
struct vm_area_struct *vma, struct vm_area_struct *new)
1159
970
{
1160
971
pgd_t *src_pgd, *dst_pgd;
1161
972
unsigned long next;
···
1210
1021
if (pgd_none_or_clear_bad(src_pgd))
1211
1022
continue;
1212
1023
if (unlikely(copy_p4d_range(dst_mm, src_mm, dst_pgd, src_pgd,
1213
-
vma, addr, next))) {
1024
+
vma, new, addr, next))) {
1214
1025
ret = -ENOMEM;
1215
1026
break;
1216
1027
}
···
3144
2955
* page count reference, and the page is locked,
3145
2956
* it's dark out, and we're wearing sunglasses. Hit it.
3146
2957
*/
3147
-
wp_page_reuse(vmf);
3148
2958
unlock_page(page);
2959
+
wp_page_reuse(vmf);
3149
2960
return VM_FAULT_WRITE;
3150
2961
} else if (unlikely((vma->vm_flags & (VM_WRITE|VM_SHARED)) ==
3151
2962
(VM_WRITE|VM_SHARED))) {
+3
-2
mm/memory_hotplug.c
+3
-2
mm/memory_hotplug.c
···
729
729
* are reserved so nobody should be touching them so we should be safe
730
730
*/
731
731
memmap_init_zone(nr_pages, nid, zone_idx(zone), start_pfn,
732
-
MEMMAP_HOTPLUG, altmap);
732
+
MEMINIT_HOTPLUG, altmap);
733
733
734
734
set_zone_contiguous(zone);
735
735
}
···
1080
1080
}
1081
1081
1082
1082
/* link memory sections under this node.*/
1083
-
ret = link_mem_sections(nid, PFN_DOWN(start), PFN_UP(start + size - 1));
1083
+
ret = link_mem_sections(nid, PFN_DOWN(start), PFN_UP(start + size - 1),
1084
+
MEMINIT_HOTPLUG);
1084
1085
BUG_ON(ret);
1085
1086
1086
1087
/* create new memmap entry */
+3
-4
mm/migrate.c
+3
-4
mm/migrate.c
···
1446
1446
* Capture required information that might get lost
1447
1447
* during migration.
1448
1448
*/
1449
-
is_thp = PageTransHuge(page);
1449
+
is_thp = PageTransHuge(page) && !PageHuge(page);
1450
1450
nr_subpages = thp_nr_pages(page);
1451
1451
cond_resched();
1452
1452
···
1472
1472
* we encounter them after the rest of the list
1473
1473
* is processed.
1474
1474
*/
1475
-
if (PageTransHuge(page) && !PageHuge(page)) {
1475
+
if (is_thp) {
1476
1476
lock_page(page);
1477
1477
rc = split_huge_page_to_list(page, from);
1478
1478
unlock_page(page);
···
1481
1481
nr_thp_split++;
1482
1482
goto retry;
1483
1483
}
1484
-
}
1485
-
if (is_thp) {
1484
+
1486
1485
nr_thp_failed++;
1487
1486
nr_failed += nr_subpages;
1488
1487
goto out;
+21
-8
mm/page_alloc.c
+21
-8
mm/page_alloc.c
···
3367
3367
struct page *page;
3368
3368
3369
3369
if (likely(order == 0)) {
3370
-
page = rmqueue_pcplist(preferred_zone, zone, gfp_flags,
3370
+
/*
3371
+
* MIGRATE_MOVABLE pcplist could have the pages on CMA area and
3372
+
* we need to skip it when CMA area isn't allowed.
3373
+
*/
3374
+
if (!IS_ENABLED(CONFIG_CMA) || alloc_flags & ALLOC_CMA ||
3375
+
migratetype != MIGRATE_MOVABLE) {
3376
+
page = rmqueue_pcplist(preferred_zone, zone, gfp_flags,
3371
3377
migratetype, alloc_flags);
3372
-
goto out;
3378
+
goto out;
3379
+
}
3373
3380
}
3374
3381
3375
3382
/*
···
3388
3381
3389
3382
do {
3390
3383
page = NULL;
3391
-
if (alloc_flags & ALLOC_HARDER) {
3384
+
/*
3385
+
* order-0 request can reach here when the pcplist is skipped
3386
+
* due to non-CMA allocation context. HIGHATOMIC area is
3387
+
* reserved for high-order atomic allocation, so order-0
3388
+
* request should skip it.
3389
+
*/
3390
+
if (order > 0 && alloc_flags & ALLOC_HARDER) {
3392
3391
page = __rmqueue_smallest(zone, order, MIGRATE_HIGHATOMIC);
3393
3392
if (page)
3394
3393
trace_mm_page_alloc_zone_locked(page, order, migratetype);
···
5988
5975
* done. Non-atomic initialization, single-pass.
5989
5976
*/
5990
5977
void __meminit memmap_init_zone(unsigned long size, int nid, unsigned long zone,
5991
-
unsigned long start_pfn, enum memmap_context context,
5978
+
unsigned long start_pfn, enum meminit_context context,
5992
5979
struct vmem_altmap *altmap)
5993
5980
{
5994
5981
unsigned long pfn, end_pfn = start_pfn + size;
···
6020
6007
* There can be holes in boot-time mem_map[]s handed to this
6021
6008
* function. They do not exist on hotplugged memory.
6022
6009
*/
6023
-
if (context == MEMMAP_EARLY) {
6010
+
if (context == MEMINIT_EARLY) {
6024
6011
if (overlap_memmap_init(zone, &pfn))
6025
6012
continue;
6026
6013
if (defer_init(nid, pfn, end_pfn))
···
6029
6016
6030
6017
page = pfn_to_page(pfn);
6031
6018
__init_single_page(page, pfn, zone, nid);
6032
-
if (context == MEMMAP_HOTPLUG)
6019
+
if (context == MEMINIT_HOTPLUG)
6033
6020
__SetPageReserved(page);
6034
6021
6035
6022
/*
···
6112
6099
* check here not to call set_pageblock_migratetype() against
6113
6100
* pfn out of zone.
6114
6101
*
6115
-
* Please note that MEMMAP_HOTPLUG path doesn't clear memmap
6102
+
* Please note that MEMINIT_HOTPLUG path doesn't clear memmap
6116
6103
* because this is done early in section_activate()
6117
6104
*/
6118
6105
if (!(pfn & (pageblock_nr_pages - 1))) {
···
6150
6137
if (end_pfn > start_pfn) {
6151
6138
size = end_pfn - start_pfn;
6152
6139
memmap_init_zone(size, nid, zone, start_pfn,
6153
-
MEMMAP_EARLY, NULL);
6140
+
MEMINIT_EARLY, NULL);
6154
6141
}
6155
6142
}
6156
6143
}
+6
-2
mm/slab.c
+6
-2
mm/slab.c
···
1632
1632
kmem_cache_free(cachep->freelist_cache, freelist);
1633
1633
}
1634
1634
1635
+
/*
1636
+
* Update the size of the caches before calling slabs_destroy as it may
1637
+
* recursively call kfree.
1638
+
*/
1635
1639
static void slabs_destroy(struct kmem_cache *cachep, struct list_head *list)
1636
1640
{
1637
1641
struct page *page, *n;
···
2157
2153
spin_lock(&n->list_lock);
2158
2154
free_block(cachep, ac->entry, ac->avail, node, &list);
2159
2155
spin_unlock(&n->list_lock);
2160
-
slabs_destroy(cachep, &list);
2161
2156
ac->avail = 0;
2157
+
slabs_destroy(cachep, &list);
2162
2158
}
2163
2159
2164
2160
static void drain_cpu_caches(struct kmem_cache *cachep)
···
3406
3402
}
3407
3403
#endif
3408
3404
spin_unlock(&n->list_lock);
3409
-
slabs_destroy(cachep, &list);
3410
3405
ac->avail -= batchcount;
3411
3406
memmove(ac->entry, &(ac->entry[batchcount]), sizeof(void *)*ac->avail);
3407
+
slabs_destroy(cachep, &list);
3412
3408
}
3413
3409
3414
3410
/*
+1
-5
mm/slub.c
+1
-5
mm/slub.c
···
1413
1413
char *next_block;
1414
1414
slab_flags_t block_flags;
1415
1415
1416
-
/* If slub_debug = 0, it folds into the if conditional. */
1417
-
if (!slub_debug_string)
1418
-
return flags | slub_debug;
1419
-
1420
1416
len = strlen(name);
1421
1417
next_block = slub_debug_string;
1422
1418
/* Go through all blocks of debug options, see if any matches our slab's name */
···
1446
1450
}
1447
1451
}
1448
1452
1449
-
return slub_debug;
1453
+
return flags | slub_debug;
1450
1454
}
1451
1455
#else /* !CONFIG_SLUB_DEBUG */
1452
1456
static inline void setup_object_debug(struct kmem_cache *s,
+1
-1
mm/swapfile.c
+1
-1
mm/swapfile.c
+18
-8
net/bridge/br_arp_nd_proxy.c
+18
-8
net/bridge/br_arp_nd_proxy.c
···
88
88
}
89
89
}
90
90
91
-
static int br_chk_addr_ip(struct net_device *dev, void *data)
91
+
static int br_chk_addr_ip(struct net_device *dev,
92
+
struct netdev_nested_priv *priv)
92
93
{
93
-
__be32 ip = *(__be32 *)data;
94
+
__be32 ip = *(__be32 *)priv->data;
94
95
struct in_device *in_dev;
95
96
__be32 addr = 0;
96
97
···
108
107
109
108
static bool br_is_local_ip(struct net_device *dev, __be32 ip)
110
109
{
111
-
if (br_chk_addr_ip(dev, &ip))
110
+
struct netdev_nested_priv priv = {
111
+
.data = (void *)&ip,
112
+
};
113
+
114
+
if (br_chk_addr_ip(dev, &priv))
112
115
return true;
113
116
114
117
/* check if ip is configured on upper dev */
115
-
if (netdev_walk_all_upper_dev_rcu(dev, br_chk_addr_ip, &ip))
118
+
if (netdev_walk_all_upper_dev_rcu(dev, br_chk_addr_ip, &priv))
116
119
return true;
117
120
118
121
return false;
···
366
361
}
367
362
}
368
363
369
-
static int br_chk_addr_ip6(struct net_device *dev, void *data)
364
+
static int br_chk_addr_ip6(struct net_device *dev,
365
+
struct netdev_nested_priv *priv)
370
366
{
371
-
struct in6_addr *addr = (struct in6_addr *)data;
367
+
struct in6_addr *addr = (struct in6_addr *)priv->data;
372
368
373
369
if (ipv6_chk_addr(dev_net(dev), addr, dev, 0))
374
370
return 1;
···
380
374
static bool br_is_local_ip6(struct net_device *dev, struct in6_addr *addr)
381
375
382
376
{
383
-
if (br_chk_addr_ip6(dev, addr))
377
+
struct netdev_nested_priv priv = {
378
+
.data = (void *)addr,
379
+
};
380
+
381
+
if (br_chk_addr_ip6(dev, &priv))
384
382
return true;
385
383
386
384
/* check if ip is configured on upper dev */
387
-
if (netdev_walk_all_upper_dev_rcu(dev, br_chk_addr_ip6, addr))
385
+
if (netdev_walk_all_upper_dev_rcu(dev, br_chk_addr_ip6, &priv))
388
386
return true;
389
387
390
388
return false;
+2
net/bridge/br_fdb.c
+2
net/bridge/br_fdb.c
+13
-7
net/bridge/br_vlan.c
+13
-7
net/bridge/br_vlan.c
···
1360
1360
}
1361
1361
1362
1362
static int br_vlan_is_bind_vlan_dev_fn(struct net_device *dev,
1363
-
__always_unused void *data)
1363
+
__always_unused struct netdev_nested_priv *priv)
1364
1364
{
1365
1365
return br_vlan_is_bind_vlan_dev(dev);
1366
1366
}
···
1383
1383
};
1384
1384
1385
1385
static int br_vlan_match_bind_vlan_dev_fn(struct net_device *dev,
1386
-
void *data_in)
1386
+
struct netdev_nested_priv *priv)
1387
1387
{
1388
-
struct br_vlan_bind_walk_data *data = data_in;
1388
+
struct br_vlan_bind_walk_data *data = priv->data;
1389
1389
int found = 0;
1390
1390
1391
1391
if (br_vlan_is_bind_vlan_dev(dev) &&
···
1403
1403
struct br_vlan_bind_walk_data data = {
1404
1404
.vid = vid,
1405
1405
};
1406
+
struct netdev_nested_priv priv = {
1407
+
.data = (void *)&data,
1408
+
};
1406
1409
1407
1410
rcu_read_lock();
1408
1411
netdev_walk_all_upper_dev_rcu(dev, br_vlan_match_bind_vlan_dev_fn,
1409
-
&data);
1412
+
&priv);
1410
1413
rcu_read_unlock();
1411
1414
1412
1415
return data.result;
···
1490
1487
};
1491
1488
1492
1489
static int br_vlan_link_state_change_fn(struct net_device *vlan_dev,
1493
-
void *data_in)
1490
+
struct netdev_nested_priv *priv)
1494
1491
{
1495
-
struct br_vlan_link_state_walk_data *data = data_in;
1492
+
struct br_vlan_link_state_walk_data *data = priv->data;
1496
1493
1497
1494
if (br_vlan_is_bind_vlan_dev(vlan_dev))
1498
1495
br_vlan_set_vlan_dev_state(data->br, vlan_dev);
···
1506
1503
struct br_vlan_link_state_walk_data data = {
1507
1504
.br = br
1508
1505
};
1506
+
struct netdev_nested_priv priv = {
1507
+
.data = (void *)&data,
1508
+
};
1509
1509
1510
1510
rcu_read_lock();
1511
1511
netdev_walk_all_upper_dev_rcu(dev, br_vlan_link_state_change_fn,
1512
-
&data);
1512
+
&priv);
1513
1513
rcu_read_unlock();
1514
1514
}
1515
1515
+1
-1
net/ceph/messenger.c
+1
-1
net/ceph/messenger.c
···
575
575
* coalescing neighboring slab objects into a single frag which
576
576
* triggers one of hardened usercopy checks.
577
577
*/
578
-
if (page_count(page) >= 1 && !PageSlab(page))
578
+
if (sendpage_ok(page))
579
579
sendpage = sock->ops->sendpage;
580
580
else
581
581
sendpage = sock_no_sendpage;
+122
-42
net/core/dev.c
+122
-42
net/core/dev.c
···
6874
6874
return NULL;
6875
6875
}
6876
6876
6877
-
static int ____netdev_has_upper_dev(struct net_device *upper_dev, void *data)
6877
+
static int ____netdev_has_upper_dev(struct net_device *upper_dev,
6878
+
struct netdev_nested_priv *priv)
6878
6879
{
6879
-
struct net_device *dev = data;
6880
+
struct net_device *dev = (struct net_device *)priv->data;
6880
6881
6881
6882
return upper_dev == dev;
6882
6883
}
···
6894
6893
bool netdev_has_upper_dev(struct net_device *dev,
6895
6894
struct net_device *upper_dev)
6896
6895
{
6896
+
struct netdev_nested_priv priv = {
6897
+
.data = (void *)upper_dev,
6898
+
};
6899
+
6897
6900
ASSERT_RTNL();
6898
6901
6899
6902
return netdev_walk_all_upper_dev_rcu(dev, ____netdev_has_upper_dev,
6900
-
upper_dev);
6903
+
&priv);
6901
6904
}
6902
6905
EXPORT_SYMBOL(netdev_has_upper_dev);
6903
6906
···
6918
6913
bool netdev_has_upper_dev_all_rcu(struct net_device *dev,
6919
6914
struct net_device *upper_dev)
6920
6915
{
6916
+
struct netdev_nested_priv priv = {
6917
+
.data = (void *)upper_dev,
6918
+
};
6919
+
6921
6920
return !!netdev_walk_all_upper_dev_rcu(dev, ____netdev_has_upper_dev,
6922
-
upper_dev);
6921
+
&priv);
6923
6922
}
6924
6923
EXPORT_SYMBOL(netdev_has_upper_dev_all_rcu);
6925
6924
···
7068
7059
7069
7060
static int __netdev_walk_all_upper_dev(struct net_device *dev,
7070
7061
int (*fn)(struct net_device *dev,
7071
-
void *data),
7072
-
void *data)
7062
+
struct netdev_nested_priv *priv),
7063
+
struct netdev_nested_priv *priv)
7073
7064
{
7074
7065
struct net_device *udev, *next, *now, *dev_stack[MAX_NEST_DEV + 1];
7075
7066
struct list_head *niter, *iter, *iter_stack[MAX_NEST_DEV + 1];
···
7081
7072
7082
7073
while (1) {
7083
7074
if (now != dev) {
7084
-
ret = fn(now, data);
7075
+
ret = fn(now, priv);
7085
7076
if (ret)
7086
7077
return ret;
7087
7078
}
···
7117
7108
7118
7109
int netdev_walk_all_upper_dev_rcu(struct net_device *dev,
7119
7110
int (*fn)(struct net_device *dev,
7120
-
void *data),
7121
-
void *data)
7111
+
struct netdev_nested_priv *priv),
7112
+
struct netdev_nested_priv *priv)
7122
7113
{
7123
7114
struct net_device *udev, *next, *now, *dev_stack[MAX_NEST_DEV + 1];
7124
7115
struct list_head *niter, *iter, *iter_stack[MAX_NEST_DEV + 1];
···
7129
7120
7130
7121
while (1) {
7131
7122
if (now != dev) {
7132
-
ret = fn(now, data);
7123
+
ret = fn(now, priv);
7133
7124
if (ret)
7134
7125
return ret;
7135
7126
}
···
7165
7156
static bool __netdev_has_upper_dev(struct net_device *dev,
7166
7157
struct net_device *upper_dev)
7167
7158
{
7159
+
struct netdev_nested_priv priv = {
7160
+
.flags = 0,
7161
+
.data = (void *)upper_dev,
7162
+
};
7163
+
7168
7164
ASSERT_RTNL();
7169
7165
7170
7166
return __netdev_walk_all_upper_dev(dev, ____netdev_has_upper_dev,
7171
-
upper_dev);
7167
+
&priv);
7172
7168
}
7173
7169
7174
7170
/**
···
7291
7277
7292
7278
int netdev_walk_all_lower_dev(struct net_device *dev,
7293
7279
int (*fn)(struct net_device *dev,
7294
-
void *data),
7295
-
void *data)
7280
+
struct netdev_nested_priv *priv),
7281
+
struct netdev_nested_priv *priv)
7296
7282
{
7297
7283
struct net_device *ldev, *next, *now, *dev_stack[MAX_NEST_DEV + 1];
7298
7284
struct list_head *niter, *iter, *iter_stack[MAX_NEST_DEV + 1];
···
7303
7289
7304
7290
while (1) {
7305
7291
if (now != dev) {
7306
-
ret = fn(now, data);
7292
+
ret = fn(now, priv);
7307
7293
if (ret)
7308
7294
return ret;
7309
7295
}
···
7338
7324
7339
7325
static int __netdev_walk_all_lower_dev(struct net_device *dev,
7340
7326
int (*fn)(struct net_device *dev,
7341
-
void *data),
7342
-
void *data)
7327
+
struct netdev_nested_priv *priv),
7328
+
struct netdev_nested_priv *priv)
7343
7329
{
7344
7330
struct net_device *ldev, *next, *now, *dev_stack[MAX_NEST_DEV + 1];
7345
7331
struct list_head *niter, *iter, *iter_stack[MAX_NEST_DEV + 1];
···
7351
7337
7352
7338
while (1) {
7353
7339
if (now != dev) {
7354
-
ret = fn(now, data);
7340
+
ret = fn(now, priv);
7355
7341
if (ret)
7356
7342
return ret;
7357
7343
}
···
7440
7426
return max_depth;
7441
7427
}
7442
7428
7443
-
static int __netdev_update_upper_level(struct net_device *dev, void *data)
7429
+
static int __netdev_update_upper_level(struct net_device *dev,
7430
+
struct netdev_nested_priv *__unused)
7444
7431
{
7445
7432
dev->upper_level = __netdev_upper_depth(dev) + 1;
7446
7433
return 0;
7447
7434
}
7448
7435
7449
-
static int __netdev_update_lower_level(struct net_device *dev, void *data)
7436
+
static int __netdev_update_lower_level(struct net_device *dev,
7437
+
struct netdev_nested_priv *priv)
7450
7438
{
7451
7439
dev->lower_level = __netdev_lower_depth(dev) + 1;
7440
+
7441
+
#ifdef CONFIG_LOCKDEP
7442
+
if (!priv)
7443
+
return 0;
7444
+
7445
+
if (priv->flags & NESTED_SYNC_IMM)
7446
+
dev->nested_level = dev->lower_level - 1;
7447
+
if (priv->flags & NESTED_SYNC_TODO)
7448
+
net_unlink_todo(dev);
7449
+
#endif
7452
7450
return 0;
7453
7451
}
7454
7452
7455
7453
int netdev_walk_all_lower_dev_rcu(struct net_device *dev,
7456
7454
int (*fn)(struct net_device *dev,
7457
-
void *data),
7458
-
void *data)
7455
+
struct netdev_nested_priv *priv),
7456
+
struct netdev_nested_priv *priv)
7459
7457
{
7460
7458
struct net_device *ldev, *next, *now, *dev_stack[MAX_NEST_DEV + 1];
7461
7459
struct list_head *niter, *iter, *iter_stack[MAX_NEST_DEV + 1];
···
7478
7452
7479
7453
while (1) {
7480
7454
if (now != dev) {
7481
-
ret = fn(now, data);
7455
+
ret = fn(now, priv);
7482
7456
if (ret)
7483
7457
return ret;
7484
7458
}
···
7738
7712
static int __netdev_upper_dev_link(struct net_device *dev,
7739
7713
struct net_device *upper_dev, bool master,
7740
7714
void *upper_priv, void *upper_info,
7715
+
struct netdev_nested_priv *priv,
7741
7716
struct netlink_ext_ack *extack)
7742
7717
{
7743
7718
struct netdev_notifier_changeupper_info changeupper_info = {
···
7795
7768
__netdev_update_upper_level(dev, NULL);
7796
7769
__netdev_walk_all_lower_dev(dev, __netdev_update_upper_level, NULL);
7797
7770
7798
-
__netdev_update_lower_level(upper_dev, NULL);
7771
+
__netdev_update_lower_level(upper_dev, priv);
7799
7772
__netdev_walk_all_upper_dev(upper_dev, __netdev_update_lower_level,
7800
-
NULL);
7773
+
priv);
7801
7774
7802
7775
return 0;
7803
7776
···
7822
7795
struct net_device *upper_dev,
7823
7796
struct netlink_ext_ack *extack)
7824
7797
{
7798
+
struct netdev_nested_priv priv = {
7799
+
.flags = NESTED_SYNC_IMM | NESTED_SYNC_TODO,
7800
+
.data = NULL,
7801
+
};
7802
+
7825
7803
return __netdev_upper_dev_link(dev, upper_dev, false,
7826
-
NULL, NULL, extack);
7804
+
NULL, NULL, &priv, extack);
7827
7805
}
7828
7806
EXPORT_SYMBOL(netdev_upper_dev_link);
7829
7807
···
7851
7819
void *upper_priv, void *upper_info,
7852
7820
struct netlink_ext_ack *extack)
7853
7821
{
7822
+
struct netdev_nested_priv priv = {
7823
+
.flags = NESTED_SYNC_IMM | NESTED_SYNC_TODO,
7824
+
.data = NULL,
7825
+
};
7826
+
7854
7827
return __netdev_upper_dev_link(dev, upper_dev, true,
7855
-
upper_priv, upper_info, extack);
7828
+
upper_priv, upper_info, &priv, extack);
7856
7829
}
7857
7830
EXPORT_SYMBOL(netdev_master_upper_dev_link);
7858
7831
7859
-
/**
7860
-
* netdev_upper_dev_unlink - Removes a link to upper device
7861
-
* @dev: device
7862
-
* @upper_dev: new upper device
7863
-
*
7864
-
* Removes a link to device which is upper to this one. The caller must hold
7865
-
* the RTNL lock.
7866
-
*/
7867
-
void netdev_upper_dev_unlink(struct net_device *dev,
7868
-
struct net_device *upper_dev)
7832
+
static void __netdev_upper_dev_unlink(struct net_device *dev,
7833
+
struct net_device *upper_dev,
7834
+
struct netdev_nested_priv *priv)
7869
7835
{
7870
7836
struct netdev_notifier_changeupper_info changeupper_info = {
7871
7837
.info = {
···
7888
7858
__netdev_update_upper_level(dev, NULL);
7889
7859
__netdev_walk_all_lower_dev(dev, __netdev_update_upper_level, NULL);
7890
7860
7891
-
__netdev_update_lower_level(upper_dev, NULL);
7861
+
__netdev_update_lower_level(upper_dev, priv);
7892
7862
__netdev_walk_all_upper_dev(upper_dev, __netdev_update_lower_level,
7893
-
NULL);
7863
+
priv);
7864
+
}
7865
+
7866
+
/**
7867
+
* netdev_upper_dev_unlink - Removes a link to upper device
7868
+
* @dev: device
7869
+
* @upper_dev: new upper device
7870
+
*
7871
+
* Removes a link to device which is upper to this one. The caller must hold
7872
+
* the RTNL lock.
7873
+
*/
7874
+
void netdev_upper_dev_unlink(struct net_device *dev,
7875
+
struct net_device *upper_dev)
7876
+
{
7877
+
struct netdev_nested_priv priv = {
7878
+
.flags = NESTED_SYNC_TODO,
7879
+
.data = NULL,
7880
+
};
7881
+
7882
+
__netdev_upper_dev_unlink(dev, upper_dev, &priv);
7894
7883
}
7895
7884
EXPORT_SYMBOL(netdev_upper_dev_unlink);
7896
7885
···
7945
7896
struct net_device *dev,
7946
7897
struct netlink_ext_ack *extack)
7947
7898
{
7899
+
struct netdev_nested_priv priv = {
7900
+
.flags = 0,
7901
+
.data = NULL,
7902
+
};
7948
7903
int err;
7949
7904
7950
7905
if (!new_dev)
···
7956
7903
7957
7904
if (old_dev && new_dev != old_dev)
7958
7905
netdev_adjacent_dev_disable(dev, old_dev);
7959
-
7960
-
err = netdev_upper_dev_link(new_dev, dev, extack);
7906
+
err = __netdev_upper_dev_link(new_dev, dev, false, NULL, NULL, &priv,
7907
+
extack);
7961
7908
if (err) {
7962
7909
if (old_dev && new_dev != old_dev)
7963
7910
netdev_adjacent_dev_enable(dev, old_dev);
···
7972
7919
struct net_device *new_dev,
7973
7920
struct net_device *dev)
7974
7921
{
7922
+
struct netdev_nested_priv priv = {
7923
+
.flags = NESTED_SYNC_IMM | NESTED_SYNC_TODO,
7924
+
.data = NULL,
7925
+
};
7926
+
7975
7927
if (!new_dev || !old_dev)
7976
7928
return;
7977
7929
···
7984
7926
return;
7985
7927
7986
7928
netdev_adjacent_dev_enable(dev, old_dev);
7987
-
netdev_upper_dev_unlink(old_dev, dev);
7929
+
__netdev_upper_dev_unlink(old_dev, dev, &priv);
7988
7930
}
7989
7931
EXPORT_SYMBOL(netdev_adjacent_change_commit);
7990
7932
···
7992
7934
struct net_device *new_dev,
7993
7935
struct net_device *dev)
7994
7936
{
7937
+
struct netdev_nested_priv priv = {
7938
+
.flags = 0,
7939
+
.data = NULL,
7940
+
};
7941
+
7995
7942
if (!new_dev)
7996
7943
return;
7997
7944
7998
7945
if (old_dev && new_dev != old_dev)
7999
7946
netdev_adjacent_dev_enable(dev, old_dev);
8000
7947
8001
-
netdev_upper_dev_unlink(new_dev, dev);
7948
+
__netdev_upper_dev_unlink(new_dev, dev, &priv);
8002
7949
}
8003
7950
EXPORT_SYMBOL(netdev_adjacent_change_abort);
8004
7951
···
10195
10132
void netdev_run_todo(void)
10196
10133
{
10197
10134
struct list_head list;
10135
+
#ifdef CONFIG_LOCKDEP
10136
+
struct list_head unlink_list;
10137
+
10138
+
list_replace_init(&net_unlink_list, &unlink_list);
10139
+
10140
+
while (!list_empty(&unlink_list)) {
10141
+
struct net_device *dev = list_first_entry(&unlink_list,
10142
+
struct net_device,
10143
+
unlink_list);
10144
+
list_del(&dev->unlink_list);
10145
+
dev->nested_level = dev->lower_level - 1;
10146
+
}
10147
+
#endif
10198
10148
10199
10149
/* Snapshot list, allow later requests */
10200
10150
list_replace_init(&net_todo_list, &list);
···
10420
10344
dev->gso_max_segs = GSO_MAX_SEGS;
10421
10345
dev->upper_level = 1;
10422
10346
dev->lower_level = 1;
10347
+
#ifdef CONFIG_LOCKDEP
10348
+
dev->nested_level = 0;
10349
+
INIT_LIST_HEAD(&dev->unlink_list);
10350
+
#endif
10423
10351
10424
10352
INIT_LIST_HEAD(&dev->napi_list);
10425
10353
INIT_LIST_HEAD(&dev->unreg_list);
+6
-6
net/core/dev_addr_lists.c
+6
-6
net/core/dev_addr_lists.c
···
637
637
if (to->addr_len != from->addr_len)
638
638
return -EINVAL;
639
639
640
-
netif_addr_lock_nested(to);
640
+
netif_addr_lock(to);
641
641
err = __hw_addr_sync(&to->uc, &from->uc, to->addr_len);
642
642
if (!err)
643
643
__dev_set_rx_mode(to);
···
667
667
if (to->addr_len != from->addr_len)
668
668
return -EINVAL;
669
669
670
-
netif_addr_lock_nested(to);
670
+
netif_addr_lock(to);
671
671
err = __hw_addr_sync_multiple(&to->uc, &from->uc, to->addr_len);
672
672
if (!err)
673
673
__dev_set_rx_mode(to);
···
700
700
* larger.
701
701
*/
702
702
netif_addr_lock_bh(from);
703
-
netif_addr_lock_nested(to);
703
+
netif_addr_lock(to);
704
704
__hw_addr_unsync(&to->uc, &from->uc, to->addr_len);
705
705
__dev_set_rx_mode(to);
706
706
netif_addr_unlock(to);
···
867
867
if (to->addr_len != from->addr_len)
868
868
return -EINVAL;
869
869
870
-
netif_addr_lock_nested(to);
870
+
netif_addr_lock(to);
871
871
err = __hw_addr_sync(&to->mc, &from->mc, to->addr_len);
872
872
if (!err)
873
873
__dev_set_rx_mode(to);
···
897
897
if (to->addr_len != from->addr_len)
898
898
return -EINVAL;
899
899
900
-
netif_addr_lock_nested(to);
900
+
netif_addr_lock(to);
901
901
err = __hw_addr_sync_multiple(&to->mc, &from->mc, to->addr_len);
902
902
if (!err)
903
903
__dev_set_rx_mode(to);
···
922
922
923
923
/* See the above comments inside dev_uc_unsync(). */
924
924
netif_addr_lock_bh(from);
925
-
netif_addr_lock_nested(to);
925
+
netif_addr_lock(to);
926
926
__hw_addr_unsync(&to->mc, &from->mc, to->addr_len);
927
927
__dev_set_rx_mode(to);
928
928
netif_addr_unlock(to);
+2
-2
net/core/skbuff.c
+2
-2
net/core/skbuff.c
···
5686
5686
lse->label_stack_entry = mpls_lse;
5687
5687
skb_postpush_rcsum(skb, lse, MPLS_HLEN);
5688
5688
5689
-
if (ethernet)
5689
+
if (ethernet && mac_len >= ETH_HLEN)
5690
5690
skb_mod_eth_type(skb, eth_hdr(skb), mpls_proto);
5691
5691
skb->protocol = mpls_proto;
5692
5692
···
5726
5726
skb_reset_mac_header(skb);
5727
5727
skb_set_network_header(skb, mac_len);
5728
5728
5729
-
if (ethernet) {
5729
+
if (ethernet && mac_len >= ETH_HLEN) {
5730
5730
struct ethhdr *hdr;
5731
5731
5732
5732
/* use mpls_hdr() to get ethertype to account for VLANs. */
+1
-1
net/ethtool/netlink.c
+1
-1
net/ethtool/netlink.c
···
866
866
[ETHNL_MCGRP_MONITOR] = { .name = ETHTOOL_MCGRP_MONITOR_NAME },
867
867
};
868
868
869
-
static struct genl_family ethtool_genl_family = {
869
+
static struct genl_family ethtool_genl_family __ro_after_init = {
870
870
.name = ETHTOOL_GENL_NAME,
871
871
.version = ETHTOOL_GENL_VERSION,
872
872
.netnsok = true,
+2
net/ipv4/ip_vti.c
+2
net/ipv4/ip_vti.c
···
490
490
.priority = 0,
491
491
};
492
492
493
+
#if IS_ENABLED(CONFIG_IPV6)
493
494
static struct xfrm_tunnel vti_ipip6_handler __read_mostly = {
494
495
.handler = vti_rcv_tunnel,
495
496
.cb_handler = vti_rcv_cb,
496
497
.err_handler = vti4_err,
497
498
.priority = 0,
498
499
};
500
+
#endif
499
501
#endif
500
502
501
503
static int __net_init vti_init_net(struct net *net)
+1
net/ipv4/proc.c
+1
net/ipv4/proc.c
···
293
293
SNMP_MIB_ITEM("TcpTimeoutRehash", LINUX_MIB_TCPTIMEOUTREHASH),
294
294
SNMP_MIB_ITEM("TcpDuplicateDataRehash", LINUX_MIB_TCPDUPLICATEDATAREHASH),
295
295
SNMP_MIB_ITEM("TCPDSACKRecvSegs", LINUX_MIB_TCPDSACKRECVSEGS),
296
+
SNMP_MIB_ITEM("TCPDSACKIgnoredDubious", LINUX_MIB_TCPDSACKIGNOREDDUBIOUS),
296
297
SNMP_MIB_SENTINEL
297
298
};
298
299
+2
-1
net/ipv4/tcp.c
+2
-1
net/ipv4/tcp.c
···
972
972
long timeo = sock_sndtimeo(sk, flags & MSG_DONTWAIT);
973
973
974
974
if (IS_ENABLED(CONFIG_DEBUG_VM) &&
975
-
WARN_ONCE(PageSlab(page), "page must not be a Slab one"))
975
+
WARN_ONCE(!sendpage_ok(page),
976
+
"page must not be a Slab one and have page_count > 0"))
976
977
return -EINVAL;
977
978
978
979
/* Wait for a connection to finish. One exception is TCP Fast Open
+25
-7
net/ipv4/tcp_input.c
+25
-7
net/ipv4/tcp_input.c
···
948
948
struct rate_sample *rate;
949
949
};
950
950
951
-
/* Take a notice that peer is sending D-SACKs */
951
+
/* Take a notice that peer is sending D-SACKs. Skip update of data delivery
952
+
* and spurious retransmission information if this DSACK is unlikely caused by
953
+
* sender's action:
954
+
* - DSACKed sequence range is larger than maximum receiver's window.
955
+
* - Total no. of DSACKed segments exceed the total no. of retransmitted segs.
956
+
*/
952
957
static u32 tcp_dsack_seen(struct tcp_sock *tp, u32 start_seq,
953
958
u32 end_seq, struct tcp_sacktag_state *state)
954
959
{
955
960
u32 seq_len, dup_segs = 1;
956
961
957
-
if (before(start_seq, end_seq)) {
958
-
seq_len = end_seq - start_seq;
959
-
if (seq_len > tp->mss_cache)
960
-
dup_segs = DIV_ROUND_UP(seq_len, tp->mss_cache);
961
-
}
962
+
if (!before(start_seq, end_seq))
963
+
return 0;
964
+
965
+
seq_len = end_seq - start_seq;
966
+
/* Dubious DSACK: DSACKed range greater than maximum advertised rwnd */
967
+
if (seq_len > tp->max_window)
968
+
return 0;
969
+
if (seq_len > tp->mss_cache)
970
+
dup_segs = DIV_ROUND_UP(seq_len, tp->mss_cache);
971
+
972
+
tp->dsack_dups += dup_segs;
973
+
/* Skip the DSACK if dup segs weren't retransmitted by sender */
974
+
if (tp->dsack_dups > tp->total_retrans)
975
+
return 0;
962
976
963
977
tp->rx_opt.sack_ok |= TCP_DSACK_SEEN;
964
978
tp->rack.dsack_seen = 1;
965
-
tp->dsack_dups += dup_segs;
966
979
967
980
state->flag |= FLAG_DSACKING_ACK;
968
981
/* A spurious retransmission is delivered */
···
1228
1215
}
1229
1216
1230
1217
dup_segs = tcp_dsack_seen(tp, start_seq_0, end_seq_0, state);
1218
+
if (!dup_segs) { /* Skip dubious DSACK */
1219
+
NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPDSACKIGNOREDDUBIOUS);
1220
+
return false;
1221
+
}
1222
+
1231
1223
NET_ADD_STATS(sock_net(sk), LINUX_MIB_TCPDSACKRECVSEGS, dup_segs);
1232
1224
1233
1225
/* D-SACK for already forgotten data... Do dumb counting. */
+6
-5
net/mptcp/options.c
+6
-5
net/mptcp/options.c
···
519
519
520
520
if (subflow->use_64bit_ack) {
521
521
ack_size = TCPOLEN_MPTCP_DSS_ACK64;
522
-
opts->ext_copy.data_ack = msk->ack_seq;
522
+
opts->ext_copy.data_ack = READ_ONCE(msk->ack_seq);
523
523
opts->ext_copy.ack64 = 1;
524
524
} else {
525
525
ack_size = TCPOLEN_MPTCP_DSS_ACK32;
526
-
opts->ext_copy.data_ack32 = (uint32_t)(msk->ack_seq);
526
+
opts->ext_copy.data_ack32 = (uint32_t)READ_ONCE(msk->ack_seq);
527
527
opts->ext_copy.ack64 = 0;
528
528
}
529
529
opts->ext_copy.use_ack = 1;
···
817
817
}
818
818
}
819
819
820
-
bool mptcp_update_rcv_data_fin(struct mptcp_sock *msk, u64 data_fin_seq)
820
+
bool mptcp_update_rcv_data_fin(struct mptcp_sock *msk, u64 data_fin_seq, bool use_64bit)
821
821
{
822
822
/* Skip if DATA_FIN was already received.
823
823
* If updating simultaneously with the recvmsg loop, values
···
827
827
if (READ_ONCE(msk->rcv_data_fin) || !READ_ONCE(msk->first))
828
828
return false;
829
829
830
-
WRITE_ONCE(msk->rcv_data_fin_seq, data_fin_seq);
830
+
WRITE_ONCE(msk->rcv_data_fin_seq,
831
+
expand_ack(READ_ONCE(msk->ack_seq), data_fin_seq, use_64bit));
831
832
WRITE_ONCE(msk->rcv_data_fin, 1);
832
833
833
834
return true;
···
920
919
*/
921
920
if (TCP_SKB_CB(skb)->seq == TCP_SKB_CB(skb)->end_seq) {
922
921
if (mp_opt.data_fin && mp_opt.data_len == 1 &&
923
-
mptcp_update_rcv_data_fin(msk, mp_opt.data_seq) &&
922
+
mptcp_update_rcv_data_fin(msk, mp_opt.data_seq, mp_opt.dsn64) &&
924
923
schedule_work(&msk->work))
925
924
sock_hold(subflow->conn);
926
925
+4
-4
net/mptcp/protocol.c
+4
-4
net/mptcp/protocol.c
···
284
284
285
285
if (MPTCP_SKB_CB(skb)->map_seq == msk->ack_seq) {
286
286
/* in sequence */
287
-
msk->ack_seq += copy_len;
287
+
WRITE_ONCE(msk->ack_seq, msk->ack_seq + copy_len);
288
288
tail = skb_peek_tail(&sk->sk_receive_queue);
289
289
if (tail && mptcp_try_coalesce(sk, tail, skb))
290
290
return true;
···
402
402
if (mptcp_pending_data_fin(sk, &rcv_data_fin_seq)) {
403
403
struct mptcp_subflow_context *subflow;
404
404
405
-
msk->ack_seq++;
405
+
WRITE_ONCE(msk->ack_seq, msk->ack_seq + 1);
406
406
WRITE_ONCE(msk->rcv_data_fin, 0);
407
407
408
408
sk->sk_shutdown |= RCV_SHUTDOWN;
···
2039
2039
msk->remote_key = mp_opt->sndr_key;
2040
2040
mptcp_crypto_key_sha(msk->remote_key, NULL, &ack_seq);
2041
2041
ack_seq++;
2042
-
msk->ack_seq = ack_seq;
2042
+
WRITE_ONCE(msk->ack_seq, ack_seq);
2043
2043
}
2044
2044
2045
2045
sock_reset_flag(nsk, SOCK_RCU_FREE);
···
2398
2398
parent_sock = READ_ONCE(parent->sk_socket);
2399
2399
if (parent_sock && !sk->sk_socket)
2400
2400
mptcp_sock_graft(sk, parent_sock);
2401
-
subflow->map_seq = msk->ack_seq;
2401
+
subflow->map_seq = READ_ONCE(msk->ack_seq);
2402
2402
return true;
2403
2403
}
2404
2404
+1
-1
net/mptcp/protocol.h
+1
-1
net/mptcp/protocol.h
···
407
407
bool mptcp_finish_join(struct sock *sk);
408
408
void mptcp_data_acked(struct sock *sk);
409
409
void mptcp_subflow_eof(struct sock *sk);
410
-
bool mptcp_update_rcv_data_fin(struct mptcp_sock *msk, u64 data_fin_seq);
410
+
bool mptcp_update_rcv_data_fin(struct mptcp_sock *msk, u64 data_fin_seq, bool use_64bit);
411
411
void mptcp_destroy_common(struct mptcp_sock *msk);
412
412
413
413
void __init mptcp_token_init(void);
+16
-3
net/mptcp/subflow.c
+16
-3
net/mptcp/subflow.c
···
732
732
733
733
if (mpext->data_fin == 1) {
734
734
if (data_len == 1) {
735
-
mptcp_update_rcv_data_fin(msk, mpext->data_seq);
735
+
bool updated = mptcp_update_rcv_data_fin(msk, mpext->data_seq,
736
+
mpext->dsn64);
736
737
pr_debug("DATA_FIN with no payload seq=%llu", mpext->data_seq);
737
738
if (subflow->map_valid) {
738
739
/* A DATA_FIN might arrive in a DSS
···
744
743
skb_ext_del(skb, SKB_EXT_MPTCP);
745
744
return MAPPING_OK;
746
745
} else {
746
+
if (updated && schedule_work(&msk->work))
747
+
sock_hold((struct sock *)msk);
748
+
747
749
return MAPPING_DATA_FIN;
748
750
}
749
751
} else {
750
-
mptcp_update_rcv_data_fin(msk, mpext->data_seq + data_len);
751
-
pr_debug("DATA_FIN with mapping seq=%llu", mpext->data_seq + data_len);
752
+
u64 data_fin_seq = mpext->data_seq + data_len;
753
+
754
+
/* If mpext->data_seq is a 32-bit value, data_fin_seq
755
+
* must also be limited to 32 bits.
756
+
*/
757
+
if (!mpext->dsn64)
758
+
data_fin_seq &= GENMASK_ULL(31, 0);
759
+
760
+
mptcp_update_rcv_data_fin(msk, data_fin_seq, mpext->dsn64);
761
+
pr_debug("DATA_FIN with mapping seq=%llu dsn64=%d",
762
+
data_fin_seq, mpext->dsn64);
752
763
}
753
764
754
765
/* Adjust for DATA_FIN using 1 byte of sequence space */
+25
-9
net/qrtr/ns.c
+25
-9
net/qrtr/ns.c
···
193
193
struct qrtr_server *srv;
194
194
struct qrtr_node *node;
195
195
void __rcu **slot;
196
-
int ret;
196
+
int ret = 0;
197
197
198
198
node = node_get(qrtr_ns.local_node);
199
199
if (!node)
200
200
return 0;
201
201
202
+
rcu_read_lock();
202
203
/* Announce the list of servers registered in this node */
203
204
radix_tree_for_each_slot(slot, &node->servers, &iter, 0) {
204
205
srv = radix_tree_deref_slot(slot);
···
207
206
ret = service_announce_new(sq, srv);
208
207
if (ret < 0) {
209
208
pr_err("failed to announce new service\n");
210
-
return ret;
209
+
goto err_out;
211
210
}
212
211
}
213
212
214
-
return 0;
213
+
err_out:
214
+
rcu_read_unlock();
215
+
216
+
return ret;
215
217
}
216
218
217
219
static struct qrtr_server *server_add(unsigned int service,
···
339
335
struct qrtr_node *node;
340
336
void __rcu **slot;
341
337
struct kvec iv;
342
-
int ret;
338
+
int ret = 0;
343
339
344
340
iv.iov_base = &pkt;
345
341
iv.iov_len = sizeof(pkt);
···
348
344
if (!node)
349
345
return 0;
350
346
347
+
rcu_read_lock();
351
348
/* Advertise removal of this client to all servers of remote node */
352
349
radix_tree_for_each_slot(slot, &node->servers, &iter, 0) {
353
350
srv = radix_tree_deref_slot(slot);
354
351
server_del(node, srv->port);
355
352
}
353
+
rcu_read_unlock();
356
354
357
355
/* Advertise the removal of this client to all local servers */
358
356
local_node = node_get(qrtr_ns.local_node);
···
365
359
pkt.cmd = cpu_to_le32(QRTR_TYPE_BYE);
366
360
pkt.client.node = cpu_to_le32(from->sq_node);
367
361
362
+
rcu_read_lock();
368
363
radix_tree_for_each_slot(slot, &local_node->servers, &iter, 0) {
369
364
srv = radix_tree_deref_slot(slot);
370
365
···
379
372
ret = kernel_sendmsg(qrtr_ns.sock, &msg, &iv, 1, sizeof(pkt));
380
373
if (ret < 0) {
381
374
pr_err("failed to send bye cmd\n");
382
-
return ret;
375
+
goto err_out;
383
376
}
384
377
}
385
378
386
-
return 0;
379
+
err_out:
380
+
rcu_read_unlock();
381
+
382
+
return ret;
387
383
}
388
384
389
385
static int ctrl_cmd_del_client(struct sockaddr_qrtr *from,
···
404
394
struct list_head *li;
405
395
void __rcu **slot;
406
396
struct kvec iv;
407
-
int ret;
397
+
int ret = 0;
408
398
409
399
iv.iov_base = &pkt;
410
400
iv.iov_len = sizeof(pkt);
···
444
434
pkt.client.node = cpu_to_le32(node_id);
445
435
pkt.client.port = cpu_to_le32(port);
446
436
437
+
rcu_read_lock();
447
438
radix_tree_for_each_slot(slot, &local_node->servers, &iter, 0) {
448
439
srv = radix_tree_deref_slot(slot);
449
440
···
458
447
ret = kernel_sendmsg(qrtr_ns.sock, &msg, &iv, 1, sizeof(pkt));
459
448
if (ret < 0) {
460
449
pr_err("failed to send del client cmd\n");
461
-
return ret;
450
+
goto err_out;
462
451
}
463
452
}
464
453
465
-
return 0;
454
+
err_out:
455
+
rcu_read_unlock();
456
+
457
+
return ret;
466
458
}
467
459
468
460
static int ctrl_cmd_new_server(struct sockaddr_qrtr *from,
···
568
554
filter.service = service;
569
555
filter.instance = instance;
570
556
557
+
rcu_read_lock();
571
558
radix_tree_for_each_slot(node_slot, &nodes, &node_iter, 0) {
572
559
node = radix_tree_deref_slot(node_slot);
573
560
···
583
568
lookup_notify(from, srv, true);
584
569
}
585
570
}
571
+
rcu_read_unlock();
586
572
587
573
/* Empty notification, to indicate end of listing */
588
574
lookup_notify(from, NULL, true);
+29
-25
net/sched/act_api.c
+29
-25
net/sched/act_api.c
···
235
235
index++;
236
236
if (index < s_i)
237
237
continue;
238
+
if (IS_ERR(p))
239
+
continue;
238
240
239
241
if (jiffy_since &&
240
242
time_after(jiffy_since,
···
309
307
310
308
mutex_lock(&idrinfo->lock);
311
309
idr_for_each_entry_ul(idr, p, tmp, id) {
310
+
if (IS_ERR(p))
311
+
continue;
312
312
ret = tcf_idr_release_unsafe(p);
313
313
if (ret == ACT_P_DELETED) {
314
314
module_put(ops->owner);
···
470
466
!(flags & TCA_ACT_FLAGS_NO_PERCPU_STATS), flags);
471
467
}
472
468
EXPORT_SYMBOL(tcf_idr_create_from_flags);
473
-
474
-
void tcf_idr_insert(struct tc_action_net *tn, struct tc_action *a)
475
-
{
476
-
struct tcf_idrinfo *idrinfo = tn->idrinfo;
477
-
478
-
mutex_lock(&idrinfo->lock);
479
-
/* Replace ERR_PTR(-EBUSY) allocated by tcf_idr_check_alloc */
480
-
WARN_ON(!IS_ERR(idr_replace(&idrinfo->action_idr, a, a->tcfa_index)));
481
-
mutex_unlock(&idrinfo->lock);
482
-
}
483
-
EXPORT_SYMBOL(tcf_idr_insert);
484
469
485
470
/* Cleanup idr index that was allocated but not initialized. */
486
471
···
724
731
return ret;
725
732
}
726
733
727
-
static int tcf_action_destroy_1(struct tc_action *a, int bind)
728
-
{
729
-
struct tc_action *actions[] = { a, NULL };
730
-
731
-
return tcf_action_destroy(actions, bind);
732
-
}
733
-
734
734
static int tcf_action_put(struct tc_action *p)
735
735
{
736
736
return __tcf_action_put(p, false);
···
888
902
[TCA_ACT_HW_STATS] = NLA_POLICY_BITFIELD32(TCA_ACT_HW_STATS_ANY),
889
903
};
890
904
905
+
static void tcf_idr_insert_many(struct tc_action *actions[])
906
+
{
907
+
int i;
908
+
909
+
for (i = 0; i < TCA_ACT_MAX_PRIO; i++) {
910
+
struct tc_action *a = actions[i];
911
+
struct tcf_idrinfo *idrinfo;
912
+
913
+
if (!a)
914
+
continue;
915
+
idrinfo = a->idrinfo;
916
+
mutex_lock(&idrinfo->lock);
917
+
/* Replace ERR_PTR(-EBUSY) allocated by tcf_idr_check_alloc if
918
+
* it is just created, otherwise this is just a nop.
919
+
*/
920
+
idr_replace(&idrinfo->action_idr, a, a->tcfa_index);
921
+
mutex_unlock(&idrinfo->lock);
922
+
}
923
+
}
924
+
891
925
struct tc_action *tcf_action_init_1(struct net *net, struct tcf_proto *tp,
892
926
struct nlattr *nla, struct nlattr *est,
893
927
char *name, int ovr, int bind,
···
1008
1002
if (err != ACT_P_CREATED)
1009
1003
module_put(a_o->owner);
1010
1004
1011
-
if (TC_ACT_EXT_CMP(a->tcfa_action, TC_ACT_GOTO_CHAIN) &&
1012
-
!rcu_access_pointer(a->goto_chain)) {
1013
-
tcf_action_destroy_1(a, bind);
1014
-
NL_SET_ERR_MSG(extack, "can't use goto chain with NULL chain");
1015
-
return ERR_PTR(-EINVAL);
1016
-
}
1017
-
1018
1005
return a;
1019
1006
1020
1007
err_mod:
···
1050
1051
/* Start from index 0 */
1051
1052
actions[i - 1] = act;
1052
1053
}
1054
+
1055
+
/* We have to commit them all together, because if any error happened in
1056
+
* between, we could not handle the failure gracefully.
1057
+
*/
1058
+
tcf_idr_insert_many(actions);
1053
1059
1054
1060
*attr_size = tcf_action_full_attrs_size(sz);
1055
1061
return i - 1;
+1
-3
net/sched/act_bpf.c
+1
-3
net/sched/act_bpf.c
···
365
365
if (goto_ch)
366
366
tcf_chain_put_by_act(goto_ch);
367
367
368
-
if (res == ACT_P_CREATED) {
369
-
tcf_idr_insert(tn, *act);
370
-
} else {
368
+
if (res != ACT_P_CREATED) {
371
369
/* make sure the program being replaced is no longer executing */
372
370
synchronize_rcu();
373
371
tcf_bpf_cfg_cleanup(&old);
-1
net/sched/act_connmark.c
-1
net/sched/act_connmark.c
-3
net/sched/act_csum.c
-3
net/sched/act_csum.c
-2
net/sched/act_ct.c
-2
net/sched/act_ct.c
-3
net/sched/act_ctinfo.c
-3
net/sched/act_ctinfo.c
-2
net/sched/act_gact.c
-2
net/sched/act_gact.c
-3
net/sched/act_gate.c
-3
net/sched/act_gate.c
-3
net/sched/act_ife.c
-3
net/sched/act_ife.c
-2
net/sched/act_ipt.c
-2
net/sched/act_ipt.c
-2
net/sched/act_mirred.c
-2
net/sched/act_mirred.c
-2
net/sched/act_mpls.c
-2
net/sched/act_mpls.c
-3
net/sched/act_nat.c
-3
net/sched/act_nat.c
-2
net/sched/act_pedit.c
-2
net/sched/act_pedit.c
-2
net/sched/act_police.c
-2
net/sched/act_police.c
-2
net/sched/act_sample.c
-2
net/sched/act_sample.c
-2
net/sched/act_simple.c
-2
net/sched/act_simple.c
-2
net/sched/act_skbedit.c
-2
net/sched/act_skbedit.c
-2
net/sched/act_skbmod.c
-2
net/sched/act_skbmod.c
-3
net/sched/act_tunnel_key.c
-3
net/sched/act_tunnel_key.c
-2
net/sched/act_vlan.c
-2
net/sched/act_vlan.c
+4
-2
net/socket.c
+4
-2
net/socket.c
···
3640
3640
int kernel_sendpage(struct socket *sock, struct page *page, int offset,
3641
3641
size_t size, int flags)
3642
3642
{
3643
-
if (sock->ops->sendpage)
3643
+
if (sock->ops->sendpage) {
3644
+
/* Warn in case the improper page to zero-copy send */
3645
+
WARN_ONCE(!sendpage_ok(page), "improper page for zero-copy send");
3644
3646
return sock->ops->sendpage(sock, page, offset, size, flags);
3645
-
3647
+
}
3646
3648
return sock_no_sendpage(sock, page, offset, size, flags);
3647
3649
}
3648
3650
EXPORT_SYMBOL(kernel_sendpage);
+1
-1
net/sunrpc/svcsock.c
+1
-1
net/sunrpc/svcsock.c
+1
-1
net/switchdev/switchdev.c
+1
-1
net/switchdev/switchdev.c
···
404
404
* @val: value passed unmodified to notifier function
405
405
* @dev: port device
406
406
* @info: notifier information data
407
-
*
407
+
* @extack: netlink extended ack
408
408
* Call all network notifier blocks.
409
409
*/
410
410
int call_switchdev_notifiers(unsigned long val, struct net_device *dev,
+7
-2
net/tls/tls_sw.c
+7
-2
net/tls/tls_sw.c
···
2143
2143
struct tls_context *tls_ctx = tls_get_ctx(sk);
2144
2144
struct tls_sw_context_tx *ctx = tls_sw_ctx_tx(tls_ctx);
2145
2145
struct tls_rec *rec, *tmp;
2146
+
int pending;
2146
2147
2147
2148
/* Wait for any pending async encryptions to complete */
2148
-
smp_store_mb(ctx->async_notify, true);
2149
-
if (atomic_read(&ctx->encrypt_pending))
2149
+
spin_lock_bh(&ctx->encrypt_compl_lock);
2150
+
ctx->async_notify = true;
2151
+
pending = atomic_read(&ctx->encrypt_pending);
2152
+
spin_unlock_bh(&ctx->encrypt_compl_lock);
2153
+
2154
+
if (pending)
2150
2155
crypto_wait_req(-EINPROGRESS, &ctx->async_wait);
2151
2156
2152
2157
tls_tx_records(sk, -1);
+16
-1
net/xdp/xsk.c
+16
-1
net/xdp/xsk.c
···
411
411
skb_shinfo(skb)->destructor_arg = (void *)(long)desc.addr;
412
412
skb->destructor = xsk_destruct_skb;
413
413
414
+
/* Hinder dev_direct_xmit from freeing the packet and
415
+
* therefore completing it in the destructor
416
+
*/
417
+
refcount_inc(&skb->users);
414
418
err = dev_direct_xmit(skb, xs->queue_id);
419
+
if (err == NETDEV_TX_BUSY) {
420
+
/* Tell user-space to retry the send */
421
+
skb->destructor = sock_wfree;
422
+
/* Free skb without triggering the perf drop trace */
423
+
consume_skb(skb);
424
+
err = -EAGAIN;
425
+
goto out;
426
+
}
427
+
415
428
xskq_cons_release(xs->tx);
416
429
/* Ignore NET_XMIT_CN as packet might have been sent */
417
-
if (err == NET_XMIT_DROP || err == NETDEV_TX_BUSY) {
430
+
if (err == NET_XMIT_DROP) {
418
431
/* SKB completed but not sent */
432
+
kfree_skb(skb);
419
433
err = -EBUSY;
420
434
goto out;
421
435
}
422
436
437
+
consume_skb(skb);
423
438
sent_frame = true;
424
439
}
425
440
+5
-1
net/xfrm/espintcp.c
+5
-1
net/xfrm/espintcp.c
···
29
29
30
30
static void handle_esp(struct sk_buff *skb, struct sock *sk)
31
31
{
32
+
struct tcp_skb_cb *tcp_cb = (struct tcp_skb_cb *)skb->cb;
33
+
32
34
skb_reset_transport_header(skb);
33
-
memset(skb->cb, 0, sizeof(skb->cb));
35
+
36
+
/* restore IP CB, we need at least IP6CB->nhoff */
37
+
memmove(skb->cb, &tcp_cb->header, sizeof(tcp_cb->header));
34
38
35
39
rcu_read_lock();
36
40
skb->dev = dev_get_by_index_rcu(sock_net(sk), skb->skb_iif);
+1
-1
net/xfrm/xfrm_interface.c
+1
-1
net/xfrm/xfrm_interface.c
+37
-5
net/xfrm/xfrm_state.c
+37
-5
net/xfrm/xfrm_state.c
···
1019
1019
*/
1020
1020
if (x->km.state == XFRM_STATE_VALID) {
1021
1021
if ((x->sel.family &&
1022
-
!xfrm_selector_match(&x->sel, fl, x->sel.family)) ||
1022
+
(x->sel.family != family ||
1023
+
!xfrm_selector_match(&x->sel, fl, family))) ||
1023
1024
!security_xfrm_state_pol_flow_match(x, pol, fl))
1024
1025
return;
1025
1026
···
1033
1032
*acq_in_progress = 1;
1034
1033
} else if (x->km.state == XFRM_STATE_ERROR ||
1035
1034
x->km.state == XFRM_STATE_EXPIRED) {
1036
-
if (xfrm_selector_match(&x->sel, fl, x->sel.family) &&
1035
+
if ((!x->sel.family ||
1036
+
(x->sel.family == family &&
1037
+
xfrm_selector_match(&x->sel, fl, family))) &&
1037
1038
security_xfrm_state_pol_flow_match(x, pol, fl))
1038
1039
*error = -ESRCH;
1039
1040
}
···
1075
1072
tmpl->mode == x->props.mode &&
1076
1073
tmpl->id.proto == x->id.proto &&
1077
1074
(tmpl->id.spi == x->id.spi || !tmpl->id.spi))
1078
-
xfrm_state_look_at(pol, x, fl, encap_family,
1075
+
xfrm_state_look_at(pol, x, fl, family,
1079
1076
&best, &acquire_in_progress, &error);
1080
1077
}
1081
1078
if (best || acquire_in_progress)
···
1092
1089
tmpl->mode == x->props.mode &&
1093
1090
tmpl->id.proto == x->id.proto &&
1094
1091
(tmpl->id.spi == x->id.spi || !tmpl->id.spi))
1095
-
xfrm_state_look_at(pol, x, fl, encap_family,
1092
+
xfrm_state_look_at(pol, x, fl, family,
1096
1093
&best, &acquire_in_progress, &error);
1097
1094
}
1098
1095
···
1444
1441
EXPORT_SYMBOL(xfrm_state_add);
1445
1442
1446
1443
#ifdef CONFIG_XFRM_MIGRATE
1444
+
static inline int clone_security(struct xfrm_state *x, struct xfrm_sec_ctx *security)
1445
+
{
1446
+
struct xfrm_user_sec_ctx *uctx;
1447
+
int size = sizeof(*uctx) + security->ctx_len;
1448
+
int err;
1449
+
1450
+
uctx = kmalloc(size, GFP_KERNEL);
1451
+
if (!uctx)
1452
+
return -ENOMEM;
1453
+
1454
+
uctx->exttype = XFRMA_SEC_CTX;
1455
+
uctx->len = size;
1456
+
uctx->ctx_doi = security->ctx_doi;
1457
+
uctx->ctx_alg = security->ctx_alg;
1458
+
uctx->ctx_len = security->ctx_len;
1459
+
memcpy(uctx + 1, security->ctx_str, security->ctx_len);
1460
+
err = security_xfrm_state_alloc(x, uctx);
1461
+
kfree(uctx);
1462
+
if (err)
1463
+
return err;
1464
+
1465
+
return 0;
1466
+
}
1467
+
1447
1468
static struct xfrm_state *xfrm_state_clone(struct xfrm_state *orig,
1448
1469
struct xfrm_encap_tmpl *encap)
1449
1470
{
···
1524
1497
goto error;
1525
1498
}
1526
1499
1500
+
if (orig->security)
1501
+
if (clone_security(x, orig->security))
1502
+
goto error;
1503
+
1527
1504
if (orig->coaddr) {
1528
1505
x->coaddr = kmemdup(orig->coaddr, sizeof(*x->coaddr),
1529
1506
GFP_KERNEL);
···
1541
1510
}
1542
1511
1543
1512
memcpy(&x->mark, &orig->mark, sizeof(x->mark));
1513
+
memcpy(&x->props.smark, &orig->props.smark, sizeof(x->props.smark));
1544
1514
1545
1515
if (xfrm_init_state(x) < 0)
1546
1516
goto error;
···
1553
1521
x->tfcpad = orig->tfcpad;
1554
1522
x->replay_maxdiff = orig->replay_maxdiff;
1555
1523
x->replay_maxage = orig->replay_maxage;
1556
-
x->curlft.add_time = orig->curlft.add_time;
1524
+
memcpy(&x->curlft, &orig->curlft, sizeof(x->curlft));
1557
1525
x->km.state = orig->km.state;
1558
1526
x->km.seq = orig->km.seq;
1559
1527
x->replay = orig->replay;
+1
-1
scripts/dtc/Makefile
+1
-1
scripts/dtc/Makefile
···
9
9
dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o
10
10
11
11
# Source files need to get at the userspace version of libfdt_env.h to compile
12
-
HOST_EXTRACFLAGS := -I $(srctree)/$(src)/libfdt
12
+
HOST_EXTRACFLAGS += -I $(srctree)/$(src)/libfdt
13
13
14
14
ifeq ($(shell pkg-config --exists yaml-0.1 2>/dev/null && echo yes),)
15
15
ifneq ($(CHECK_DT_BINDING)$(CHECK_DTBS),)
+15
-1
scripts/kallsyms.c
+15
-1
scripts/kallsyms.c
···
82
82
83
83
static bool is_ignored_symbol(const char *name, char type)
84
84
{
85
+
/* Symbol names that exactly match to the following are ignored.*/
85
86
static const char * const ignored_symbols[] = {
86
87
/*
87
88
* Symbols which vary between passes. Passes 1 and 2 must have
···
105
104
NULL
106
105
};
107
106
107
+
/* Symbol names that begin with the following are ignored.*/
108
108
static const char * const ignored_prefixes[] = {
109
109
"$", /* local symbols for ARM, MIPS, etc. */
110
110
".LASANPC", /* s390 kasan local symbols */
···
115
113
NULL
116
114
};
117
115
116
+
/* Symbol names that end with the following are ignored.*/
118
117
static const char * const ignored_suffixes[] = {
119
118
"_from_arm", /* arm */
120
119
"_from_thumb", /* arm */
···
123
120
NULL
124
121
};
125
122
123
+
/* Symbol names that contain the following are ignored.*/
124
+
static const char * const ignored_matches[] = {
125
+
".long_branch.", /* ppc stub */
126
+
".plt_branch.", /* ppc stub */
127
+
NULL
128
+
};
129
+
126
130
const char * const *p;
127
131
128
-
/* Exclude symbols which vary between passes. */
129
132
for (p = ignored_symbols; *p; p++)
130
133
if (!strcmp(name, *p))
131
134
return true;
···
144
135
int l = strlen(name) - strlen(*p);
145
136
146
137
if (l >= 0 && !strcmp(name + l, *p))
138
+
return true;
139
+
}
140
+
141
+
for (p = ignored_matches; *p; p++) {
142
+
if (strstr(name, *p))
147
143
return true;
148
144
}
149
145
+1
-1
scripts/spelling.txt
+1
-1
scripts/spelling.txt
+2
-2
sound/pci/asihpi/hpioctl.c
+2
-2
sound/pci/asihpi/hpioctl.c
···
343
343
struct hpi_message hm;
344
344
struct hpi_response hr;
345
345
struct hpi_adapter adapter;
346
-
struct hpi_pci pci;
346
+
struct hpi_pci pci = { 0 };
347
347
348
348
memset(&adapter, 0, sizeof(adapter));
349
349
···
499
499
return 0;
500
500
501
501
err:
502
-
for (idx = 0; idx < HPI_MAX_ADAPTER_MEM_SPACES; idx++) {
502
+
while (--idx >= 0) {
503
503
if (pci.ap_mem_base[idx]) {
504
504
iounmap(pci.ap_mem_base[idx]);
505
505
pci.ap_mem_base[idx] = NULL;
+12
-2
sound/pci/hda/patch_realtek.c
+12
-2
sound/pci/hda/patch_realtek.c
···
2475
2475
SND_PCI_QUIRK(0x1462, 0x1276, "MSI-GL73", ALC1220_FIXUP_CLEVO_P950),
2476
2476
SND_PCI_QUIRK(0x1462, 0x1293, "MSI-GP65", ALC1220_FIXUP_CLEVO_P950),
2477
2477
SND_PCI_QUIRK(0x1462, 0x7350, "MSI-7350", ALC889_FIXUP_CD),
2478
-
SND_PCI_QUIRK(0x1462, 0x9c37, "MSI X570-A PRO", ALC1220_FIXUP_CLEVO_P950),
2479
2478
SND_PCI_QUIRK(0x1462, 0xda57, "MSI Z270-Gaming", ALC1220_FIXUP_GB_DUAL_CODECS),
2480
2479
SND_PCI_QUIRK_VENDOR(0x1462, "MSI", ALC882_FIXUP_GPIO3),
2481
2480
SND_PCI_QUIRK(0x147b, 0x107a, "Abit AW9D-MAX", ALC882_FIXUP_ABIT_AW9D_MAX),
···
3427
3428
3428
3429
/* 3k pull low control for Headset jack. */
3429
3430
/* NOTE: call this before clearing the pin, otherwise codec stalls */
3430
-
alc_update_coef_idx(codec, 0x46, 0, 3 << 12);
3431
+
/* If disable 3k pulldown control for alc257, the Mic detection will not work correctly
3432
+
* when booting with headset plugged. So skip setting it for the codec alc257
3433
+
*/
3434
+
if (codec->core.vendor_id != 0x10ec0257)
3435
+
alc_update_coef_idx(codec, 0x46, 0, 3 << 12);
3431
3436
3432
3437
if (!spec->no_shutup_pins)
3433
3438
snd_hda_codec_write(codec, hp_pin, 0,
···
6054
6051
#include "hp_x360_helper.c"
6055
6052
6056
6053
enum {
6054
+
ALC269_FIXUP_GPIO2,
6057
6055
ALC269_FIXUP_SONY_VAIO,
6058
6056
ALC275_FIXUP_SONY_VAIO_GPIO2,
6059
6057
ALC269_FIXUP_DELL_M101Z,
···
6236
6232
};
6237
6233
6238
6234
static const struct hda_fixup alc269_fixups[] = {
6235
+
[ALC269_FIXUP_GPIO2] = {
6236
+
.type = HDA_FIXUP_FUNC,
6237
+
.v.func = alc_fixup_gpio2,
6238
+
},
6239
6239
[ALC269_FIXUP_SONY_VAIO] = {
6240
6240
.type = HDA_FIXUP_PINCTLS,
6241
6241
.v.pins = (const struct hda_pintbl[]) {
···
7059
7051
[ALC233_FIXUP_LENOVO_MULTI_CODECS] = {
7060
7052
.type = HDA_FIXUP_FUNC,
7061
7053
.v.func = alc233_alc662_fixup_lenovo_dual_codecs,
7054
+
.chained = true,
7055
+
.chain_id = ALC269_FIXUP_GPIO2
7062
7056
},
7063
7057
[ALC233_FIXUP_ACER_HEADSET_MIC] = {
7064
7058
.type = HDA_FIXUP_VERBS,
-1
sound/usb/mixer_maps.c
-1
sound/usb/mixer_maps.c
+4
-3
sound/usb/quirks.c
+4
-3
sound/usb/quirks.c
···
1678
1678
&& (requesttype & USB_TYPE_MASK) == USB_TYPE_CLASS)
1679
1679
msleep(20);
1680
1680
1681
-
/* Zoom R16/24, Logitech H650e, Jabra 550a, Kingston HyperX needs a tiny
1682
-
* delay here, otherwise requests like get/set frequency return as
1683
-
* failed despite actually succeeding.
1681
+
/* Zoom R16/24, Logitech H650e/H570e, Jabra 550a, Kingston HyperX
1682
+
* needs a tiny delay here, otherwise requests like get/set
1683
+
* frequency return as failed despite actually succeeding.
1684
1684
*/
1685
1685
if ((chip->usb_id == USB_ID(0x1686, 0x00dd) ||
1686
1686
chip->usb_id == USB_ID(0x046d, 0x0a46) ||
1687
+
chip->usb_id == USB_ID(0x046d, 0x0a56) ||
1687
1688
chip->usb_id == USB_ID(0x0b0e, 0x0349) ||
1688
1689
chip->usb_id == USB_ID(0x0951, 0x16ad)) &&
1689
1690
(requesttype & USB_TYPE_MASK) == USB_TYPE_CLASS)
+25
tools/bootconfig/test-bootconfig.sh
+25
tools/bootconfig/test-bootconfig.sh
···
137
137
cat $TEMPCONF
138
138
xpass grep \'\"string\"\' $TEMPCONF
139
139
140
+
echo "Repeat same-key tree"
141
+
cat > $TEMPCONF << EOF
142
+
foo
143
+
bar
144
+
foo { buz }
145
+
EOF
146
+
echo > $INITRD
147
+
148
+
xpass $BOOTCONF -a $TEMPCONF $INITRD
149
+
$BOOTCONF $INITRD > $OUTFILE
150
+
xpass grep -q "bar" $OUTFILE
151
+
152
+
153
+
echo "Remove/keep tailing spaces"
154
+
cat > $TEMPCONF << EOF
155
+
foo = val # comment
156
+
bar = "val2 " # comment
157
+
EOF
158
+
echo > $INITRD
159
+
160
+
xpass $BOOTCONF -a $TEMPCONF $INITRD
161
+
$BOOTCONF $INITRD > $OUTFILE
162
+
xfail grep -q val[[:space:]] $OUTFILE
163
+
xpass grep -q val2[[:space:]] $OUTFILE
164
+
140
165
echo "=== expected failure cases ==="
141
166
for i in samples/bad-* ; do
142
167
xfail $BOOTCONF -a $i $INITRD
+1
-1
tools/bpf/bpftool/Makefile
+1
-1
tools/bpf/bpftool/Makefile
···
25
25
26
26
LIBBPF = $(LIBBPF_PATH)libbpf.a
27
27
28
-
BPFTOOL_VERSION := $(shell make -rR --no-print-directory -sC ../../.. kernelversion)
28
+
BPFTOOL_VERSION ?= $(shell make -rR --no-print-directory -sC ../../.. kernelversion)
29
29
30
30
$(LIBBPF): FORCE
31
31
$(if $(LIBBPF_OUTPUT),@mkdir -p $(LIBBPF_OUTPUT))
+1
-1
tools/lib/bpf/libbpf.c
+1
-1
tools/lib/bpf/libbpf.c
···
8071
8071
BPF_XDP_DEVMAP),
8072
8072
BPF_EAPROG_SEC("xdp_cpumap/", BPF_PROG_TYPE_XDP,
8073
8073
BPF_XDP_CPUMAP),
8074
-
BPF_EAPROG_SEC("xdp", BPF_PROG_TYPE_XDP,
8074
+
BPF_APROG_SEC("xdp", BPF_PROG_TYPE_XDP,
8075
8075
BPF_XDP),
8076
8076
BPF_PROG_SEC("perf_event", BPF_PROG_TYPE_PERF_EVENT),
8077
8077
BPF_PROG_SEC("lwt_in", BPF_PROG_TYPE_LWT_IN),