Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'drm-fixes-2023-01-01' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Daniel Vetter:
"I'm just back from the mountains, and Dave is out at the beach and
should be back in a week again. Just i915 fixes and since Rodrigo
bothered to make the pull last week I figured I should warm up gpg and
forward this in a nice signed tag as a new years present!
- i915 fixes for newer platforms
- i915 locking rework to not give up in vm eviction fallback path too
early"
* tag 'drm-fixes-2023-01-01' of git://anongit.freedesktop.org/drm/drm:
drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO index
drm/i915/dsi: add support for ICL+ native MIPI GPIO sequence
drm/i915/uc: Fix two issues with over-size firmware files
drm/i915: improve the catch-all evict to handle lock contention
drm/i915: Remove __maybe_unused from mtl_info
drm/i915: fix TLB invalidation for Gen12.50 video and compute engines
+212
-45
+91
-3
drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+91
-3
drivers/gpu/drm/i915/display/intel_dsi_vbt.c
···
41
41
42
42
#include "i915_drv.h"
43
43
#include "i915_reg.h"
44
+
#include "intel_de.h"
44
45
#include "intel_display_types.h"
45
46
#include "intel_dsi.h"
46
47
#include "intel_dsi_vbt.h"
48
+
#include "intel_gmbus_regs.h"
47
49
#include "vlv_dsi.h"
48
50
#include "vlv_dsi_regs.h"
49
51
#include "vlv_sideband.h"
···
379
377
drm_dbg_kms(&dev_priv->drm, "Skipping ICL GPIO element execution\n");
380
378
}
381
379
380
+
enum {
381
+
MIPI_RESET_1 = 0,
382
+
MIPI_AVDD_EN_1,
383
+
MIPI_BKLT_EN_1,
384
+
MIPI_AVEE_EN_1,
385
+
MIPI_VIO_EN_1,
386
+
MIPI_RESET_2,
387
+
MIPI_AVDD_EN_2,
388
+
MIPI_BKLT_EN_2,
389
+
MIPI_AVEE_EN_2,
390
+
MIPI_VIO_EN_2,
391
+
};
392
+
393
+
static void icl_native_gpio_set_value(struct drm_i915_private *dev_priv,
394
+
int gpio, bool value)
395
+
{
396
+
int index;
397
+
398
+
if (drm_WARN_ON(&dev_priv->drm, DISPLAY_VER(dev_priv) == 11 && gpio >= MIPI_RESET_2))
399
+
return;
400
+
401
+
switch (gpio) {
402
+
case MIPI_RESET_1:
403
+
case MIPI_RESET_2:
404
+
index = gpio == MIPI_RESET_1 ? HPD_PORT_A : HPD_PORT_B;
405
+
406
+
/*
407
+
* Disable HPD to set the pin to output, and set output
408
+
* value. The HPD pin should not be enabled for DSI anyway,
409
+
* assuming the board design and VBT are sane, and the pin isn't
410
+
* used by a non-DSI encoder.
411
+
*
412
+
* The locking protects against concurrent SHOTPLUG_CTL_DDI
413
+
* modifications in irq setup and handling.
414
+
*/
415
+
spin_lock_irq(&dev_priv->irq_lock);
416
+
intel_de_rmw(dev_priv, SHOTPLUG_CTL_DDI,
417
+
SHOTPLUG_CTL_DDI_HPD_ENABLE(index) |
418
+
SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(index),
419
+
value ? SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(index) : 0);
420
+
spin_unlock_irq(&dev_priv->irq_lock);
421
+
break;
422
+
case MIPI_AVDD_EN_1:
423
+
case MIPI_AVDD_EN_2:
424
+
index = gpio == MIPI_AVDD_EN_1 ? 0 : 1;
425
+
426
+
intel_de_rmw(dev_priv, PP_CONTROL(index), PANEL_POWER_ON,
427
+
value ? PANEL_POWER_ON : 0);
428
+
break;
429
+
case MIPI_BKLT_EN_1:
430
+
case MIPI_BKLT_EN_2:
431
+
index = gpio == MIPI_BKLT_EN_1 ? 0 : 1;
432
+
433
+
intel_de_rmw(dev_priv, PP_CONTROL(index), EDP_BLC_ENABLE,
434
+
value ? EDP_BLC_ENABLE : 0);
435
+
break;
436
+
case MIPI_AVEE_EN_1:
437
+
case MIPI_AVEE_EN_2:
438
+
index = gpio == MIPI_AVEE_EN_1 ? 1 : 2;
439
+
440
+
intel_de_rmw(dev_priv, GPIO(dev_priv, index),
441
+
GPIO_CLOCK_VAL_OUT,
442
+
GPIO_CLOCK_DIR_MASK | GPIO_CLOCK_DIR_OUT |
443
+
GPIO_CLOCK_VAL_MASK | (value ? GPIO_CLOCK_VAL_OUT : 0));
444
+
break;
445
+
case MIPI_VIO_EN_1:
446
+
case MIPI_VIO_EN_2:
447
+
index = gpio == MIPI_VIO_EN_1 ? 1 : 2;
448
+
449
+
intel_de_rmw(dev_priv, GPIO(dev_priv, index),
450
+
GPIO_DATA_VAL_OUT,
451
+
GPIO_DATA_DIR_MASK | GPIO_DATA_DIR_OUT |
452
+
GPIO_DATA_VAL_MASK | (value ? GPIO_DATA_VAL_OUT : 0));
453
+
break;
454
+
default:
455
+
MISSING_CASE(gpio);
456
+
}
457
+
}
458
+
382
459
static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
383
460
{
384
461
struct drm_device *dev = intel_dsi->base.base.dev;
···
465
384
struct intel_connector *connector = intel_dsi->attached_connector;
466
385
u8 gpio_source, gpio_index = 0, gpio_number;
467
386
bool value;
468
-
469
-
drm_dbg_kms(&dev_priv->drm, "\n");
387
+
bool native = DISPLAY_VER(dev_priv) >= 11;
470
388
471
389
if (connector->panel.vbt.dsi.seq_version >= 3)
472
390
gpio_index = *data++;
···
478
398
else
479
399
gpio_source = 0;
480
400
401
+
if (connector->panel.vbt.dsi.seq_version >= 4 && *data & BIT(1))
402
+
native = false;
403
+
481
404
/* pull up/down */
482
405
value = *data++ & 1;
483
406
484
-
if (DISPLAY_VER(dev_priv) >= 11)
407
+
drm_dbg_kms(&dev_priv->drm, "GPIO index %u, number %u, source %u, native %s, set to %s\n",
408
+
gpio_index, gpio_number, gpio_source, str_yes_no(native), str_on_off(value));
409
+
410
+
if (native)
411
+
icl_native_gpio_set_value(dev_priv, gpio_number, value);
412
+
else if (DISPLAY_VER(dev_priv) >= 11)
485
413
icl_exec_gpio(connector, gpio_source, gpio_index, value);
486
414
else if (IS_VALLEYVIEW(dev_priv))
487
415
vlv_exec_gpio(connector, gpio_source, gpio_number, value);
+48
-11
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+48
-11
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
···
730
730
bool unpinned;
731
731
732
732
/*
733
-
* Attempt to pin all of the buffers into the GTT.
734
-
* This is done in 2 phases:
733
+
* We have one more buffers that we couldn't bind, which could be due to
734
+
* various reasons. To resolve this we have 4 passes, with every next
735
+
* level turning the screws tighter:
735
736
*
736
-
* 1. Unbind all objects that do not match the GTT constraints for
737
-
* the execbuffer (fenceable, mappable, alignment etc).
738
-
* 2. Bind new objects.
737
+
* 0. Unbind all objects that do not match the GTT constraints for the
738
+
* execbuffer (fenceable, mappable, alignment etc). Bind all new
739
+
* objects. This avoids unnecessary unbinding of later objects in order
740
+
* to make room for the earlier objects *unless* we need to defragment.
739
741
*
740
-
* This avoid unnecessary unbinding of later objects in order to make
741
-
* room for the earlier objects *unless* we need to defragment.
742
+
* 1. Reorder the buffers, where objects with the most restrictive
743
+
* placement requirements go first (ignoring fixed location buffers for
744
+
* now). For example, objects needing the mappable aperture (the first
745
+
* 256M of GTT), should go first vs objects that can be placed just
746
+
* about anywhere. Repeat the previous pass.
742
747
*
743
-
* Defragmenting is skipped if all objects are pinned at a fixed location.
748
+
* 2. Consider buffers that are pinned at a fixed location. Also try to
749
+
* evict the entire VM this time, leaving only objects that we were
750
+
* unable to lock. Try again to bind the buffers. (still using the new
751
+
* buffer order).
752
+
*
753
+
* 3. We likely have object lock contention for one or more stubborn
754
+
* objects in the VM, for which we need to evict to make forward
755
+
* progress (perhaps we are fighting the shrinker?). When evicting the
756
+
* VM this time around, anything that we can't lock we now track using
757
+
* the busy_bo, using the full lock (after dropping the vm->mutex to
758
+
* prevent deadlocks), instead of trylock. We then continue to evict the
759
+
* VM, this time with the stubborn object locked, which we can now
760
+
* hopefully unbind (if still bound in the VM). Repeat until the VM is
761
+
* evicted. Finally we should be able bind everything.
744
762
*/
745
-
for (pass = 0; pass <= 2; pass++) {
763
+
for (pass = 0; pass <= 3; pass++) {
746
764
int pin_flags = PIN_USER | PIN_VALIDATE;
747
765
748
766
if (pass == 0)
749
767
pin_flags |= PIN_NONBLOCK;
750
768
751
769
if (pass >= 1)
752
-
unpinned = eb_unbind(eb, pass == 2);
770
+
unpinned = eb_unbind(eb, pass >= 2);
753
771
754
772
if (pass == 2) {
755
773
err = mutex_lock_interruptible(&eb->context->vm->mutex);
756
774
if (!err) {
757
-
err = i915_gem_evict_vm(eb->context->vm, &eb->ww);
775
+
err = i915_gem_evict_vm(eb->context->vm, &eb->ww, NULL);
758
776
mutex_unlock(&eb->context->vm->mutex);
777
+
}
778
+
if (err)
779
+
return err;
780
+
}
781
+
782
+
if (pass == 3) {
783
+
retry:
784
+
err = mutex_lock_interruptible(&eb->context->vm->mutex);
785
+
if (!err) {
786
+
struct drm_i915_gem_object *busy_bo = NULL;
787
+
788
+
err = i915_gem_evict_vm(eb->context->vm, &eb->ww, &busy_bo);
789
+
mutex_unlock(&eb->context->vm->mutex);
790
+
if (err && busy_bo) {
791
+
err = i915_gem_object_lock(busy_bo, &eb->ww);
792
+
i915_gem_object_put(busy_bo);
793
+
if (!err)
794
+
goto retry;
795
+
}
759
796
}
760
797
if (err)
761
798
return err;
+1
-1
drivers/gpu/drm/i915/gem/i915_gem_mman.c
+1
-1
drivers/gpu/drm/i915/gem/i915_gem_mman.c
+7
-1
drivers/gpu/drm/i915/gt/intel_gt.c
+7
-1
drivers/gpu/drm/i915/gt/intel_gt.c
···
1109
1109
continue;
1110
1110
1111
1111
if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
1112
+
u32 val = BIT(engine->instance);
1113
+
1114
+
if (engine->class == VIDEO_DECODE_CLASS ||
1115
+
engine->class == VIDEO_ENHANCEMENT_CLASS ||
1116
+
engine->class == COMPUTE_CLASS)
1117
+
val = _MASKED_BIT_ENABLE(val);
1112
1118
intel_gt_mcr_multicast_write_fw(gt,
1113
1119
xehp_regs[engine->class],
1114
-
BIT(engine->instance));
1120
+
val);
1115
1121
} else {
1116
1122
rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
1117
1123
if (!i915_mmio_reg_offset(rb.reg))
+28
-14
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+28
-14
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
···
545
545
return 0;
546
546
}
547
547
548
+
static int try_firmware_load(struct intel_uc_fw *uc_fw, const struct firmware **fw)
549
+
{
550
+
struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
551
+
struct device *dev = gt->i915->drm.dev;
552
+
int err;
553
+
554
+
err = firmware_request_nowarn(fw, uc_fw->file_selected.path, dev);
555
+
556
+
if (err)
557
+
return err;
558
+
559
+
if ((*fw)->size > INTEL_UC_RSVD_GGTT_PER_FW) {
560
+
drm_err(>->i915->drm,
561
+
"%s firmware %s: size (%zuKB) exceeds max supported size (%uKB)\n",
562
+
intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,
563
+
(*fw)->size / SZ_1K, INTEL_UC_RSVD_GGTT_PER_FW / SZ_1K);
564
+
565
+
/* try to find another blob to load */
566
+
release_firmware(*fw);
567
+
*fw = NULL;
568
+
return -ENOENT;
569
+
}
570
+
571
+
return 0;
572
+
}
573
+
548
574
/**
549
575
* intel_uc_fw_fetch - fetch uC firmware
550
576
* @uc_fw: uC firmware
···
584
558
struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
585
559
struct drm_i915_private *i915 = gt->i915;
586
560
struct intel_uc_fw_file file_ideal;
587
-
struct device *dev = i915->drm.dev;
588
561
struct drm_i915_gem_object *obj;
589
562
const struct firmware *fw = NULL;
590
563
bool old_ver = false;
···
599
574
__force_fw_fetch_failures(uc_fw, -EINVAL);
600
575
__force_fw_fetch_failures(uc_fw, -ESTALE);
601
576
602
-
err = firmware_request_nowarn(&fw, uc_fw->file_selected.path, dev);
577
+
err = try_firmware_load(uc_fw, &fw);
603
578
memcpy(&file_ideal, &uc_fw->file_wanted, sizeof(file_ideal));
604
-
605
-
if (!err && fw->size > INTEL_UC_RSVD_GGTT_PER_FW) {
606
-
drm_err(&i915->drm,
607
-
"%s firmware %s: size (%zuKB) exceeds max supported size (%uKB)\n",
608
-
intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,
609
-
fw->size / SZ_1K, INTEL_UC_RSVD_GGTT_PER_FW / SZ_1K);
610
-
611
-
/* try to find another blob to load */
612
-
release_firmware(fw);
613
-
err = -ENOENT;
614
-
}
615
579
616
580
/* Any error is terminal if overriding. Don't bother searching for older versions */
617
581
if (err && intel_uc_fw_is_overridden(uc_fw))
···
622
608
break;
623
609
}
624
610
625
-
err = firmware_request_nowarn(&fw, uc_fw->file_selected.path, dev);
611
+
err = try_firmware_load(uc_fw, &fw);
626
612
}
627
613
628
614
if (err)
+27
-10
drivers/gpu/drm/i915/i915_gem_evict.c
+27
-10
drivers/gpu/drm/i915/i915_gem_evict.c
···
416
416
* @vm: Address space to cleanse
417
417
* @ww: An optional struct i915_gem_ww_ctx. If not NULL, i915_gem_evict_vm
418
418
* will be able to evict vma's locked by the ww as well.
419
+
* @busy_bo: Optional pointer to struct drm_i915_gem_object. If not NULL, then
420
+
* in the event i915_gem_evict_vm() is unable to trylock an object for eviction,
421
+
* then @busy_bo will point to it. -EBUSY is also returned. The caller must drop
422
+
* the vm->mutex, before trying again to acquire the contended lock. The caller
423
+
* also owns a reference to the object.
419
424
*
420
425
* This function evicts all vmas from a vm.
421
426
*
···
430
425
* To clarify: This is for freeing up virtual address space, not for freeing
431
426
* memory in e.g. the shrinker.
432
427
*/
433
-
int i915_gem_evict_vm(struct i915_address_space *vm, struct i915_gem_ww_ctx *ww)
428
+
int i915_gem_evict_vm(struct i915_address_space *vm, struct i915_gem_ww_ctx *ww,
429
+
struct drm_i915_gem_object **busy_bo)
434
430
{
435
431
int ret = 0;
436
432
···
463
457
* the resv is shared among multiple objects, we still
464
458
* need the object ref.
465
459
*/
466
-
if (dying_vma(vma) ||
460
+
if (!i915_gem_object_get_rcu(vma->obj) ||
467
461
(ww && (dma_resv_locking_ctx(vma->obj->base.resv) == &ww->ctx))) {
468
462
__i915_vma_pin(vma);
469
463
list_add(&vma->evict_link, &locked_eviction_list);
470
464
continue;
471
465
}
472
466
473
-
if (!i915_gem_object_trylock(vma->obj, ww))
467
+
if (!i915_gem_object_trylock(vma->obj, ww)) {
468
+
if (busy_bo) {
469
+
*busy_bo = vma->obj; /* holds ref */
470
+
ret = -EBUSY;
471
+
break;
472
+
}
473
+
i915_gem_object_put(vma->obj);
474
474
continue;
475
+
}
475
476
476
477
__i915_vma_pin(vma);
477
478
list_add(&vma->evict_link, &eviction_list);
···
486
473
if (list_empty(&eviction_list) && list_empty(&locked_eviction_list))
487
474
break;
488
475
489
-
ret = 0;
490
476
/* Unbind locked objects first, before unlocking the eviction_list */
491
477
list_for_each_entry_safe(vma, vn, &locked_eviction_list, evict_link) {
492
478
__i915_vma_unpin(vma);
493
479
494
-
if (ret == 0)
480
+
if (ret == 0) {
495
481
ret = __i915_vma_unbind(vma);
496
-
if (ret != -EINTR) /* "Get me out of here!" */
497
-
ret = 0;
482
+
if (ret != -EINTR) /* "Get me out of here!" */
483
+
ret = 0;
484
+
}
485
+
if (!dying_vma(vma))
486
+
i915_gem_object_put(vma->obj);
498
487
}
499
488
500
489
list_for_each_entry_safe(vma, vn, &eviction_list, evict_link) {
501
490
__i915_vma_unpin(vma);
502
-
if (ret == 0)
491
+
if (ret == 0) {
503
492
ret = __i915_vma_unbind(vma);
504
-
if (ret != -EINTR) /* "Get me out of here!" */
505
-
ret = 0;
493
+
if (ret != -EINTR) /* "Get me out of here!" */
494
+
ret = 0;
495
+
}
506
496
507
497
i915_gem_object_unlock(vma->obj);
498
+
i915_gem_object_put(vma->obj);
508
499
}
509
500
} while (ret == 0);
510
501
+3
-1
drivers/gpu/drm/i915/i915_gem_evict.h
+3
-1
drivers/gpu/drm/i915/i915_gem_evict.h
···
11
11
struct drm_mm_node;
12
12
struct i915_address_space;
13
13
struct i915_gem_ww_ctx;
14
+
struct drm_i915_gem_object;
14
15
15
16
int __must_check i915_gem_evict_something(struct i915_address_space *vm,
16
17
struct i915_gem_ww_ctx *ww,
···
24
23
struct drm_mm_node *node,
25
24
unsigned int flags);
26
25
int i915_gem_evict_vm(struct i915_address_space *vm,
27
-
struct i915_gem_ww_ctx *ww);
26
+
struct i915_gem_ww_ctx *ww,
27
+
struct drm_i915_gem_object **busy_bo);
28
28
29
29
#endif /* __I915_GEM_EVICT_H__ */
+3
drivers/gpu/drm/i915/i915_irq.c
+3
drivers/gpu/drm/i915/i915_irq.c
···
1974
1974
if (ddi_hotplug_trigger) {
1975
1975
u32 dig_hotplug_reg;
1976
1976
1977
+
/* Locking due to DSI native GPIO sequences */
1978
+
spin_lock(&dev_priv->irq_lock);
1977
1979
dig_hotplug_reg = intel_uncore_rmw(&dev_priv->uncore, SHOTPLUG_CTL_DDI, 0, 0);
1980
+
spin_unlock(&dev_priv->irq_lock);
1978
1981
1979
1982
intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
1980
1983
ddi_hotplug_trigger, dig_hotplug_reg,
-1
drivers/gpu/drm/i915/i915_pci.c
-1
drivers/gpu/drm/i915/i915_pci.c
+1
drivers/gpu/drm/i915/i915_reg.h
+1
drivers/gpu/drm/i915/i915_reg.h
···
5988
5988
5989
5989
#define SHOTPLUG_CTL_DDI _MMIO(0xc4030)
5990
5990
#define SHOTPLUG_CTL_DDI_HPD_ENABLE(hpd_pin) (0x8 << (_HPD_PIN_DDI(hpd_pin) * 4))
5991
+
#define SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(hpd_pin) (0x4 << (_HPD_PIN_DDI(hpd_pin) * 4))
5991
5992
#define SHOTPLUG_CTL_DDI_HPD_STATUS_MASK(hpd_pin) (0x3 << (_HPD_PIN_DDI(hpd_pin) * 4))
5992
5993
#define SHOTPLUG_CTL_DDI_HPD_NO_DETECT(hpd_pin) (0x0 << (_HPD_PIN_DDI(hpd_pin) * 4))
5993
5994
#define SHOTPLUG_CTL_DDI_HPD_SHORT_DETECT(hpd_pin) (0x1 << (_HPD_PIN_DDI(hpd_pin) * 4))
+1
-1
drivers/gpu/drm/i915/i915_vma.c
+1
-1
drivers/gpu/drm/i915/i915_vma.c
+2
-2
drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+2
-2
drivers/gpu/drm/i915/selftests/i915_gem_evict.c
···
344
344
345
345
/* Everything is pinned, nothing should happen */
346
346
mutex_lock(&ggtt->vm.mutex);
347
-
err = i915_gem_evict_vm(&ggtt->vm, NULL);
347
+
err = i915_gem_evict_vm(&ggtt->vm, NULL, NULL);
348
348
mutex_unlock(&ggtt->vm.mutex);
349
349
if (err) {
350
350
pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
···
356
356
357
357
for_i915_gem_ww(&ww, err, false) {
358
358
mutex_lock(&ggtt->vm.mutex);
359
-
err = i915_gem_evict_vm(&ggtt->vm, &ww);
359
+
err = i915_gem_evict_vm(&ggtt->vm, &ww, NULL);
360
360
mutex_unlock(&ggtt->vm.mutex);
361
361
}
362
362