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bpf, arm64: Emit A64_{ADD,SUB}_I when possible in emit_{lse,ll_sc}_atomic()

Currently in emit_{lse,ll_sc}_atomic(), if there is an offset, we add it
to the base address by doing e.g.:

if (off) {
emit_a64_mov_i(1, tmp, off, ctx);
emit(A64_ADD(1, tmp, tmp, dst), ctx);
[...]

As pointed out by Xu, we can use emit_a64_add_i() (added in the previous
patch) instead, which tries to combine the above into a single A64_ADD_I
or A64_SUB_I when possible.

Suggested-by: Xu Kuohai <xukuohai@huaweicloud.com>
Signed-off-by: Peilin Ye <yepeilin@google.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Xu Kuohai <xukuohai@huawei.com>
Link: https://lore.kernel.org/bpf/9ad3034a62361d91a99af24efa03f48c4c9e13ea.1735868489.git.yepeilin@google.com

authored by

Peilin Ye and committed by
Daniel Borkmann 8c21f884 66bb58ac

+4 -8
+4 -8
arch/arm64/net/bpf_jit_comp.c
··· 662 662 u8 reg = dst; 663 663 664 664 if (off) { 665 - emit_a64_mov_i(1, tmp, off, ctx); 666 - emit(A64_ADD(1, tmp, tmp, dst), ctx); 665 + emit_a64_add_i(1, tmp, reg, tmp, off, ctx); 667 666 reg = tmp; 668 667 } 669 668 if (arena) { ··· 733 734 const s32 imm = insn->imm; 734 735 const s16 off = insn->off; 735 736 const bool isdw = BPF_SIZE(code) == BPF_DW; 736 - u8 reg; 737 + u8 reg = dst; 737 738 s32 jmp_offset; 738 739 739 740 if (BPF_MODE(code) == BPF_PROBE_ATOMIC) { ··· 742 743 return -EINVAL; 743 744 } 744 745 745 - if (!off) { 746 - reg = dst; 747 - } else { 748 - emit_a64_mov_i(1, tmp, off, ctx); 749 - emit(A64_ADD(1, tmp, tmp, dst), ctx); 746 + if (off) { 747 + emit_a64_add_i(1, tmp, reg, tmp, off, ctx); 750 748 reg = tmp; 751 749 } 752 750