Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm_mpam: Probe the hardware features resctrl supports
Expand the probing support with the control and monitor types
we can use with resctrl.
CC: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Fenghua Yu <fenghuay@nvidia.com>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Tested-by: Fenghua Yu <fenghuay@nvidia.com>
Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Tested-by: Peter Newman <peternewman@google.com>
Tested-by: Carl Worth <carl@os.amperecomputing.com>
Tested-by: Gavin Shan <gshan@redhat.com>
Tested-by: Zeng Heng <zengheng4@huawei.com>
Tested-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
authored by
James Morse
and committed by
Catalin Marinas
8c90dc68
d02beb06
+182
+149
drivers/resctrl/mpam_devices.c
+149
drivers/resctrl/mpam_devices.c
···
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#define mpam_write_partsel_reg(msc, reg, val) _mpam_write_partsel_reg(msc, MPAMCFG_##reg, val)
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static inline u32 _mpam_read_monsel_reg(struct mpam_msc *msc, u16 reg)
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{
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mpam_mon_sel_lock_held(msc);
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return __mpam_read_reg(msc, reg);
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}
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+
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#define mpam_read_monsel_reg(msc, reg) _mpam_read_monsel_reg(msc, MSMON_##reg)
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+
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static inline void _mpam_write_monsel_reg(struct mpam_msc *msc, u16 reg, u32 val)
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{
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mpam_mon_sel_lock_held(msc);
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__mpam_write_reg(msc, reg, val);
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}
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#define mpam_write_monsel_reg(msc, reg, val) _mpam_write_monsel_reg(msc, MSMON_##reg, val)
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static u64 mpam_msc_read_idr(struct mpam_msc *msc)
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{
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u64 idr_high = 0, idr_low;
···
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return ERR_PTR(-ENOENT);
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}
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/*
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* IHI009A.a has this nugget: "If a monitor does not support automatic behaviour
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* of NRDY, software can use this bit for any purpose" - so hardware might not
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* implement this - but it isn't RES0.
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*
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* Try and see what values stick in this bit. If we can write either value,
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* its probably not implemented by hardware.
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*/
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static bool _mpam_ris_hw_probe_hw_nrdy(struct mpam_msc_ris *ris, u32 mon_reg)
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{
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u32 now;
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u64 mon_sel;
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bool can_set, can_clear;
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struct mpam_msc *msc = ris->vmsc->msc;
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if (WARN_ON_ONCE(!mpam_mon_sel_lock(msc)))
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return false;
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+
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mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, 0) |
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FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx);
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_mpam_write_monsel_reg(msc, mon_reg, mon_sel);
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+
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_mpam_write_monsel_reg(msc, mon_reg, MSMON___NRDY);
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now = _mpam_read_monsel_reg(msc, mon_reg);
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can_set = now & MSMON___NRDY;
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_mpam_write_monsel_reg(msc, mon_reg, 0);
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now = _mpam_read_monsel_reg(msc, mon_reg);
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can_clear = !(now & MSMON___NRDY);
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mpam_mon_sel_unlock(msc);
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return (!can_set || !can_clear);
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}
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+
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#define mpam_ris_hw_probe_hw_nrdy(_ris, _mon_reg) \
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_mpam_ris_hw_probe_hw_nrdy(_ris, MSMON_##_mon_reg)
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+
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static void mpam_ris_hw_probe(struct mpam_msc_ris *ris)
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{
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int err;
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struct mpam_msc *msc = ris->vmsc->msc;
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struct device *dev = &msc->pdev->dev;
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struct mpam_props *props = &ris->props;
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+
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lockdep_assert_held(&msc->probe_lock);
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lockdep_assert_held(&msc->part_sel_lock);
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/* Cache Portion partitioning */
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if (FIELD_GET(MPAMF_IDR_HAS_CPOR_PART, ris->idr)) {
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u32 cpor_features = mpam_read_partsel_reg(msc, CPOR_IDR);
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props->cpbm_wd = FIELD_GET(MPAMF_CPOR_IDR_CPBM_WD, cpor_features);
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if (props->cpbm_wd)
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mpam_set_feature(mpam_feat_cpor_part, props);
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}
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+
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/* Memory bandwidth partitioning */
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if (FIELD_GET(MPAMF_IDR_HAS_MBW_PART, ris->idr)) {
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u32 mbw_features = mpam_read_partsel_reg(msc, MBW_IDR);
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/* portion bitmap resolution */
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props->mbw_pbm_bits = FIELD_GET(MPAMF_MBW_IDR_BWPBM_WD, mbw_features);
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if (props->mbw_pbm_bits &&
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FIELD_GET(MPAMF_MBW_IDR_HAS_PBM, mbw_features))
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mpam_set_feature(mpam_feat_mbw_part, props);
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props->bwa_wd = FIELD_GET(MPAMF_MBW_IDR_BWA_WD, mbw_features);
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if (props->bwa_wd && FIELD_GET(MPAMF_MBW_IDR_HAS_MAX, mbw_features))
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mpam_set_feature(mpam_feat_mbw_max, props);
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}
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/* Performance Monitoring */
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if (FIELD_GET(MPAMF_IDR_HAS_MSMON, ris->idr)) {
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u32 msmon_features = mpam_read_partsel_reg(msc, MSMON_IDR);
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/*
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* If the firmware max-nrdy-us property is missing, the
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* CSU counters can't be used. Should we wait forever?
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*/
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err = device_property_read_u32(&msc->pdev->dev,
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"arm,not-ready-us",
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&msc->nrdy_usec);
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if (FIELD_GET(MPAMF_MSMON_IDR_MSMON_CSU, msmon_features)) {
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u32 csumonidr;
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csumonidr = mpam_read_partsel_reg(msc, CSUMON_IDR);
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props->num_csu_mon = FIELD_GET(MPAMF_CSUMON_IDR_NUM_MON, csumonidr);
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if (props->num_csu_mon) {
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bool hw_managed;
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mpam_set_feature(mpam_feat_msmon_csu, props);
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/* Is NRDY hardware managed? */
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hw_managed = mpam_ris_hw_probe_hw_nrdy(ris, CSU);
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if (hw_managed)
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mpam_set_feature(mpam_feat_msmon_csu_hw_nrdy, props);
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}
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/*
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* Accept the missing firmware property if NRDY appears
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* un-implemented.
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*/
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if (err && mpam_has_feature(mpam_feat_msmon_csu_hw_nrdy, props))
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dev_err_once(dev, "Counters are not usable because not-ready timeout was not provided by firmware.");
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}
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if (FIELD_GET(MPAMF_MSMON_IDR_MSMON_MBWU, msmon_features)) {
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bool hw_managed;
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u32 mbwumon_idr = mpam_read_partsel_reg(msc, MBWUMON_IDR);
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props->num_mbwu_mon = FIELD_GET(MPAMF_MBWUMON_IDR_NUM_MON, mbwumon_idr);
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if (props->num_mbwu_mon)
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mpam_set_feature(mpam_feat_msmon_mbwu, props);
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/* Is NRDY hardware managed? */
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hw_managed = mpam_ris_hw_probe_hw_nrdy(ris, MBWU);
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if (hw_managed)
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mpam_set_feature(mpam_feat_msmon_mbwu_hw_nrdy, props);
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/*
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* Don't warn about any missing firmware property for
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* MBWU NRDY - it doesn't make any sense!
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*/
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}
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}
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}
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static int mpam_msc_hw_probe(struct mpam_msc *msc)
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{
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u64 idr;
···
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mutex_unlock(&mpam_list_lock);
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if (IS_ERR(ris))
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return PTR_ERR(ris);
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ris->idr = idr;
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mutex_lock(&msc->part_sel_lock);
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__mpam_part_sel(ris_idx, 0, msc);
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mpam_ris_hw_probe(ris);
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mutex_unlock(&msc->part_sel_lock);
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}
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spin_lock(&partid_max_lock);
+33
drivers/resctrl/mpam_internal.h
+33
drivers/resctrl/mpam_internal.h
···
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#define MPAM_INTERNAL_H
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#include <linux/arm_mpam.h>
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#include <linux/bitmap.h>
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#include <linux/cpumask.h>
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#include <linux/io.h>
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#include <linux/llist.h>
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#include <linux/mutex.h>
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#include <linux/srcu.h>
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#include <linux/spinlock.h>
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#include <linux/srcu.h>
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#include <linux/types.h>
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#define MPAM_MSC_MAX_NUM_RIS 16
···
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raw_spin_lock_init(&msc->_mon_sel_lock);
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}
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/* Bits for mpam features bitmaps */
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enum mpam_device_features {
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mpam_feat_cpor_part,
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mpam_feat_mbw_part,
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mpam_feat_mbw_min,
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mpam_feat_mbw_max,
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mpam_feat_msmon,
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mpam_feat_msmon_csu,
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mpam_feat_msmon_csu_hw_nrdy,
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mpam_feat_msmon_mbwu,
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mpam_feat_msmon_mbwu_hw_nrdy,
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MPAM_FEATURE_LAST
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};
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struct mpam_props {
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DECLARE_BITMAP(features, MPAM_FEATURE_LAST);
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u16 cpbm_wd;
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u16 mbw_pbm_bits;
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u16 bwa_wd;
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u16 num_csu_mon;
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u16 num_mbwu_mon;
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};
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#define mpam_has_feature(_feat, x) test_bit(_feat, (x)->features)
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#define mpam_set_feature(_feat, x) set_bit(_feat, (x)->features)
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struct mpam_class {
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/* mpam_components in this class */
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struct list_head components;
···
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/* mpam_msc_ris in this vmsc */
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struct list_head ris;
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struct mpam_props props;
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/* All RIS in this vMSC are members of this MSC */
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struct mpam_msc *msc;
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···
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struct mpam_msc_ris {
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u8 ris_idx;
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u64 idr;
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struct mpam_props props;
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cpumask_t affinity;
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