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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'there-are-some-bugfix-for-hibmcge-driver'
Jijie Shao says:
====================
There are some bugfix for hibmcge driver
v2: https://lore.kernel.org/20250403135311.545633-7-shaojijie@huawei.com/
v1: https://lore.kernel.org/20250402133905.895421-1-shaojijie@huawei.com/
====================
Link: https://patch.msgid.link/20250410021327.590362-1-shaojijie@huawei.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+55
-22
+5
-3
drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h
+5
-3
drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h
···
108
108
bool re_enable;
109
109
bool need_print;
110
110
bool need_reset;
111
-
u64 count;
112
111
113
-
void (*irq_handle)(struct hbg_priv *priv, struct hbg_irq_info *info);
112
+
void (*irq_handle)(struct hbg_priv *priv,
113
+
const struct hbg_irq_info *info);
114
114
};
115
115
116
116
struct hbg_vector {
117
117
char name[HBG_VECTOR_NUM][32];
118
-
struct hbg_irq_info *info_array;
118
+
119
+
u64 *stats_array;
120
+
const struct hbg_irq_info *info_array;
119
121
u32 info_array_len;
120
122
};
121
123
+7
-4
drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c
+7
-4
drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c
···
61
61
{
62
62
struct net_device *netdev = dev_get_drvdata(s->private);
63
63
struct hbg_priv *priv = netdev_priv(netdev);
64
-
struct hbg_irq_info *info;
64
+
const struct hbg_irq_info *info;
65
65
u32 i;
66
66
67
67
for (i = 0; i < priv->vectors.info_array_len; i++) {
···
73
73
info->mask)),
74
74
str_true_false(info->need_reset),
75
75
str_true_false(info->need_print),
76
-
info->count);
76
+
priv->vectors.stats_array[i]);
77
77
}
78
78
79
79
return 0;
···
106
106
{
107
107
struct net_device *netdev = dev_get_drvdata(s->private);
108
108
struct hbg_priv *priv = netdev_priv(netdev);
109
+
bool np_link_fail;
109
110
110
111
seq_printf(s, "event handling state: %s\n",
111
112
state_str_true_false(priv, HBG_NIC_STATE_EVENT_HANDLING));
···
118
117
reset_type_str[priv->reset_type]);
119
118
seq_printf(s, "need reset state: %s\n",
120
119
state_str_true_false(priv, HBG_NIC_STATE_NEED_RESET));
121
-
seq_printf(s, "np_link fail state: %s\n",
122
-
state_str_true_false(priv, HBG_NIC_STATE_NP_LINK_FAIL));
120
+
121
+
np_link_fail = !hbg_reg_read_field(priv, HBG_REG_AN_NEG_STATE_ADDR,
122
+
HBG_REG_AN_NEG_STATE_NP_LINK_OK_B);
123
+
seq_printf(s, "np_link fail state: %s\n", str_true_false(np_link_fail));
123
124
124
125
return 0;
125
126
}
+1
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c
+1
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c
···
26
26
27
27
static void hbg_restore_user_def_settings(struct hbg_priv *priv)
28
28
{
29
+
/* The index of host mac is always 0. */
30
+
u64 rx_pause_addr = ether_addr_to_u64(priv->filter.mac_table[0].addr);
29
31
struct ethtool_pauseparam *pause_param = &priv->user_def.pause_param;
30
32
31
33
hbg_restore_mac_table(priv);
32
34
hbg_hw_set_mtu(priv, priv->netdev->mtu);
33
35
hbg_hw_set_pause_enable(priv, pause_param->tx_pause,
34
36
pause_param->rx_pause);
37
+
hbg_hw_set_rx_pause_mac_addr(priv, rx_pause_addr);
35
38
}
36
39
37
40
int hbg_rebuild(struct hbg_priv *priv)
+7
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c
+7
drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c
···
234
234
{
235
235
hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,
236
236
HBG_REG_REC_FILT_CTRL_UC_MATCH_EN_B, enable);
237
+
238
+
/* only uc filter is supported, so set all bits of mc mask reg to 1 */
239
+
hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_MSK_0, U64_MAX);
240
+
hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_MSK_1, U64_MAX);
237
241
}
238
242
239
243
void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en)
···
246
242
HBG_REG_PAUSE_ENABLE_TX_B, tx_en);
247
243
hbg_reg_write_field(priv, HBG_REG_PAUSE_ENABLE_ADDR,
248
244
HBG_REG_PAUSE_ENABLE_RX_B, rx_en);
245
+
246
+
hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,
247
+
HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B, rx_en);
249
248
}
250
249
251
250
void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en)
+15
-9
drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c
+15
-9
drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c
···
6
6
#include "hbg_hw.h"
7
7
8
8
static void hbg_irq_handle_err(struct hbg_priv *priv,
9
-
struct hbg_irq_info *irq_info)
9
+
const struct hbg_irq_info *irq_info)
10
10
{
11
11
if (irq_info->need_print)
12
12
dev_err(&priv->pdev->dev,
···
17
17
}
18
18
19
19
static void hbg_irq_handle_tx(struct hbg_priv *priv,
20
-
struct hbg_irq_info *irq_info)
20
+
const struct hbg_irq_info *irq_info)
21
21
{
22
22
napi_schedule(&priv->tx_ring.napi);
23
23
}
24
24
25
25
static void hbg_irq_handle_rx(struct hbg_priv *priv,
26
-
struct hbg_irq_info *irq_info)
26
+
const struct hbg_irq_info *irq_info)
27
27
{
28
28
napi_schedule(&priv->rx_ring.napi);
29
29
}
30
30
31
31
static void hbg_irq_handle_rx_buf_val(struct hbg_priv *priv,
32
-
struct hbg_irq_info *irq_info)
32
+
const struct hbg_irq_info *irq_info)
33
33
{
34
34
priv->stats.rx_fifo_less_empty_thrsld_cnt++;
35
35
}
36
36
37
37
#define HBG_IRQ_I(name, handle) \
38
-
{#name, HBG_INT_MSK_##name##_B, false, false, false, 0, handle}
38
+
{#name, HBG_INT_MSK_##name##_B, false, false, false, handle}
39
39
#define HBG_ERR_IRQ_I(name, need_print, ndde_reset) \
40
40
{#name, HBG_INT_MSK_##name##_B, true, need_print, \
41
-
ndde_reset, 0, hbg_irq_handle_err}
41
+
ndde_reset, hbg_irq_handle_err}
42
42
43
-
static struct hbg_irq_info hbg_irqs[] = {
43
+
static const struct hbg_irq_info hbg_irqs[] = {
44
44
HBG_IRQ_I(RX, hbg_irq_handle_rx),
45
45
HBG_IRQ_I(TX, hbg_irq_handle_tx),
46
46
HBG_ERR_IRQ_I(TX_PKT_CPL, true, true),
···
64
64
65
65
static irqreturn_t hbg_irq_handle(int irq_num, void *p)
66
66
{
67
-
struct hbg_irq_info *info;
67
+
const struct hbg_irq_info *info;
68
68
struct hbg_priv *priv = p;
69
69
u32 status;
70
70
u32 i;
···
79
79
hbg_hw_irq_enable(priv, info->mask, false);
80
80
hbg_hw_irq_clear(priv, info->mask);
81
81
82
-
info->count++;
82
+
priv->vectors.stats_array[i]++;
83
83
if (info->irq_handle)
84
84
info->irq_handle(priv, info);
85
85
···
131
131
"failed to request irq: %s\n",
132
132
irq_names_map[i]);
133
133
}
134
+
135
+
vectors->stats_array = devm_kcalloc(&priv->pdev->dev,
136
+
ARRAY_SIZE(hbg_irqs),
137
+
sizeof(u64), GFP_KERNEL);
138
+
if (!vectors->stats_array)
139
+
return -ENOMEM;
134
140
135
141
vectors->info_array = hbg_irqs;
136
142
vectors->info_array_len = ARRAY_SIZE(hbg_irqs);
+4
-4
drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c
+4
-4
drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c
···
21
21
22
22
static void hbg_all_irq_enable(struct hbg_priv *priv, bool enabled)
23
23
{
24
-
struct hbg_irq_info *info;
24
+
const struct hbg_irq_info *info;
25
25
u32 i;
26
26
27
27
for (i = 0; i < priv->vectors.info_array_len; i++) {
···
203
203
if (netif_running(netdev))
204
204
return -EBUSY;
205
205
206
-
hbg_hw_set_mtu(priv, new_mtu);
207
-
WRITE_ONCE(netdev->mtu, new_mtu);
208
-
209
206
dev_dbg(&priv->pdev->dev,
210
207
"change mtu from %u to %u\n", netdev->mtu, new_mtu);
208
+
209
+
hbg_hw_set_mtu(priv, new_mtu);
210
+
WRITE_ONCE(netdev->mtu, new_mtu);
211
211
212
212
return 0;
213
213
}
+10
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c
+10
-1
drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c
···
2
2
// Copyright (c) 2024 Hisilicon Limited.
3
3
4
4
#include <linux/phy.h>
5
+
#include <linux/rtnetlink.h>
5
6
#include "hbg_common.h"
6
7
#include "hbg_hw.h"
7
8
#include "hbg_mdio.h"
···
134
133
{
135
134
struct device *dev = &priv->pdev->dev;
136
135
136
+
rtnl_lock();
137
+
137
138
if (priv->stats.np_link_fail_cnt >= HBG_NP_LINK_FAIL_RETRY_TIMES) {
138
139
dev_err(dev, "failed to fix the MAC link status\n");
139
140
priv->stats.np_link_fail_cnt = 0;
140
-
return;
141
+
goto unlock;
141
142
}
143
+
144
+
if (!priv->mac.phydev->link)
145
+
goto unlock;
142
146
143
147
priv->stats.np_link_fail_cnt++;
144
148
dev_err(dev, "failed to link between MAC and PHY, try to fix...\n");
···
153
147
*/
154
148
hbg_phy_stop(priv);
155
149
hbg_phy_start(priv);
150
+
151
+
unlock:
152
+
rtnl_unlock();
156
153
}
157
154
158
155
static void hbg_phy_adjust_link(struct net_device *netdev)
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
+3
drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h
···
68
68
#define HBG_REG_TRANSMIT_CTRL_AN_EN_B BIT(5)
69
69
#define HBG_REG_REC_FILT_CTRL_ADDR (HBG_REG_SGMII_BASE + 0x0064)
70
70
#define HBG_REG_REC_FILT_CTRL_UC_MATCH_EN_B BIT(0)
71
+
#define HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B BIT(4)
71
72
#define HBG_REG_RX_OCTETS_TOTAL_OK_ADDR (HBG_REG_SGMII_BASE + 0x0080)
72
73
#define HBG_REG_RX_OCTETS_BAD_ADDR (HBG_REG_SGMII_BASE + 0x0084)
73
74
#define HBG_REG_RX_UC_PKTS_ADDR (HBG_REG_SGMII_BASE + 0x0088)
···
135
134
#define HBG_REG_STATION_ADDR_HIGH_4_ADDR (HBG_REG_SGMII_BASE + 0x0224)
136
135
#define HBG_REG_STATION_ADDR_LOW_5_ADDR (HBG_REG_SGMII_BASE + 0x0228)
137
136
#define HBG_REG_STATION_ADDR_HIGH_5_ADDR (HBG_REG_SGMII_BASE + 0x022C)
137
+
#define HBG_REG_STATION_ADDR_LOW_MSK_0 (HBG_REG_SGMII_BASE + 0x0230)
138
+
#define HBG_REG_STATION_ADDR_LOW_MSK_1 (HBG_REG_SGMII_BASE + 0x0238)
138
139
139
140
/* PCU */
140
141
#define HBG_REG_TX_FIFO_THRSLD_ADDR (HBG_REG_SGMII_BASE + 0x0420)