Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/xe/tuning: Apply windower hardware filtering setting on Xe3 and Xe3p
A recent bspec tuning guide update asks us to program
COMMON_SLICE_CHICKEN4[5] on Xe3 and Xe3p platforms. Add this setting to
our LRC tuning RTP table so that the setting will become part of each
context's LRC.
Bspec: 72161, 55902
Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com>
Link: https://patch.msgid.link/20260224235055.3038710-2-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+6
+1
drivers/gpu/drm/xe/regs/xe_gt_regs.h
+1
drivers/gpu/drm/xe/regs/xe_gt_regs.h
···
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#define COMMON_SLICE_CHICKEN4 XE_REG(0x7300, XE_REG_OPTION_MASKED)
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#define SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE REG_BIT(12)
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#define DISABLE_TDC_LOAD_BALANCING_CALC REG_BIT(6)
179
+
#define HW_FILTERING REG_BIT(5)
179
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#define COMMON_SLICE_CHICKEN3 XE_REG(0x7304, XE_REG_OPTION_MASKED)
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#define XEHP_COMMON_SLICE_CHICKEN3 XE_REG_MCR(0x7304, XE_REG_OPTION_MASKED)
+5
drivers/gpu/drm/xe/xe_tuning.c
+5
drivers/gpu/drm/xe/xe_tuning.c
···
127
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};
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static const struct xe_rtp_entry_sr lrc_tunings[] = {
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+
{ XE_RTP_NAME("Tuning: Windower HW Filtering"),
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+
XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3599), ENGINE_CLASS(RENDER)),
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+
XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, HW_FILTERING))
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+
},
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+
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/* DG2 */
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{ XE_RTP_NAME("Tuning: L3 cache"),