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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:
"Various arm64 fixes:
- ftrace branch generation fix
- branch instruction encoding fix
- include files, guards and unused prototypes clean-up
- minor VDSO ABI fix (clock_getres)
- PSCI functions moved to .S to avoid compilation error with gcc 5
- pte_modify fix to not ignore the mapping type
- crypto: AES interleaved increased to 4x (for performance reasons)
- text patching fix for modules
- swiotlb increased back to 64MB
- copy_siginfo_to_user32() fix for big endian"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: cpuidle: add asm/proc-fns.h inclusion
arm64: compat Fix siginfo_t -> compat_siginfo_t conversion on big endian
arm64: Increase the swiotlb buffer size 64MB
arm64: Fix text patching logic when using fixmap
arm64: crypto: increase AES interleave to 4x
arm64: enable PTE type bit in the mask for pte_modify
arm64: mm: remove unused functions and variable protoypes
arm64: psci: move psci firmware calls out of line
arm64: vdso: minor ABI fix for clock_getres
arm64: guard asm/assembler.h against multiple inclusions
arm64: insn: fix compare-and-branch encodings
arm64: ftrace: fix ftrace_modify_graph_caller for branch replace

+68 -71
+1 -1
arch/arm64/crypto/Makefile
··· 29 29 obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o 30 30 aes-neon-blk-y := aes-glue-neon.o aes-neon.o 31 31 32 - AFLAGS_aes-ce.o := -DINTERLEAVE=2 -DINTERLEAVE_INLINE 32 + AFLAGS_aes-ce.o := -DINTERLEAVE=4 33 33 AFLAGS_aes-neon.o := -DINTERLEAVE=4 34 34 35 35 CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS
+5
arch/arm64/include/asm/assembler.h
··· 20 20 #error "Only include this from assembly code" 21 21 #endif 22 22 23 + #ifndef __ASM_ASSEMBLER_H 24 + #define __ASM_ASSEMBLER_H 25 + 23 26 #include <asm/ptrace.h> 24 27 #include <asm/thread_info.h> 25 28 ··· 158 155 #endif 159 156 orr \rd, \lbits, \hbits, lsl #32 160 157 .endm 158 + 159 + #endif /* __ASM_ASSEMBLER_H */
+2
arch/arm64/include/asm/cpuidle.h
··· 1 1 #ifndef __ASM_CPUIDLE_H 2 2 #define __ASM_CPUIDLE_H 3 3 4 + #include <asm/proc-fns.h> 5 + 4 6 #ifdef CONFIG_CPU_IDLE 5 7 extern int cpu_init_idle(unsigned int cpu); 6 8 extern int cpu_suspend(unsigned long arg);
+4 -2
arch/arm64/include/asm/insn.h
··· 264 264 __AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000) 265 265 __AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000) 266 266 __AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000) 267 - __AARCH64_INSN_FUNCS(cbz, 0xFE000000, 0x34000000) 268 - __AARCH64_INSN_FUNCS(cbnz, 0xFE000000, 0x35000000) 267 + __AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000) 268 + __AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000) 269 + __AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000) 270 + __AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000) 269 271 __AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000) 270 272 __AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001) 271 273 __AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
+1 -1
arch/arm64/include/asm/pgtable.h
··· 460 460 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 461 461 { 462 462 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | 463 - PTE_PROT_NONE | PTE_VALID | PTE_WRITE; 463 + PTE_PROT_NONE | PTE_WRITE | PTE_TYPE_MASK; 464 464 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 465 465 return pte; 466 466 }
+2 -1
arch/arm64/include/asm/processor.h
··· 45 45 #define STACK_TOP STACK_TOP_MAX 46 46 #endif /* CONFIG_COMPAT */ 47 47 48 - #define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK 48 + extern phys_addr_t arm64_dma_phys_limit; 49 + #define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1) 49 50 #endif /* __KERNEL__ */ 50 51 51 52 struct debug_info {
-5
arch/arm64/include/asm/tlbflush.h
··· 24 24 #include <linux/sched.h> 25 25 #include <asm/cputype.h> 26 26 27 - extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *); 28 - extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long); 29 - 30 - extern struct cpu_tlb_fns cpu_tlb; 31 - 32 27 /* 33 28 * TLB Management 34 29 * ==============
+3 -2
arch/arm64/kernel/Makefile
··· 15 15 arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \ 16 16 entry-fpsimd.o process.o ptrace.o setup.o signal.o \ 17 17 sys.o stacktrace.o time.o traps.o io.o vdso.o \ 18 - hyp-stub.o psci.o cpu_ops.o insn.o return_address.o \ 19 - cpuinfo.o cpu_errata.o alternative.o cacheinfo.o 18 + hyp-stub.o psci.o psci-call.o cpu_ops.o insn.o \ 19 + return_address.o cpuinfo.o cpu_errata.o \ 20 + alternative.o cacheinfo.o 20 21 21 22 arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \ 22 23 sys_compat.o entry32.o \
+1 -1
arch/arm64/kernel/ftrace.c
··· 156 156 157 157 branch = aarch64_insn_gen_branch_imm(pc, 158 158 (unsigned long)ftrace_graph_caller, 159 - AARCH64_INSN_BRANCH_LINK); 159 + AARCH64_INSN_BRANCH_NOLINK); 160 160 nop = aarch64_insn_gen_nop(); 161 161 162 162 if (enable)
+3 -1
arch/arm64/kernel/insn.c
··· 87 87 88 88 if (module && IS_ENABLED(CONFIG_DEBUG_SET_MODULE_RONX)) 89 89 page = vmalloc_to_page(addr); 90 - else 90 + else if (!module && IS_ENABLED(CONFIG_DEBUG_RODATA)) 91 91 page = virt_to_page(addr); 92 + else 93 + return addr; 92 94 93 95 BUG_ON(!page); 94 96 set_fixmap(fixmap, page_to_phys(page));
+28
arch/arm64/kernel/psci-call.S
··· 1 + /* 2 + * This program is free software; you can redistribute it and/or modify 3 + * it under the terms of the GNU General Public License version 2 as 4 + * published by the Free Software Foundation. 5 + * 6 + * This program is distributed in the hope that it will be useful, 7 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 + * GNU General Public License for more details. 10 + * 11 + * Copyright (C) 2015 ARM Limited 12 + * 13 + * Author: Will Deacon <will.deacon@arm.com> 14 + */ 15 + 16 + #include <linux/linkage.h> 17 + 18 + /* int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */ 19 + ENTRY(__invoke_psci_fn_hvc) 20 + hvc #0 21 + ret 22 + ENDPROC(__invoke_psci_fn_hvc) 23 + 24 + /* int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */ 25 + ENTRY(__invoke_psci_fn_smc) 26 + smc #0 27 + ret 28 + ENDPROC(__invoke_psci_fn_smc)
+3 -34
arch/arm64/kernel/psci.c
··· 57 57 static int (*invoke_psci_fn)(u64, u64, u64, u64); 58 58 typedef int (*psci_initcall_t)(const struct device_node *); 59 59 60 + asmlinkage int __invoke_psci_fn_hvc(u64, u64, u64, u64); 61 + asmlinkage int __invoke_psci_fn_smc(u64, u64, u64, u64); 62 + 60 63 enum psci_function { 61 64 PSCI_FN_CPU_SUSPEND, 62 65 PSCI_FN_CPU_ON, ··· 110 107 state->affinity_level = 111 108 (power_state & PSCI_0_2_POWER_STATE_AFFL_MASK) >> 112 109 PSCI_0_2_POWER_STATE_AFFL_SHIFT; 113 - } 114 - 115 - /* 116 - * The following two functions are invoked via the invoke_psci_fn pointer 117 - * and will not be inlined, allowing us to piggyback on the AAPCS. 118 - */ 119 - static noinline int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1, 120 - u64 arg2) 121 - { 122 - asm volatile( 123 - __asmeq("%0", "x0") 124 - __asmeq("%1", "x1") 125 - __asmeq("%2", "x2") 126 - __asmeq("%3", "x3") 127 - "hvc #0\n" 128 - : "+r" (function_id) 129 - : "r" (arg0), "r" (arg1), "r" (arg2)); 130 - 131 - return function_id; 132 - } 133 - 134 - static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, 135 - u64 arg2) 136 - { 137 - asm volatile( 138 - __asmeq("%0", "x0") 139 - __asmeq("%1", "x1") 140 - __asmeq("%2", "x2") 141 - __asmeq("%3", "x3") 142 - "smc #0\n" 143 - : "+r" (function_id) 144 - : "r" (arg0), "r" (arg1), "r" (arg2)); 145 - 146 - return function_id; 147 110 } 148 111 149 112 static int psci_get_version(void)
+2 -3
arch/arm64/kernel/signal32.c
··· 154 154 case __SI_TIMER: 155 155 err |= __put_user(from->si_tid, &to->si_tid); 156 156 err |= __put_user(from->si_overrun, &to->si_overrun); 157 - err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, 158 - &to->si_ptr); 157 + err |= __put_user(from->si_int, &to->si_int); 159 158 break; 160 159 case __SI_POLL: 161 160 err |= __put_user(from->si_band, &to->si_band); ··· 183 184 case __SI_MESGQ: /* But this is */ 184 185 err |= __put_user(from->si_pid, &to->si_pid); 185 186 err |= __put_user(from->si_uid, &to->si_uid); 186 - err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, &to->si_ptr); 187 + err |= __put_user(from->si_int, &to->si_int); 187 188 break; 188 189 case __SI_SYS: 189 190 err |= __put_user((compat_uptr_t)(unsigned long)
+1 -2
arch/arm64/kernel/vdso/gettimeofday.S
··· 174 174 /* int __kernel_clock_getres(clockid_t clock_id, struct timespec *res); */ 175 175 ENTRY(__kernel_clock_getres) 176 176 .cfi_startproc 177 - cbz w1, 3f 178 - 179 177 cmp w0, #CLOCK_REALTIME 180 178 ccmp w0, #CLOCK_MONOTONIC, #0x4, ne 181 179 b.ne 1f ··· 186 188 b.ne 4f 187 189 ldr x2, 6f 188 190 2: 191 + cbz w1, 3f 189 192 stp xzr, x2, [x1] 190 193 191 194 3: /* res == NULL. */
+3 -13
arch/arm64/mm/dma-mapping.c
··· 348 348 .mapping_error = swiotlb_dma_mapping_error, 349 349 }; 350 350 351 - extern int swiotlb_late_init_with_default_size(size_t default_size); 352 - 353 351 static int __init atomic_pool_init(void) 354 352 { 355 353 pgprot_t prot = __pgprot(PROT_NORMAL_NC); ··· 409 411 return -ENOMEM; 410 412 } 411 413 412 - static int __init swiotlb_late_init(void) 414 + static int __init arm64_dma_init(void) 413 415 { 414 - size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT); 416 + int ret; 415 417 416 418 dma_ops = &swiotlb_dma_ops; 417 419 418 - return swiotlb_late_init_with_default_size(swiotlb_size); 419 - } 420 - 421 - static int __init arm64_dma_init(void) 422 - { 423 - int ret = 0; 424 - 425 - ret |= swiotlb_late_init(); 426 - ret |= atomic_pool_init(); 420 + ret = atomic_pool_init(); 427 421 428 422 return ret; 429 423 }
+9 -5
arch/arm64/mm/init.c
··· 33 33 #include <linux/dma-mapping.h> 34 34 #include <linux/dma-contiguous.h> 35 35 #include <linux/efi.h> 36 + #include <linux/swiotlb.h> 36 37 37 38 #include <asm/fixmap.h> 38 39 #include <asm/memory.h> ··· 46 45 #include "mm.h" 47 46 48 47 phys_addr_t memstart_addr __read_mostly = 0; 48 + phys_addr_t arm64_dma_phys_limit __read_mostly; 49 49 50 50 #ifdef CONFIG_BLK_DEV_INITRD 51 51 static int __init early_initrd(char *p) ··· 87 85 88 86 /* 4GB maximum for 32-bit only capable devices */ 89 87 if (IS_ENABLED(CONFIG_ZONE_DMA)) { 90 - max_dma = PFN_DOWN(max_zone_dma_phys()); 88 + max_dma = PFN_DOWN(arm64_dma_phys_limit); 91 89 zone_size[ZONE_DMA] = max_dma - min; 92 90 } 93 91 zone_size[ZONE_NORMAL] = max - max_dma; ··· 158 156 159 157 void __init arm64_memblock_init(void) 160 158 { 161 - phys_addr_t dma_phys_limit = 0; 162 - 163 159 memblock_enforce_memory_limit(memory_limit); 164 160 165 161 /* ··· 174 174 175 175 /* 4GB maximum for 32-bit only capable devices */ 176 176 if (IS_ENABLED(CONFIG_ZONE_DMA)) 177 - dma_phys_limit = max_zone_dma_phys(); 178 - dma_contiguous_reserve(dma_phys_limit); 177 + arm64_dma_phys_limit = max_zone_dma_phys(); 178 + else 179 + arm64_dma_phys_limit = PHYS_MASK + 1; 180 + dma_contiguous_reserve(arm64_dma_phys_limit); 179 181 180 182 memblock_allow_resize(); 181 183 memblock_dump_all(); ··· 278 276 */ 279 277 void __init mem_init(void) 280 278 { 279 + swiotlb_init(1); 280 + 281 281 set_max_mapnr(pfn_to_page(max_pfn) - mem_map); 282 282 283 283 #ifndef CONFIG_SPARSEMEM_VMEMMAP