Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd/pm: Drop legacy message fields from SMUv13
Remove usage of legacy message related fields from SMUv13 SOCs.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Lijo Lazar
and committed by
Alex Deucher
8d623384
8ba2a9a9
+6
-54
-1
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
-1
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
-2
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
-2
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
···
2034
2034
void aldebaran_set_ppt_funcs(struct smu_context *smu)
2035
2035
{
2036
2036
smu->ppt_funcs = &aldebaran_ppt_funcs;
2037
-
smu->message_map = aldebaran_message_map;
2038
2037
smu->clock_map = aldebaran_clk_map;
2039
2038
smu->feature_map = aldebaran_feature_mask_map;
2040
2039
smu->table_map = aldebaran_table_map;
2041
2040
smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_ALDE;
2042
-
smu_v13_0_set_smu_mailbox_registers(smu);
2043
2041
smu_v13_0_init_msg_ctl(smu, aldebaran_message_map);
2044
2042
}
-9
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
-9
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
···
2351
2351
smu_table->clocks_table, false);
2352
2352
}
2353
2353
2354
-
void smu_v13_0_set_smu_mailbox_registers(struct smu_context *smu)
2355
-
{
2356
-
struct amdgpu_device *adev = smu->adev;
2357
-
2358
-
smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
2359
-
smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
2360
-
smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
2361
-
}
2362
-
2363
2354
void smu_v13_0_init_msg_ctl(struct smu_context *smu,
2364
2355
const struct cmn2asic_msg_mapping *message_map)
2365
2356
{
-14
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
-14
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
···
70
70
71
71
#define MP0_MP1_DATA_REGION_SIZE_COMBOPPTABLE 0x4000
72
72
73
-
#define mmMP1_SMN_C2PMSG_66 0x0282
74
-
#define mmMP1_SMN_C2PMSG_66_BASE_IDX 0
75
-
76
-
#define mmMP1_SMN_C2PMSG_82 0x0292
77
-
#define mmMP1_SMN_C2PMSG_82_BASE_IDX 0
78
-
79
-
#define mmMP1_SMN_C2PMSG_90 0x029a
80
-
#define mmMP1_SMN_C2PMSG_90_BASE_IDX 0
81
-
82
73
#define mmMP1_SMN_C2PMSG_75 0x028b
83
74
#define mmMP1_SMN_C2PMSG_75_BASE_IDX 0
84
75
···
2886
2895
{
2887
2896
struct amdgpu_device *adev = smu->adev;
2888
2897
2889
-
smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
2890
-
smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
2891
-
smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
2892
-
2893
2898
smu->debug_param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_53);
2894
2899
smu->debug_msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_75);
2895
2900
smu->debug_resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_54);
···
3210
3223
void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)
3211
3224
{
3212
3225
smu->ppt_funcs = &smu_v13_0_0_ppt_funcs;
3213
-
smu->message_map = smu_v13_0_0_message_map;
3214
3226
smu->clock_map = smu_v13_0_0_clk_map;
3215
3227
smu->feature_map = smu_v13_0_0_feature_mask_map;
3216
3228
smu->table_map = smu_v13_0_0_table_map;
+2
-15
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
+2
-15
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
···
1124
1124
.set_gfx_power_up_by_imu = smu_v13_0_set_gfx_power_up_by_imu,
1125
1125
};
1126
1126
1127
-
static void smu_v13_0_4_set_smu_mailbox_registers(struct smu_context *smu)
1128
-
{
1129
-
struct amdgpu_device *adev = smu->adev;
1130
-
1131
-
smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
1132
-
smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
1133
-
smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
1134
-
}
1135
-
1136
1127
static void smu_v13_0_4_init_msg_ctl(struct smu_context *smu)
1137
1128
{
1138
1129
struct amdgpu_device *adev = smu->adev;
···
1145
1154
struct amdgpu_device *adev = smu->adev;
1146
1155
1147
1156
smu->ppt_funcs = &smu_v13_0_4_ppt_funcs;
1148
-
smu->message_map = smu_v13_0_4_message_map;
1149
1157
smu->feature_map = smu_v13_0_4_feature_mask_map;
1150
1158
smu->table_map = smu_v13_0_4_table_map;
1151
1159
smu->smc_driver_if_version = SMU13_0_4_DRIVER_IF_VERSION;
1152
1160
smu->is_apu = true;
1153
1161
1154
-
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 4)) {
1155
-
smu_v13_0_4_set_smu_mailbox_registers(smu);
1162
+
if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 4))
1156
1163
smu_v13_0_4_init_msg_ctl(smu);
1157
-
} else {
1158
-
smu_v13_0_set_smu_mailbox_registers(smu);
1164
+
else
1159
1165
smu_v13_0_init_msg_ctl(smu, smu_v13_0_4_message_map);
1160
-
}
1161
1166
}
-6
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
-6
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
···
1144
1144
1145
1145
void smu_v13_0_5_set_ppt_funcs(struct smu_context *smu)
1146
1146
{
1147
-
struct amdgpu_device *adev = smu->adev;
1148
-
1149
1147
smu->ppt_funcs = &smu_v13_0_5_ppt_funcs;
1150
-
smu->message_map = smu_v13_0_5_message_map;
1151
1148
smu->feature_map = smu_v13_0_5_feature_mask_map;
1152
1149
smu->table_map = smu_v13_0_5_table_map;
1153
1150
smu->is_apu = true;
1154
1151
smu->smc_driver_if_version = SMU13_0_5_DRIVER_IF_VERSION;
1155
-
smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_34);
1156
-
smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_2);
1157
-
smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_33);
1158
1152
smu_v13_0_5_init_msg_ctl(smu);
1159
1153
}
+4
-3
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+4
-3
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
···
3899
3899
3900
3900
void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu)
3901
3901
{
3902
+
const struct cmn2asic_msg_mapping *message_map;
3903
+
3902
3904
smu->ppt_funcs = &smu_v13_0_6_ppt_funcs;
3903
-
smu->message_map = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) ?
3905
+
message_map = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) ?
3904
3906
smu_v13_0_12_message_map : smu_v13_0_6_message_map;
3905
3907
smu->clock_map = smu_v13_0_6_clk_map;
3906
3908
smu->feature_map = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) ?
···
3910
3908
smu->table_map = smu_v13_0_6_table_map;
3911
3909
smu->smc_driver_if_version = SMU_IGNORE_IF_VERSION;
3912
3910
smu->smc_fw_caps |= SMU_FW_CAP_RAS_PRI;
3913
-
smu_v13_0_set_smu_mailbox_registers(smu);
3914
-
smu_v13_0_init_msg_ctl(smu, smu->message_map);
3911
+
smu_v13_0_init_msg_ctl(smu, message_map);
3915
3912
smu_v13_0_6_set_temp_funcs(smu);
3916
3913
amdgpu_mca_smu_init_funcs(smu->adev, &smu_v13_0_6_mca_smu_funcs);
3917
3914
amdgpu_aca_set_smu_funcs(smu->adev, &smu_v13_0_6_aca_smu_funcs);
-2
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
-2
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
···
2809
2809
void smu_v13_0_7_set_ppt_funcs(struct smu_context *smu)
2810
2810
{
2811
2811
smu->ppt_funcs = &smu_v13_0_7_ppt_funcs;
2812
-
smu->message_map = smu_v13_0_7_message_map;
2813
2812
smu->clock_map = smu_v13_0_7_clk_map;
2814
2813
smu->feature_map = smu_v13_0_7_feature_mask_map;
2815
2814
smu->table_map = smu_v13_0_7_table_map;
2816
2815
smu->pwr_src_map = smu_v13_0_7_pwr_src_map;
2817
2816
smu->workload_map = smu_v13_0_7_workload_map;
2818
2817
smu->smc_driver_if_version = SMU13_0_7_DRIVER_IF_VERSION;
2819
-
smu_v13_0_set_smu_mailbox_registers(smu);
2820
2818
smu_v13_0_init_msg_ctl(smu, smu_v13_0_7_message_map);
2821
2819
}
-2
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
-2
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
···
1360
1360
void yellow_carp_set_ppt_funcs(struct smu_context *smu)
1361
1361
{
1362
1362
smu->ppt_funcs = &yellow_carp_ppt_funcs;
1363
-
smu->message_map = yellow_carp_message_map;
1364
1363
smu->feature_map = yellow_carp_feature_mask_map;
1365
1364
smu->table_map = yellow_carp_table_map;
1366
1365
smu->is_apu = true;
1367
1366
smu->smc_driver_if_version = SMU13_YELLOW_CARP_DRIVER_IF_VERSION;
1368
-
smu_v13_0_set_smu_mailbox_registers(smu);
1369
1367
smu_v13_0_init_msg_ctl(smu, yellow_carp_message_map);
1370
1368
}