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Merge tag 'pci-v4.15-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI fixes from Bjorn Helgaas:
"Fix AMD boot regression due to 64-bit window conflicting with system
memory (Christian König)"

* tag 'pci-v4.15-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
x86/PCI: Move and shrink AMD 64-bit window to avoid conflict
x86/PCI: Add "pci=big_root_window" option for AMD 64-bit windows

+30 -11
+6
Documentation/admin-guide/kernel-parameters.txt
··· 3097 3097 pcie_scan_all Scan all possible PCIe devices. Otherwise we 3098 3098 only look for one device below a PCIe downstream 3099 3099 port. 3100 + big_root_window Try to add a big 64bit memory window to the PCIe 3101 + root complex on AMD CPUs. Some GFX hardware 3102 + can resize a BAR to allow access to all VRAM. 3103 + Adding the window is slightly risky (it may 3104 + conflict with unreported devices), so this 3105 + taints the kernel. 3100 3106 3101 3107 pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power 3102 3108 Management.
+1
arch/x86/include/asm/pci_x86.h
··· 38 38 #define PCI_NOASSIGN_ROMS 0x80000 39 39 #define PCI_ROOT_NO_CRS 0x100000 40 40 #define PCI_NOASSIGN_BARS 0x200000 41 + #define PCI_BIG_ROOT_WINDOW 0x400000 41 42 42 43 extern unsigned int pci_probe; 43 44 extern unsigned long pirq_table_addr;
+5
arch/x86/pci/common.c
··· 594 594 } else if (!strcmp(str, "nocrs")) { 595 595 pci_probe |= PCI_ROOT_NO_CRS; 596 596 return NULL; 597 + #ifdef CONFIG_PHYS_ADDR_T_64BIT 598 + } else if (!strcmp(str, "big_root_window")) { 599 + pci_probe |= PCI_BIG_ROOT_WINDOW; 600 + return NULL; 601 + #endif 597 602 } else if (!strcmp(str, "earlydump")) { 598 603 pci_early_dump_regs = 1; 599 604 return NULL;
+18 -11
arch/x86/pci/fixup.c
··· 662 662 */ 663 663 static void pci_amd_enable_64bit_bar(struct pci_dev *dev) 664 664 { 665 - unsigned i; 666 665 u32 base, limit, high; 667 - struct resource *res, *conflict; 668 666 struct pci_dev *other; 667 + struct resource *res; 668 + unsigned i; 669 + int r; 670 + 671 + if (!(pci_probe & PCI_BIG_ROOT_WINDOW)) 672 + return; 669 673 670 674 /* Check that we are the only device of that type */ 671 675 other = pci_get_device(dev->vendor, dev->device, NULL); ··· 703 699 if (!res) 704 700 return; 705 701 702 + /* 703 + * Allocate a 256GB window directly below the 0xfd00000000 hardware 704 + * limit (see AMD Family 15h Models 30h-3Fh BKDG, sec 2.4.6). 705 + */ 706 706 res->name = "PCI Bus 0000:00"; 707 707 res->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM | 708 708 IORESOURCE_MEM_64 | IORESOURCE_WINDOW; 709 - res->start = 0x100000000ull; 709 + res->start = 0xbd00000000ull; 710 710 res->end = 0xfd00000000ull - 1; 711 711 712 - /* Just grab the free area behind system memory for this */ 713 - while ((conflict = request_resource_conflict(&iomem_resource, res))) { 714 - if (conflict->end >= res->end) { 715 - kfree(res); 716 - return; 717 - } 718 - res->start = conflict->end + 1; 712 + r = request_resource(&iomem_resource, res); 713 + if (r) { 714 + kfree(res); 715 + return; 719 716 } 720 717 721 - dev_info(&dev->dev, "adding root bus resource %pR\n", res); 718 + dev_info(&dev->dev, "adding root bus resource %pR (tainting kernel)\n", 719 + res); 720 + add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 722 721 723 722 base = ((res->start >> 8) & AMD_141b_MMIO_BASE_MMIOBASE_MASK) | 724 723 AMD_141b_MMIO_BASE_RE_MASK | AMD_141b_MMIO_BASE_WE_MASK;