tjh.dev / kernel
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crypto: qat - add support for decompression service to GEN6 devices

Add support to configure decompression as a separate service for QAT GEN6
devices. A new arbiter configuration has been added to map the hardware
decompression threads to all ring pairs.

The decompression service is enabled via sysfs by writing "decomp" to
"/sys/bus/pci/devices/<BDF>/qat/cfg_services".

The decompression service is not supported on QAT GEN2 and GEN4 devices,
and attempting it results in an invalid write error. The existing
compression service for QAT GEN2 and GEN4 devices remains unchanged and
supports both compression and decompression operations on the same ring
pair.

Co-developed-by: Karthikeyan Gopal <karthikeyan.gopal@intel.com>
Signed-off-by: Karthikeyan Gopal <karthikeyan.gopal@intel.com>
Signed-off-by: Suman Kumar Chakraborty <suman.kumar.chakraborty@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Suman Kumar Chakraborty and committed by
Herbert Xu 8f2e1a3c 758f5bdf

+25 -1
+12 -1
drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c
··· 76 76 0x00, 0x00, 0x00, 0x00, 0x07, 0x07, 0x03, 0x03, 0x00 77 77 }; 78 78 79 + static const unsigned long thrd_mask_dcpr[ADF_6XXX_MAX_ACCELENGINES] = { 80 + 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00 81 + }; 82 + 79 83 static const char *const adf_6xxx_fw_objs[] = { 80 84 [ADF_FW_CY_OBJ] = ADF_6XXX_CY_OBJ, 81 85 [ADF_FW_DC_OBJ] = ADF_6XXX_DC_OBJ, ··· 130 126 if (test_and_clear_bit(SVC_DCC, mask)) 131 127 return SVC_DCC; 132 128 129 + if (test_and_clear_bit(SVC_DECOMP, mask)) 130 + return SVC_DECOMP; 131 + 133 132 return -EINVAL; 134 133 } 135 134 ··· 146 139 case SVC_DC: 147 140 case SVC_DCC: 148 141 return COMP; 142 + case SVC_DECOMP: 143 + return DECOMP; 149 144 default: 150 145 return UNUSED; 151 146 } ··· 164 155 return thrd_mask_cpr; 165 156 case SVC_DCC: 166 157 return thrd_mask_dcc; 158 + case SVC_DECOMP: 159 + return thrd_mask_dcpr; 167 160 default: 168 161 return NULL; 169 162 } ··· 659 648 caps |= capabilities_asym; 660 649 if (test_bit(SVC_SYM, &mask)) 661 650 caps |= capabilities_sym; 662 - if (test_bit(SVC_DC, &mask)) 651 + if (test_bit(SVC_DC, &mask) || test_bit(SVC_DECOMP, &mask)) 663 652 caps |= capabilities_dc; 664 653 if (test_bit(SVC_DCC, &mask)) { 665 654 /*
+1
drivers/crypto/intel/qat/qat_common/adf_cfg_common.h
··· 29 29 COMP, 30 30 SYM, 31 31 ASYM, 32 + DECOMP, 32 33 USED 33 34 }; 34 35
+5
drivers/crypto/intel/qat/qat_common/adf_cfg_services.c
··· 15 15 [SVC_SYM] = ADF_CFG_SYM, 16 16 [SVC_DC] = ADF_CFG_DC, 17 17 [SVC_DCC] = ADF_CFG_DCC, 18 + [SVC_DECOMP] = ADF_CFG_DECOMP, 18 19 }; 19 20 20 21 /* ··· 44 43 static_assert(sizeof(ADF_CFG_SYM ADF_SERVICES_DELIMITER 45 44 ADF_CFG_ASYM ADF_SERVICES_DELIMITER 46 45 ADF_CFG_DC ADF_SERVICES_DELIMITER 46 + ADF_CFG_DECOMP ADF_SERVICES_DELIMITER 47 47 ADF_CFG_DCC) < ADF_CFG_MAX_VAL_LEN_IN_BYTES); 48 48 49 49 static int adf_service_string_to_mask(struct adf_accel_dev *accel_dev, const char *buf, ··· 168 166 169 167 if (test_bit(SVC_DC, &mask)) 170 168 return SVC_DC; 169 + 170 + if (test_bit(SVC_DECOMP, &mask)) 171 + return SVC_DECOMP; 171 172 172 173 if (test_bit(SVC_DCC, &mask)) 173 174 return SVC_DCC;
+1
drivers/crypto/intel/qat/qat_common/adf_cfg_services.h
··· 11 11 SVC_ASYM = 0, 12 12 SVC_SYM, 13 13 SVC_DC, 14 + SVC_DECOMP, 14 15 SVC_DCC, 15 16 SVC_BASE_COUNT 16 17 };
+1
drivers/crypto/intel/qat/qat_common/adf_cfg_strings.h
··· 24 24 #define ADF_CY "Cy" 25 25 #define ADF_DC "Dc" 26 26 #define ADF_CFG_DC "dc" 27 + #define ADF_CFG_DECOMP "decomp" 27 28 #define ADF_CFG_CY "sym;asym" 28 29 #define ADF_CFG_SYM "sym" 29 30 #define ADF_CFG_ASYM "asym"
+3
drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c
··· 262 262 if (mask >= BIT(SVC_BASE_COUNT)) 263 263 return false; 264 264 265 + if (test_bit(SVC_DECOMP, &mask)) 266 + return false; 267 + 265 268 switch (num_svc) { 266 269 case ADF_ONE_SERVICE: 267 270 return true;
+2
drivers/crypto/intel/qat/qat_common/adf_sysfs.c
··· 269 269 return sysfs_emit(buf, "%s\n", ADF_CFG_SYM); 270 270 case ASYM: 271 271 return sysfs_emit(buf, "%s\n", ADF_CFG_ASYM); 272 + case DECOMP: 273 + return sysfs_emit(buf, "%s\n", ADF_CFG_DECOMP); 272 274 default: 273 275 break; 274 276 }