tjh.dev / kernel
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drm/amdgpu: remove table_freed param from the VM code

Better to leave the decision when to flush the VM changes in the TLB to
the VM code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Philip Yang<Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Christian König and committed by
Alex Deucher 8f8cc3fb 4d30a83c

+16 -24
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
··· 1104 1104 return ret; 1105 1105 1106 1106 /* Update the page tables */ 1107 - ret = amdgpu_vm_bo_update(adev, bo_va, false, NULL); 1107 + ret = amdgpu_vm_bo_update(adev, bo_va, false); 1108 1108 if (ret) { 1109 1109 pr_err("amdgpu_vm_bo_update failed\n"); 1110 1110 return ret;
+3 -3
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
··· 806 806 if (r) 807 807 return r; 808 808 809 - r = amdgpu_vm_bo_update(adev, fpriv->prt_va, false, NULL); 809 + r = amdgpu_vm_bo_update(adev, fpriv->prt_va, false); 810 810 if (r) 811 811 return r; 812 812 ··· 817 817 if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) { 818 818 bo_va = fpriv->csa_va; 819 819 BUG_ON(!bo_va); 820 - r = amdgpu_vm_bo_update(adev, bo_va, false, NULL); 820 + r = amdgpu_vm_bo_update(adev, bo_va, false); 821 821 if (r) 822 822 return r; 823 823 ··· 836 836 if (bo_va == NULL) 837 837 continue; 838 838 839 - r = amdgpu_vm_bo_update(adev, bo_va, false, NULL); 839 + r = amdgpu_vm_bo_update(adev, bo_va, false); 840 840 if (r) 841 841 return r; 842 842
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
··· 612 612 613 613 if (operation == AMDGPU_VA_OP_MAP || 614 614 operation == AMDGPU_VA_OP_REPLACE) { 615 - r = amdgpu_vm_bo_update(adev, bo_va, false, NULL); 615 + r = amdgpu_vm_bo_update(adev, bo_va, false); 616 616 if (r) 617 617 goto error; 618 618 }
+7 -14
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
··· 808 808 * @res: ttm_resource to map 809 809 * @pages_addr: DMA addresses to use for mapping 810 810 * @fence: optional resulting fence 811 - * @table_freed: return true if page table is freed 812 811 * 813 812 * Fill in the page table entries between @start and @last. 814 813 * ··· 822 823 uint64_t flags, uint64_t offset, 823 824 struct ttm_resource *res, 824 825 dma_addr_t *pages_addr, 825 - struct dma_fence **fence, 826 - bool *table_freed) 826 + struct dma_fence **fence) 827 827 { 828 828 struct amdgpu_vm_update_params params; 829 829 struct amdgpu_vm_tlb_seq_cb *tlb_cb; ··· 936 938 tlb_cb = NULL; 937 939 } 938 940 939 - if (table_freed) 940 - *table_freed = *table_freed || params.table_freed; 941 - 942 941 error_free: 943 942 kfree(tlb_cb); 944 943 ··· 995 1000 * @adev: amdgpu_device pointer 996 1001 * @bo_va: requested BO and VM object 997 1002 * @clear: if true clear the entries 998 - * @table_freed: return true if page table is freed 999 1003 * 1000 1004 * Fill in the page table entries for @bo_va. 1001 1005 * ··· 1002 1008 * 0 for success, -EINVAL for failure. 1003 1009 */ 1004 1010 int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, 1005 - bool clear, bool *table_freed) 1011 + bool clear) 1006 1012 { 1007 1013 struct amdgpu_bo *bo = bo_va->base.bo; 1008 1014 struct amdgpu_vm *vm = bo_va->base.vm; ··· 1081 1087 resv, mapping->start, 1082 1088 mapping->last, update_flags, 1083 1089 mapping->offset, mem, 1084 - pages_addr, last_update, table_freed); 1090 + pages_addr, last_update); 1085 1091 if (r) 1086 1092 return r; 1087 1093 } ··· 1275 1281 r = amdgpu_vm_bo_update_mapping(adev, adev, vm, false, false, 1276 1282 resv, mapping->start, 1277 1283 mapping->last, init_pte_value, 1278 - 0, NULL, NULL, &f, NULL); 1284 + 0, NULL, NULL, &f); 1279 1285 amdgpu_vm_free_mapping(adev, vm, mapping, f); 1280 1286 if (r) { 1281 1287 dma_fence_put(f); ··· 1317 1323 1318 1324 list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) { 1319 1325 /* Per VM BOs never need to bo cleared in the page tables */ 1320 - r = amdgpu_vm_bo_update(adev, bo_va, false, NULL); 1326 + r = amdgpu_vm_bo_update(adev, bo_va, false); 1321 1327 if (r) 1322 1328 return r; 1323 1329 } ··· 1336 1342 else 1337 1343 clear = true; 1338 1344 1339 - r = amdgpu_vm_bo_update(adev, bo_va, clear, NULL); 1345 + r = amdgpu_vm_bo_update(adev, bo_va, clear); 1340 1346 if (r) 1341 1347 return r; 1342 1348 ··· 2520 2526 } 2521 2527 2522 2528 r = amdgpu_vm_bo_update_mapping(adev, adev, vm, true, false, NULL, addr, 2523 - addr, flags, value, NULL, NULL, NULL, 2524 - NULL); 2529 + addr, flags, value, NULL, NULL, NULL); 2525 2530 if (r) 2526 2531 goto error_unlock; 2527 2532
+2 -2
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
··· 410 410 uint64_t flags, uint64_t offset, 411 411 struct ttm_resource *res, 412 412 dma_addr_t *pages_addr, 413 - struct dma_fence **fence, bool *free_table); 413 + struct dma_fence **fence); 414 414 int amdgpu_vm_bo_update(struct amdgpu_device *adev, 415 415 struct amdgpu_bo_va *bo_va, 416 - bool clear, bool *table_freed); 416 + bool clear); 417 417 bool amdgpu_vm_evictable(struct amdgpu_bo *bo); 418 418 void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev, 419 419 struct amdgpu_bo *bo, bool evicted);
+2 -3
drivers/gpu/drm/amd/amdkfd/kfd_svm.c
··· 1190 1190 1191 1191 return amdgpu_vm_bo_update_mapping(adev, adev, vm, false, true, NULL, 1192 1192 start, last, init_pte_value, 0, 1193 - NULL, NULL, fence, NULL); 1193 + NULL, NULL, fence); 1194 1194 } 1195 1195 1196 1196 static int ··· 1282 1282 prange->start + i, pte_flags, 1283 1283 last_start - prange->start, 1284 1284 NULL, dma_addr, 1285 - &vm->last_update, 1286 - NULL); 1285 + &vm->last_update); 1287 1286 1288 1287 for (j = last_start - prange->start; j <= i; j++) 1289 1288 dma_addr[j] |= last_domain;