Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
perf/arm-ni: Add NoC S3 support
NoC S3 and its SI L1 sibling look largely similar to their predecessors,
but add the notion of subfeatures to the discovery process, which we now
use to find the event muxes for each device node. Plus, as ever, more
mildly annoying shuffling around of some of the PMU registers (this time
it's the counters...)
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
authored by
Robin Murphy
and committed by
Will Deacon
8fa08f88
decc3684
+71
-21
+71
-21
drivers/perf/arm-ni.c
+71
-21
drivers/perf/arm-ni.c
···
21
21
22
22
#define NI_CHILD_NODE_INFO 0x004
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#define NI_CHILD_PTR(n) (0x008 + (n) * 4)
24
+
#define NI_NUM_SUB_FEATURES 0x100
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+
#define NI_SUB_FEATURE_TYPE(n) (0x108 + (n) * 8)
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+
#define NI_SUB_FEATURE_PTR(n) (0x10c + (n) * 8)
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+
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+
#define NI_SUB_FEATURE_TYPE_FCU 0x2
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#define NI700_PMUSELA 0x00c
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···
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#define NI_PIDR2_VERSION GENMASK(7, 4)
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/* PMU node */
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-
#define NI_PMEVCNTR(n) (0x008 + (n) * 8)
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-
#define NI_PMCCNTR_L 0x0f8
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-
#define NI_PMCCNTR_U 0x0fc
36
+
#define NI700_PMEVCNTR(n) (0x008 + (n) * 8)
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+
#define NI700_PMCCNTR_L 0x0f8
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+
#define NI_PMEVCNTR(n) (0x200 + (n) * 8)
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+
#define NI_PMCCNTR_L 0x2f8
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#define NI_PMEVTYPER(n) (0x400 + (n) * 4)
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#define NI_PMEVTYPER_NODE_TYPE GENMASK(12, 9)
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#define NI_PMEVTYPER_NODE_ID GENMASK(8, 0)
···
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enum ni_part {
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PART_NI_700 = 0x43b,
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PART_NI_710AE = 0x43d,
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+
PART_NOC_S3 = 0x43f,
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+
PART_SI_L1 = 0x455,
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};
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enum ni_node_type {
···
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NI_HSNI,
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NI_HMNI,
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NI_PMNI,
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NI_TSNI,
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NI_TMNI,
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NI_CMNI = 0x0e,
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NI_MCN = 0x63,
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};
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struct arm_ni_node {
···
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NI_EVENT_ATTR(hsni, NI_HSNI),
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NI_EVENT_ATTR(hmni, NI_HMNI),
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NI_EVENT_ATTR(pmni, NI_PMNI),
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NI_EVENT_ATTR(tsni, NI_TSNI),
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NI_EVENT_ATTR(tmni, NI_TMNI),
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NI_EVENT_ATTR(cmni, NI_CMNI),
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NULL
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};
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···
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return -EINVAL;
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}
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-
static u64 arm_ni_read_ccnt(struct arm_ni_cd *cd)
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+
static u64 arm_ni_read_ccnt(void __iomem *pmccntr)
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{
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u64 l, u_old, u_new;
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int retries = 3; /* 1st time unlucky, 2nd improbable, 3rd just broken */
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-
u_new = readl_relaxed(cd->pmu_base + NI_PMCCNTR_U);
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+
u_new = readl_relaxed(pmccntr + 4);
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do {
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u_old = u_new;
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-
l = readl_relaxed(cd->pmu_base + NI_PMCCNTR_L);
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-
u_new = readl_relaxed(cd->pmu_base + NI_PMCCNTR_U);
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l = readl_relaxed(pmccntr);
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u_new = readl_relaxed(pmccntr + 4);
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} while (u_new != u_old && --retries);
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WARN_ON(!retries);
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···
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static void arm_ni_event_read(struct perf_event *event)
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{
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-
struct arm_ni_cd *cd = pmu_to_cd(event->pmu);
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struct hw_perf_event *hw = &event->hw;
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u64 count, prev;
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bool ccnt = hw->idx == NI_CCNT_IDX;
···
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do {
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prev = local64_read(&hw->prev_count);
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if (ccnt)
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-
count = arm_ni_read_ccnt(cd);
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+
count = arm_ni_read_ccnt((void __iomem *)event->hw.event_base);
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else
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-
count = readl_relaxed(cd->pmu_base + NI_PMEVCNTR(hw->idx));
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count = readl_relaxed((void __iomem *)event->hw.event_base);
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} while (local64_cmpxchg(&hw->prev_count, prev, count) != prev);
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count -= prev;
···
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arm_ni_event_read(event);
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}
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-
static void arm_ni_init_ccnt(struct arm_ni_cd *cd)
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static void arm_ni_init_ccnt(struct hw_perf_event *hw)
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{
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-
local64_set(&cd->ccnt->hw.prev_count, S64_MIN);
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-
lo_hi_writeq_relaxed(S64_MIN, cd->pmu_base + NI_PMCCNTR_L);
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local64_set(&hw->prev_count, S64_MIN);
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lo_hi_writeq_relaxed(S64_MIN, (void __iomem *)hw->event_base);
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}
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-
static void arm_ni_init_evcnt(struct arm_ni_cd *cd, int idx)
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static void arm_ni_init_evcnt(struct hw_perf_event *hw)
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{
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local64_set(&cd->evcnt[idx]->hw.prev_count, S32_MIN);
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-
writel_relaxed(S32_MIN, cd->pmu_base + NI_PMEVCNTR(idx));
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+
local64_set(&hw->prev_count, S32_MIN);
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writel_relaxed(S32_MIN, (void __iomem *)hw->event_base);
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}
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+
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static bool arm_ni_is_7xx(const struct arm_ni *ni)
401
+
{
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return ni->part == PART_NI_700 || ni->part == PART_NI_710AE;
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}
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static int arm_ni_event_add(struct perf_event *event, int flags)
···
422
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struct hw_perf_event *hw = &event->hw;
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struct arm_ni_unit *unit;
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enum ni_node_type type = NI_EVENT_TYPE(event);
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bool is_7xx = arm_ni_is_7xx(cd_to_ni(cd));
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u32 reg;
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if (type == NI_PMU) {
428
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if (cd->ccnt)
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return -ENOSPC;
430
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hw->idx = NI_CCNT_IDX;
413
+
hw->event_base = (unsigned long)cd->pmu_base +
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+
is_7xx ? NI700_PMCCNTR_L : NI_PMCCNTR_L;
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cd->ccnt = event;
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-
arm_ni_init_ccnt(cd);
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+
arm_ni_init_ccnt(hw);
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} else {
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hw->idx = 0;
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while (cd->evcnt[hw->idx]) {
···
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cd->evcnt[hw->idx] = event;
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unit = (void *)hw->config_base;
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unit->event[hw->idx] = NI_EVENT_EVENTID(event);
445
-
arm_ni_init_evcnt(cd, hw->idx);
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+
hw->event_base = (unsigned long)cd->pmu_base +
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is_7xx ? NI700_PMEVCNTR(hw->idx) : NI_PMEVCNTR(hw->idx);
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arm_ni_init_evcnt(hw);
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lo_hi_writeq_relaxed(le64_to_cpu(unit->pmusel), unit->pmusela);
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reg = FIELD_PREP(NI_PMEVTYPER_NODE_TYPE, type) |
···
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ret = IRQ_HANDLED;
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if (!(WARN_ON(!cd->ccnt))) {
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arm_ni_event_read(cd->ccnt);
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-
arm_ni_init_ccnt(cd);
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arm_ni_init_ccnt(&cd->ccnt->hw);
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}
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}
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for (int i = 0; i < NI_NUM_COUNTERS; i++) {
···
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ret = IRQ_HANDLED;
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if (!(WARN_ON(!cd->evcnt[i]))) {
492
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arm_ni_event_read(cd->evcnt[i]);
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-
arm_ni_init_evcnt(cd, i);
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arm_ni_init_evcnt(&cd->evcnt[i]->hw);
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}
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}
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writel_relaxed(reg, cd->pmu_base + NI_PMOVSCLR);
···
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return ret;
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cd += cd->irq_friend;
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}
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+
}
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+
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+
static void __iomem *arm_ni_get_pmusel(struct arm_ni *ni, void __iomem *unit_base)
480
+
{
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u32 type, ptr, num;
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+
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+
if (arm_ni_is_7xx(ni))
484
+
return unit_base + NI700_PMUSELA;
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+
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num = readl_relaxed(unit_base + NI_NUM_SUB_FEATURES);
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for (int i = 0; i < num; i++) {
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type = readl_relaxed(unit_base + NI_SUB_FEATURE_TYPE(i));
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+
if (type != NI_SUB_FEATURE_TYPE_FCU)
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continue;
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ptr = readl_relaxed(unit_base + NI_SUB_FEATURE_PTR(i));
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return ni->base + ptr;
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+
}
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+
/* Should be impossible */
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return NULL;
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}
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static int arm_ni_init_cd(struct arm_ni *ni, struct arm_ni_node *node, u64 res_start)
···
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case NI_HSNI:
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case NI_HMNI:
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case NI_PMNI:
558
-
unit->pmusela = unit_base + NI700_PMUSELA;
515
+
case NI_TSNI:
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+
case NI_TMNI:
517
+
case NI_CMNI:
518
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unit->pmusela = arm_ni_get_pmusel(ni, unit_base);
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writel_relaxed(1, unit->pmusela);
560
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if (readl_relaxed(unit->pmusela) != 1)
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dev_info(ni->dev, "No access to node 0x%04x%04x\n", unit->id, unit->type);
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522
else
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unit->ns = true;
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+
break;
525
+
case NI_MCN:
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break;
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default:
566
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/*
···
697
649
switch (part) {
698
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case PART_NI_700:
699
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case PART_NI_710AE:
652
+
case PART_NOC_S3:
653
+
case PART_SI_L1:
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654
break;
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default:
702
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dev_WARN(&pdev->dev, "Unknown part number: 0x%03x, this may go badly\n", part);