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Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel

* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:
drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI.
drm/i915: Multiply the refresh by 1000 in TV mode validatiion
drm/i915: Enable irq to trace batch buffer completion.
drm/i915: batch submit seqno off-by-one.
drm/i915: Record device minor rather than pointer in TRACE_EVENT
drm/i915: Don't call intel_update_fbc from intel_crtc_cursor_set

+49 -32
+1
drivers/gpu/drm/i915/i915_dma.c
··· 1468 1468 spin_lock_init(&dev_priv->user_irq_lock); 1469 1469 spin_lock_init(&dev_priv->error_lock); 1470 1470 dev_priv->user_irq_refcount = 0; 1471 + dev_priv->trace_irq_seqno = 0; 1471 1472 1472 1473 ret = drm_vblank_init(dev, I915_NUM_PIPE); 1473 1474
+2
drivers/gpu/drm/i915/i915_drv.h
··· 202 202 spinlock_t user_irq_lock; 203 203 /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */ 204 204 int user_irq_refcount; 205 + u32 trace_irq_seqno; 205 206 /** Cached value of IMR to avoid reads in updating the bitfield */ 206 207 u32 irq_mask_reg; 207 208 u32 pipestat[2]; ··· 666 665 extern int i915_irq_wait(struct drm_device *dev, void *data, 667 666 struct drm_file *file_priv); 668 667 void i915_user_irq_get(struct drm_device *dev); 668 + void i915_trace_irq_get(struct drm_device *dev, u32 seqno); 669 669 void i915_user_irq_put(struct drm_device *dev); 670 670 extern void i915_enable_interrupt (struct drm_device *dev); 671 671
+8 -2
drivers/gpu/drm/i915/i915_gem.c
··· 1770 1770 drm_i915_private_t *dev_priv = dev->dev_private; 1771 1771 uint32_t seqno; 1772 1772 1773 - if (!dev_priv->hw_status_page) 1773 + if (!dev_priv->hw_status_page || list_empty(&dev_priv->mm.request_list)) 1774 1774 return; 1775 1775 1776 1776 seqno = i915_get_gem_seqno(dev); ··· 1793 1793 kfree(request); 1794 1794 } else 1795 1795 break; 1796 + } 1797 + 1798 + if (unlikely (dev_priv->trace_irq_seqno && 1799 + i915_seqno_passed(dev_priv->trace_irq_seqno, seqno))) { 1800 + i915_user_irq_put(dev); 1801 + dev_priv->trace_irq_seqno = 0; 1796 1802 } 1797 1803 } 1798 1804 ··· 3358 3352 exec_start = (uint32_t) exec_offset + exec->batch_start_offset; 3359 3353 exec_len = (uint32_t) exec->batch_len; 3360 3354 3361 - trace_i915_gem_request_submit(dev, dev_priv->mm.next_gem_seqno); 3355 + trace_i915_gem_request_submit(dev, dev_priv->mm.next_gem_seqno + 1); 3362 3356 3363 3357 count = nbox ? nbox : 1; 3364 3358
+10
drivers/gpu/drm/i915/i915_irq.c
··· 725 725 spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); 726 726 } 727 727 728 + void i915_trace_irq_get(struct drm_device *dev, u32 seqno) 729 + { 730 + drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 731 + 732 + if (dev_priv->trace_irq_seqno == 0) 733 + i915_user_irq_get(dev); 734 + 735 + dev_priv->trace_irq_seqno = seqno; 736 + } 737 + 728 738 static int i915_wait_irq(struct drm_device * dev, int irq_nr) 729 739 { 730 740 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+25 -24
drivers/gpu/drm/i915/i915_trace.h
··· 158 158 TP_ARGS(dev, seqno), 159 159 160 160 TP_STRUCT__entry( 161 - __field(struct drm_device *, dev) 161 + __field(u32, dev) 162 162 __field(u32, seqno) 163 163 ), 164 164 165 165 TP_fast_assign( 166 - __entry->dev = dev; 166 + __entry->dev = dev->primary->index; 167 167 __entry->seqno = seqno; 168 + i915_trace_irq_get(dev, seqno); 168 169 ), 169 170 170 - TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno) 171 + TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno) 171 172 ); 172 173 173 174 TRACE_EVENT(i915_gem_request_flush, ··· 179 178 TP_ARGS(dev, seqno, flush_domains, invalidate_domains), 180 179 181 180 TP_STRUCT__entry( 182 - __field(struct drm_device *, dev) 181 + __field(u32, dev) 183 182 __field(u32, seqno) 184 183 __field(u32, flush_domains) 185 184 __field(u32, invalidate_domains) 186 185 ), 187 186 188 187 TP_fast_assign( 189 - __entry->dev = dev; 188 + __entry->dev = dev->primary->index; 190 189 __entry->seqno = seqno; 191 190 __entry->flush_domains = flush_domains; 192 191 __entry->invalidate_domains = invalidate_domains; 193 192 ), 194 193 195 - TP_printk("dev=%p, seqno=%u, flush=%04x, invalidate=%04x", 194 + TP_printk("dev=%u, seqno=%u, flush=%04x, invalidate=%04x", 196 195 __entry->dev, __entry->seqno, 197 196 __entry->flush_domains, __entry->invalidate_domains) 198 197 ); ··· 205 204 TP_ARGS(dev, seqno), 206 205 207 206 TP_STRUCT__entry( 208 - __field(struct drm_device *, dev) 207 + __field(u32, dev) 209 208 __field(u32, seqno) 210 209 ), 211 210 212 211 TP_fast_assign( 213 - __entry->dev = dev; 212 + __entry->dev = dev->primary->index; 214 213 __entry->seqno = seqno; 215 214 ), 216 215 217 - TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno) 216 + TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno) 218 217 ); 219 218 220 219 TRACE_EVENT(i915_gem_request_retire, ··· 224 223 TP_ARGS(dev, seqno), 225 224 226 225 TP_STRUCT__entry( 227 - __field(struct drm_device *, dev) 226 + __field(u32, dev) 228 227 __field(u32, seqno) 229 228 ), 230 229 231 230 TP_fast_assign( 232 - __entry->dev = dev; 231 + __entry->dev = dev->primary->index; 233 232 __entry->seqno = seqno; 234 233 ), 235 234 236 - TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno) 235 + TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno) 237 236 ); 238 237 239 238 TRACE_EVENT(i915_gem_request_wait_begin, ··· 243 242 TP_ARGS(dev, seqno), 244 243 245 244 TP_STRUCT__entry( 246 - __field(struct drm_device *, dev) 245 + __field(u32, dev) 247 246 __field(u32, seqno) 248 247 ), 249 248 250 249 TP_fast_assign( 251 - __entry->dev = dev; 250 + __entry->dev = dev->primary->index; 252 251 __entry->seqno = seqno; 253 252 ), 254 253 255 - TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno) 254 + TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno) 256 255 ); 257 256 258 257 TRACE_EVENT(i915_gem_request_wait_end, ··· 262 261 TP_ARGS(dev, seqno), 263 262 264 263 TP_STRUCT__entry( 265 - __field(struct drm_device *, dev) 264 + __field(u32, dev) 266 265 __field(u32, seqno) 267 266 ), 268 267 269 268 TP_fast_assign( 270 - __entry->dev = dev; 269 + __entry->dev = dev->primary->index; 271 270 __entry->seqno = seqno; 272 271 ), 273 272 274 - TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno) 273 + TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno) 275 274 ); 276 275 277 276 TRACE_EVENT(i915_ring_wait_begin, ··· 281 280 TP_ARGS(dev), 282 281 283 282 TP_STRUCT__entry( 284 - __field(struct drm_device *, dev) 283 + __field(u32, dev) 285 284 ), 286 285 287 286 TP_fast_assign( 288 - __entry->dev = dev; 287 + __entry->dev = dev->primary->index; 289 288 ), 290 289 291 - TP_printk("dev=%p", __entry->dev) 290 + TP_printk("dev=%u", __entry->dev) 292 291 ); 293 292 294 293 TRACE_EVENT(i915_ring_wait_end, ··· 298 297 TP_ARGS(dev), 299 298 300 299 TP_STRUCT__entry( 301 - __field(struct drm_device *, dev) 300 + __field(u32, dev) 302 301 ), 303 302 304 303 TP_fast_assign( 305 - __entry->dev = dev; 304 + __entry->dev = dev->primary->index; 306 305 ), 307 306 308 - TP_printk("dev=%p", __entry->dev) 307 + TP_printk("dev=%u", __entry->dev) 309 308 ); 310 309 311 310 #endif /* _I915_TRACE_H_ */
-4
drivers/gpu/drm/i915/intel_display.c
··· 3095 3095 struct drm_gem_object *bo; 3096 3096 struct drm_i915_gem_object *obj_priv; 3097 3097 int pipe = intel_crtc->pipe; 3098 - int plane = intel_crtc->plane; 3099 3098 uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR; 3100 3099 uint32_t base = (pipe == 0) ? CURABASE : CURBBASE; 3101 3100 uint32_t temp = I915_READ(control); ··· 3180 3181 i915_gem_object_unpin(intel_crtc->cursor_bo); 3181 3182 drm_gem_object_unreference(intel_crtc->cursor_bo); 3182 3183 } 3183 - 3184 - if ((IS_I965G(dev) || plane == 0)) 3185 - intel_update_fbc(crtc, &crtc->mode); 3186 3184 3187 3185 mutex_unlock(&dev->struct_mutex); 3188 3186
+1 -1
drivers/gpu/drm/i915/intel_hdmi.c
··· 223 223 224 224 connector = &intel_output->base; 225 225 drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, 226 - DRM_MODE_CONNECTOR_DVID); 226 + DRM_MODE_CONNECTOR_HDMIA); 227 227 drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); 228 228 229 229 intel_output->type = INTEL_OUTPUT_HDMI;
+2 -1
drivers/gpu/drm/i915/intel_tv.c
··· 1082 1082 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); 1083 1083 1084 1084 /* Ensure TV refresh is close to desired refresh */ 1085 - if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode)) < 10) 1085 + if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) 1086 + < 1000) 1086 1087 return MODE_OK; 1087 1088 return MODE_CLOCK_RANGE; 1088 1089 }