Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Pull thermal management fixes from Zhang Rui:
"These includes several commits that are necessary to properly fix
regression for TMU test MUX address setting after reset, for exynos
thermal driver.
Specifics:
- fix a regression that the removal of setting a certain field at TMU
configuration setting results in immediately shutdown after reset
on Exynos4412 SoC.
- revert a patch which tries to link the thermal_zone device and its
hwmon node but breaks libsensors.
- fix a deadlock/lockdep warning issue in x86_pkg_temp thermal
driver, which can be reproduced on a buggy platform only.
- fix ti-soc-thermal driver to fall back on bandgap reading when
reading from PCB temperature sensor fails"
* 'for-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux:
Revert "drivers: thermal: parent virtual hwmon with thermal zone"
drivers: thermal: allow ti-soc-thermal run without pcb zone
thermal: exynos: Provide initial setting for TMU's test MUX address at Exynos4412
thermal: exynos: Provide separate TMU data for Exynos4412
thermal: exynos: Remove check for thermal device pointer at exynos_report_trigger()
Thermal: x86_pkg_temp: change spin lock
+60
-21
-2
drivers/thermal/samsung/exynos_thermal_common.c
-2
drivers/thermal/samsung/exynos_thermal_common.c
+8
-4
drivers/thermal/samsung/exynos_tmu.c
+8
-4
drivers/thermal/samsung/exynos_tmu.c
···
317
317
318
318
con = readl(data->base + reg->tmu_ctrl);
319
319
320
+
if (pdata->test_mux)
321
+
con |= (pdata->test_mux << reg->test_mux_addr_shift);
322
+
320
323
if (pdata->reference_voltage) {
321
324
con &= ~(reg->buf_vref_sel_mask << reg->buf_vref_sel_shift);
322
325
con |= pdata->reference_voltage << reg->buf_vref_sel_shift;
···
491
488
},
492
489
{
493
490
.compatible = "samsung,exynos4412-tmu",
494
-
.data = (void *)EXYNOS5250_TMU_DRV_DATA,
491
+
.data = (void *)EXYNOS4412_TMU_DRV_DATA,
495
492
},
496
493
{
497
494
.compatible = "samsung,exynos5250-tmu",
···
632
629
if (ret)
633
630
return ret;
634
631
635
-
if (pdata->type == SOC_ARCH_EXYNOS ||
636
-
pdata->type == SOC_ARCH_EXYNOS4210 ||
637
-
pdata->type == SOC_ARCH_EXYNOS5440)
632
+
if (pdata->type == SOC_ARCH_EXYNOS4210 ||
633
+
pdata->type == SOC_ARCH_EXYNOS4412 ||
634
+
pdata->type == SOC_ARCH_EXYNOS5250 ||
635
+
pdata->type == SOC_ARCH_EXYNOS5440)
638
636
data->soc = pdata->type;
639
637
else {
640
638
ret = -EINVAL;
+6
-1
drivers/thermal/samsung/exynos_tmu.h
+6
-1
drivers/thermal/samsung/exynos_tmu.h
···
41
41
42
42
enum soc_type {
43
43
SOC_ARCH_EXYNOS4210 = 1,
44
-
SOC_ARCH_EXYNOS,
44
+
SOC_ARCH_EXYNOS4412,
45
+
SOC_ARCH_EXYNOS5250,
45
46
SOC_ARCH_EXYNOS5440,
46
47
};
47
48
···
85
84
* @triminfo_reload_shift: shift of triminfo reload enable bit in triminfo_ctrl
86
85
reg.
87
86
* @tmu_ctrl: TMU main controller register.
87
+
* @test_mux_addr_shift: shift bits of test mux address.
88
88
* @buf_vref_sel_shift: shift bits of reference voltage in tmu_ctrl register.
89
89
* @buf_vref_sel_mask: mask bits of reference voltage in tmu_ctrl register.
90
90
* @therm_trip_mode_shift: shift bits of tripping mode in tmu_ctrl register.
···
152
150
u32 triminfo_reload_shift;
153
151
154
152
u32 tmu_ctrl;
153
+
u32 test_mux_addr_shift;
155
154
u32 buf_vref_sel_shift;
156
155
u32 buf_vref_sel_mask;
157
156
u32 therm_trip_mode_shift;
···
260
257
* @first_point_trim: temp value of the first point trimming
261
258
* @second_point_trim: temp value of the second point trimming
262
259
* @default_temp_offset: default temperature offset in case of no trimming
260
+
* @test_mux; information if SoC supports test MUX
263
261
* @cal_type: calibration type for temperature
264
262
* @cal_mode: calibration mode for temperature
265
263
* @freq_clip_table: Table representing frequency reduction percentage.
···
290
286
u8 first_point_trim;
291
287
u8 second_point_trim;
292
288
u8 default_temp_offset;
289
+
u8 test_mux;
293
290
294
291
enum calibration_type cal_type;
295
292
enum calibration_mode cal_mode;
+24
-6
drivers/thermal/samsung/exynos_tmu_data.c
+24
-6
drivers/thermal/samsung/exynos_tmu_data.c
···
90
90
};
91
91
#endif
92
92
93
-
#if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
94
-
static const struct exynos_tmu_registers exynos5250_tmu_registers = {
93
+
#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
94
+
static const struct exynos_tmu_registers exynos4412_tmu_registers = {
95
95
.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
96
96
.triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
97
97
.triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
98
98
.triminfo_ctrl = EXYNOS_TMU_TRIMINFO_CON,
99
99
.triminfo_reload_shift = EXYNOS_TRIMINFO_RELOAD_SHIFT,
100
100
.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
101
+
.test_mux_addr_shift = EXYNOS4412_MUX_ADDR_SHIFT,
101
102
.buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
102
103
.buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
103
104
.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
···
129
128
.emul_time_mask = EXYNOS_EMUL_TIME_MASK,
130
129
};
131
130
132
-
#define EXYNOS5250_TMU_DATA \
131
+
#define EXYNOS4412_TMU_DATA \
133
132
.threshold_falling = 10, \
134
133
.trigger_levels[0] = 85, \
135
134
.trigger_levels[1] = 103, \
···
163
162
.temp_level = 103, \
164
163
}, \
165
164
.freq_tab_count = 2, \
166
-
.type = SOC_ARCH_EXYNOS, \
167
-
.registers = &exynos5250_tmu_registers, \
165
+
.registers = &exynos4412_tmu_registers, \
168
166
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
169
167
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
170
168
TMU_SUPPORT_EMUL_TIME)
169
+
#endif
171
170
171
+
#if defined(CONFIG_SOC_EXYNOS4412)
172
+
struct exynos_tmu_init_data const exynos4412_default_tmu_data = {
173
+
.tmu_data = {
174
+
{
175
+
EXYNOS4412_TMU_DATA,
176
+
.type = SOC_ARCH_EXYNOS4412,
177
+
.test_mux = EXYNOS4412_MUX_ADDR_VALUE,
178
+
},
179
+
},
180
+
.tmu_count = 1,
181
+
};
182
+
#endif
183
+
184
+
#if defined(CONFIG_SOC_EXYNOS5250)
172
185
struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
173
186
.tmu_data = {
174
-
{ EXYNOS5250_TMU_DATA },
187
+
{
188
+
EXYNOS4412_TMU_DATA,
189
+
.type = SOC_ARCH_EXYNOS5250,
190
+
},
175
191
},
176
192
.tmu_count = 1,
177
193
};
+12
-1
drivers/thermal/samsung/exynos_tmu_data.h
+12
-1
drivers/thermal/samsung/exynos_tmu_data.h
···
95
95
96
96
#define EXYNOS_MAX_TRIGGER_PER_REG 4
97
97
98
+
/* Exynos4412 specific */
99
+
#define EXYNOS4412_MUX_ADDR_VALUE 6
100
+
#define EXYNOS4412_MUX_ADDR_SHIFT 20
101
+
98
102
/*exynos5440 specific registers*/
99
103
#define EXYNOS5440_TMU_S0_7_TRIM 0x000
100
104
#define EXYNOS5440_TMU_S0_7_CTRL 0x020
···
142
138
#define EXYNOS4210_TMU_DRV_DATA (NULL)
143
139
#endif
144
140
145
-
#if (defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412))
141
+
#if defined(CONFIG_SOC_EXYNOS4412)
142
+
extern struct exynos_tmu_init_data const exynos4412_default_tmu_data;
143
+
#define EXYNOS4412_TMU_DRV_DATA (&exynos4412_default_tmu_data)
144
+
#else
145
+
#define EXYNOS4412_TMU_DRV_DATA (NULL)
146
+
#endif
147
+
148
+
#if defined(CONFIG_SOC_EXYNOS5250)
146
149
extern struct exynos_tmu_init_data const exynos5250_default_tmu_data;
147
150
#define EXYNOS5250_TMU_DRV_DATA (&exynos5250_default_tmu_data)
148
151
#else
+1
-1
drivers/thermal/thermal_hwmon.c
+1
-1
drivers/thermal/thermal_hwmon.c
···
159
159
160
160
INIT_LIST_HEAD(&hwmon->tz_list);
161
161
strlcpy(hwmon->type, tz->type, THERMAL_NAME_LENGTH);
162
-
hwmon->device = hwmon_device_register(&tz->device);
162
+
hwmon->device = hwmon_device_register(NULL);
163
163
if (IS_ERR(hwmon->device)) {
164
164
result = PTR_ERR(hwmon->device);
165
165
goto free_mem;
+1
drivers/thermal/ti-soc-thermal/ti-thermal-common.c
+1
drivers/thermal/ti-soc-thermal/ti-thermal-common.c
+8
-6
drivers/thermal/x86_pkg_temp_thermal.c
+8
-6
drivers/thermal/x86_pkg_temp_thermal.c
···
316
316
int phy_id = topology_physical_package_id(cpu);
317
317
struct phy_dev_entry *phdev = pkg_temp_thermal_get_phy_entry(cpu);
318
318
bool notify = false;
319
+
unsigned long flags;
319
320
320
321
if (!phdev)
321
322
return;
322
323
323
-
spin_lock(&pkg_work_lock);
324
+
spin_lock_irqsave(&pkg_work_lock, flags);
324
325
++pkg_work_cnt;
325
326
if (unlikely(phy_id > max_phy_id)) {
326
-
spin_unlock(&pkg_work_lock);
327
+
spin_unlock_irqrestore(&pkg_work_lock, flags);
327
328
return;
328
329
}
329
330
pkg_work_scheduled[phy_id] = 0;
330
-
spin_unlock(&pkg_work_lock);
331
+
spin_unlock_irqrestore(&pkg_work_lock, flags);
331
332
332
333
enable_pkg_thres_interrupt();
333
334
rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
···
398
397
int thres_count;
399
398
u32 eax, ebx, ecx, edx;
400
399
u8 *temp;
400
+
unsigned long flags;
401
401
402
402
cpuid(6, &eax, &ebx, &ecx, &edx);
403
403
thres_count = ebx & 0x07;
···
422
420
goto err_ret_unlock;
423
421
}
424
422
425
-
spin_lock(&pkg_work_lock);
423
+
spin_lock_irqsave(&pkg_work_lock, flags);
426
424
if (topology_physical_package_id(cpu) > max_phy_id)
427
425
max_phy_id = topology_physical_package_id(cpu);
428
426
temp = krealloc(pkg_work_scheduled,
429
427
(max_phy_id+1) * sizeof(u8), GFP_ATOMIC);
430
428
if (!temp) {
431
-
spin_unlock(&pkg_work_lock);
429
+
spin_unlock_irqrestore(&pkg_work_lock, flags);
432
430
err = -ENOMEM;
433
431
goto err_ret_free;
434
432
}
435
433
pkg_work_scheduled = temp;
436
434
pkg_work_scheduled[topology_physical_package_id(cpu)] = 0;
437
-
spin_unlock(&pkg_work_lock);
435
+
spin_unlock_irqrestore(&pkg_work_lock, flags);
438
436
439
437
phy_dev_entry->phys_proc_id = topology_physical_package_id(cpu);
440
438
phy_dev_entry->first_cpu = cpu;