Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'i2c-for-6.12-rc1-additional_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
- fix DesignWare driver ENABLE-ABORT sequence, ensuring ABORT can
always be sent when needed
- check for PCLK in the SynQuacer controller as an optional clock,
allowing ACPI to directly provide the clock rate
- KEBA driver Kconfig dependency fix
- fix XIIC driver power suspend sequence
* tag 'i2c-for-6.12-rc1-additional_fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: xiic: Fix pm_runtime_set_suspended() with runtime pm enabled
i2c: keba: I2C_KEBA should depend on KEBA_CP500
i2c: synquacer: Deal with optional PCLK correctly
i2c: designware: fix controller is holding SCL low while ENABLE bit is disabled
+58
-3
+1
drivers/i2c/busses/Kconfig
+1
drivers/i2c/busses/Kconfig
+14
drivers/i2c/busses/i2c-designware-common.c
+14
drivers/i2c/busses/i2c-designware-common.c
···
523
523
524
524
void __i2c_dw_disable(struct dw_i2c_dev *dev)
525
525
{
526
+
struct i2c_timings *t = &dev->timings;
526
527
unsigned int raw_intr_stats;
527
528
unsigned int enable;
528
529
int timeout = 100;
···
536
535
537
536
abort_needed = raw_intr_stats & DW_IC_INTR_MST_ON_HOLD;
538
537
if (abort_needed) {
538
+
if (!(enable & DW_IC_ENABLE_ENABLE)) {
539
+
regmap_write(dev->map, DW_IC_ENABLE, DW_IC_ENABLE_ENABLE);
540
+
/*
541
+
* Wait 10 times the signaling period of the highest I2C
542
+
* transfer supported by the driver (for 400KHz this is
543
+
* 25us) to ensure the I2C ENABLE bit is already set
544
+
* as described in the DesignWare I2C databook.
545
+
*/
546
+
fsleep(DIV_ROUND_CLOSEST_ULL(10 * MICRO, t->bus_freq_hz));
547
+
/* Set ENABLE bit before setting ABORT */
548
+
enable |= DW_IC_ENABLE_ENABLE;
549
+
}
550
+
539
551
regmap_write(dev->map, DW_IC_ENABLE, enable | DW_IC_ENABLE_ABORT);
540
552
ret = regmap_read_poll_timeout(dev->map, DW_IC_ENABLE, enable,
541
553
!(enable & DW_IC_ENABLE_ABORT), 10,
+1
drivers/i2c/busses/i2c-designware-core.h
+1
drivers/i2c/busses/i2c-designware-core.h
+38
drivers/i2c/busses/i2c-designware-master.c
+38
drivers/i2c/busses/i2c-designware-master.c
···
271
271
__i2c_dw_write_intr_mask(dev, DW_IC_INTR_MASTER_MASK);
272
272
}
273
273
274
+
/*
275
+
* This function waits for the controller to be idle before disabling I2C
276
+
* When the controller is not in the IDLE state, the MST_ACTIVITY bit
277
+
* (IC_STATUS[5]) is set.
278
+
*
279
+
* Values:
280
+
* 0x1 (ACTIVE): Controller not idle
281
+
* 0x0 (IDLE): Controller is idle
282
+
*
283
+
* The function is called after completing the current transfer.
284
+
*
285
+
* Returns:
286
+
* False when the controller is in the IDLE state.
287
+
* True when the controller is in the ACTIVE state.
288
+
*/
289
+
static bool i2c_dw_is_controller_active(struct dw_i2c_dev *dev)
290
+
{
291
+
u32 status;
292
+
293
+
regmap_read(dev->map, DW_IC_STATUS, &status);
294
+
if (!(status & DW_IC_STATUS_MASTER_ACTIVITY))
295
+
return false;
296
+
297
+
return regmap_read_poll_timeout(dev->map, DW_IC_STATUS, status,
298
+
!(status & DW_IC_STATUS_MASTER_ACTIVITY),
299
+
1100, 20000) != 0;
300
+
}
301
+
274
302
static int i2c_dw_check_stopbit(struct dw_i2c_dev *dev)
275
303
{
276
304
u32 val;
···
833
805
i2c_dw_init_master(dev);
834
806
goto done;
835
807
}
808
+
809
+
/*
810
+
* This happens rarely (~1:500) and is hard to reproduce. Debug trace
811
+
* showed that IC_STATUS had value of 0x23 when STOP_DET occurred,
812
+
* if disable IC_ENABLE.ENABLE immediately that can result in
813
+
* IC_RAW_INTR_STAT.MASTER_ON_HOLD holding SCL low. Check if
814
+
* controller is still ACTIVE before disabling I2C.
815
+
*/
816
+
if (i2c_dw_is_controller_active(dev))
817
+
dev_err(dev->dev, "controller active\n");
836
818
837
819
/*
838
820
* We must disable the adapter before returning and signaling the end
+3
-2
drivers/i2c/busses/i2c-synquacer.c
+3
-2
drivers/i2c/busses/i2c-synquacer.c
···
550
550
device_property_read_u32(&pdev->dev, "socionext,pclk-rate",
551
551
&i2c->pclkrate);
552
552
553
-
pclk = devm_clk_get_enabled(&pdev->dev, "pclk");
553
+
pclk = devm_clk_get_optional_enabled(&pdev->dev, "pclk");
554
554
if (IS_ERR(pclk))
555
555
return dev_err_probe(&pdev->dev, PTR_ERR(pclk),
556
556
"failed to get and enable clock\n");
557
557
558
-
i2c->pclkrate = clk_get_rate(pclk);
558
+
if (pclk)
559
+
i2c->pclkrate = clk_get_rate(pclk);
559
560
560
561
if (i2c->pclkrate < SYNQUACER_I2C_MIN_CLK_RATE ||
561
562
i2c->pclkrate > SYNQUACER_I2C_MAX_CLK_RATE)