Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-linus' of git://gitorious.org/linux-omap-dss2/linux
* 'for-linus' of git://gitorious.org/linux-omap-dss2/linux:
OMAP: DSS2: OMAPFB: fix crash when panel driver was not loaded
OMAP: DSS2: Reject scaling settings when they cannot be supported
OMAP: DSS2: Make check-delay-loops consistent
OMAP: DSS2: OMAPFB: fix omapfb_free_fbmem()
video/omap: add __init/__exit macros to drivers/video/omap/lcd_htcherald.c
OMAP: DSS2: Fix compile warning
MAINTAINERS: Combine DSS2 and OMAPFB2 into one entry
MAINTAINERS: change omapfb maintainer
OMAP: OMAPFB: add dummy release function for omapdss
OMAP: OMAPFB: fix clk_get for RFBI
OMAP: DSS2: RFBI: convert to new kfifo API
OMAP: DSS2: Fix crash when panel doesn't define enable_te()
OMAP: DSS2: Collect interrupt statistics
OMAP: DSS2: DSI: print debug DCS cmd in hex
OMAP: DSS2: DSI: fix VC channels in send_short and send_null
+309
-67
+4
-13
MAINTAINERS
+4
-13
MAINTAINERS
···
3940
3940
F: sound/soc/omap/
3941
3941
3942
3942
OMAP FRAMEBUFFER SUPPORT
3943
-
M: Imre Deak <imre.deak@nokia.com>
3943
+
M: Tomi Valkeinen <tomi.valkeinen@nokia.com>
3944
3944
L: linux-fbdev@vger.kernel.org
3945
3945
L: linux-omap@vger.kernel.org
3946
3946
S: Maintained
3947
3947
F: drivers/video/omap/
3948
3948
3949
-
OMAP DISPLAY SUBSYSTEM SUPPORT (DSS2)
3949
+
OMAP DISPLAY SUBSYSTEM and FRAMEBUFFER SUPPORT (DSS2)
3950
3950
M: Tomi Valkeinen <tomi.valkeinen@nokia.com>
3951
3951
L: linux-omap@vger.kernel.org
3952
-
L: linux-fbdev@vger.kernel.org (moderated for non-subscribers)
3952
+
L: linux-fbdev@vger.kernel.org
3953
3953
S: Maintained
3954
-
F: drivers/video/omap2/dss/
3955
-
F: drivers/video/omap2/vrfb.c
3956
-
F: drivers/video/omap2/vram.c
3954
+
F: drivers/video/omap2/
3957
3955
F: Documentation/arm/OMAP/DSS
3958
-
3959
-
OMAP FRAMEBUFFER SUPPORT (FOR DSS2)
3960
-
M: Tomi Valkeinen <tomi.valkeinen@nokia.com>
3961
-
L: linux-omap@vger.kernel.org
3962
-
L: linux-fbdev@vger.kernel.org (moderated for non-subscribers)
3963
-
S: Maintained
3964
-
F: drivers/video/omap2/omapfb/
3965
3956
3966
3957
OMAP MMC SUPPORT
3967
3958
M: Jarkko Lavinen <jarkko.lavinen@nokia.com>
+3
-15
drivers/video/omap/dispc.c
+3
-15
drivers/video/omap/dispc.c
···
189
189
struct omapfb_color_key color_key;
190
190
} dispc;
191
191
192
-
static struct platform_device omapdss_device = {
193
-
.name = "omapdss",
194
-
.id = -1,
195
-
};
196
-
197
192
static void enable_lcd_clocks(int enable);
198
193
199
194
static void inline dispc_write_reg(int idx, u32 val)
···
915
920
916
921
static int get_dss_clocks(void)
917
922
{
918
-
dispc.dss_ick = clk_get(&omapdss_device.dev, "ick");
923
+
dispc.dss_ick = clk_get(&dispc.fbdev->dssdev->dev, "ick");
919
924
if (IS_ERR(dispc.dss_ick)) {
920
925
dev_err(dispc.fbdev->dev, "can't get ick\n");
921
926
return PTR_ERR(dispc.dss_ick);
922
927
}
923
928
924
-
dispc.dss1_fck = clk_get(&omapdss_device.dev, "dss1_fck");
929
+
dispc.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss1_fck");
925
930
if (IS_ERR(dispc.dss1_fck)) {
926
931
dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
927
932
clk_put(dispc.dss_ick);
928
933
return PTR_ERR(dispc.dss1_fck);
929
934
}
930
935
931
-
dispc.dss_54m_fck = clk_get(&omapdss_device.dev, "tv_fck");
936
+
dispc.dss_54m_fck = clk_get(&dispc.fbdev->dssdev->dev, "tv_fck");
932
937
if (IS_ERR(dispc.dss_54m_fck)) {
933
938
dev_err(dispc.fbdev->dev, "can't get tv_fck\n");
934
939
clk_put(dispc.dss_ick);
···
1380
1385
int skip_init = 0;
1381
1386
int i;
1382
1387
1383
-
r = platform_device_register(&omapdss_device);
1384
-
if (r) {
1385
-
dev_err(fbdev->dev, "can't register omapdss device\n");
1386
-
return r;
1387
-
}
1388
-
1389
1388
memset(&dispc, 0, sizeof(dispc));
1390
1389
1391
1390
dispc.base = ioremap(DISPC_BASE, SZ_1K);
···
1523
1534
free_irq(INT_24XX_DSS_IRQ, dispc.fbdev);
1524
1535
put_dss_clocks();
1525
1536
iounmap(dispc.base);
1526
-
platform_device_unregister(&omapdss_device);
1527
1537
}
1528
1538
1529
1539
const struct lcd_ctrl omap2_int_ctrl = {
+2
-2
drivers/video/omap/lcd_htcherald.c
+2
-2
drivers/video/omap/lcd_htcherald.c
···
115
115
},
116
116
};
117
117
118
-
static int htcherald_panel_drv_init(void)
118
+
static int __init htcherald_panel_drv_init(void)
119
119
{
120
120
return platform_driver_register(&htcherald_panel_driver);
121
121
}
122
122
123
-
static void htcherald_panel_drv_cleanup(void)
123
+
static void __exit htcherald_panel_drv_cleanup(void)
124
124
{
125
125
platform_driver_unregister(&htcherald_panel_driver);
126
126
}
+2
drivers/video/omap/omapfb.h
+2
drivers/video/omap/omapfb.h
+25
drivers/video/omap/omapfb_main.c
+25
drivers/video/omap/omapfb_main.c
···
83
83
{ 1 << OMAPFB_COLOR_YUY422, "YUY422", },
84
84
};
85
85
86
+
static void omapdss_release(struct device *dev)
87
+
{
88
+
}
89
+
90
+
/* dummy device for clocks */
91
+
static struct platform_device omapdss_device = {
92
+
.name = "omapdss",
93
+
.id = -1,
94
+
.dev = {
95
+
.release = omapdss_release,
96
+
},
97
+
};
98
+
86
99
/*
87
100
* ---------------------------------------------------------------------------
88
101
* LCD panel
···
1713
1700
1714
1701
fbdev->dev = &pdev->dev;
1715
1702
fbdev->panel = panel;
1703
+
fbdev->dssdev = &omapdss_device;
1716
1704
platform_set_drvdata(pdev, fbdev);
1717
1705
1718
1706
mutex_init(&fbdev->rqueue_mutex);
···
1828
1814
1829
1815
static int omapfb_probe(struct platform_device *pdev)
1830
1816
{
1817
+
int r;
1818
+
1831
1819
BUG_ON(fbdev_pdev != NULL);
1820
+
1821
+
r = platform_device_register(&omapdss_device);
1822
+
if (r) {
1823
+
dev_err(&pdev->dev, "can't register omapdss device\n");
1824
+
return r;
1825
+
}
1832
1826
1833
1827
/* Delay actual initialization until the LCD is registered */
1834
1828
fbdev_pdev = pdev;
···
1864
1842
1865
1843
fbdev->state = OMAPFB_DISABLED;
1866
1844
omapfb_free_resources(fbdev, saved_state);
1845
+
1846
+
platform_device_unregister(&omapdss_device);
1847
+
fbdev->dssdev = NULL;
1867
1848
1868
1849
return 0;
1869
1850
}
+2
-2
drivers/video/omap/rfbi.c
+2
-2
drivers/video/omap/rfbi.c
···
83
83
84
84
static int rfbi_get_clocks(void)
85
85
{
86
-
rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "ick");
86
+
rfbi.dss_ick = clk_get(&dispc.fbdev->dssdev->dev, "ick");
87
87
if (IS_ERR(rfbi.dss_ick)) {
88
88
dev_err(rfbi.fbdev->dev, "can't get ick\n");
89
89
return PTR_ERR(rfbi.dss_ick);
90
90
}
91
91
92
-
rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck");
92
+
rfbi.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss1_fck");
93
93
if (IS_ERR(rfbi.dss1_fck)) {
94
94
dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
95
95
clk_put(rfbi.dss_ick);
+7
drivers/video/omap2/dss/Kconfig
+7
drivers/video/omap2/dss/Kconfig
···
25
25
This enables debug messages. You need to enable printing
26
26
with 'debug' module parameter.
27
27
28
+
config OMAP2_DSS_COLLECT_IRQ_STATS
29
+
bool "Collect DSS IRQ statistics"
30
+
depends on OMAP2_DSS_DEBUG_SUPPORT
31
+
default n
32
+
help
33
+
Collect DSS IRQ statistics, printable via debugfs
34
+
28
35
config OMAP2_DSS_RFBI
29
36
bool "RFBI support"
30
37
default n
+10
drivers/video/omap2/dss/core.c
+10
drivers/video/omap2/dss/core.c
···
124
124
dss_clk_disable_all_no_ctx();
125
125
}
126
126
127
+
#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
127
128
/* CLOCKS */
128
129
static void core_dump_clocks(struct seq_file *s)
129
130
{
···
150
149
clocks[i]->usecount);
151
150
}
152
151
}
152
+
#endif /* defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) */
153
153
154
154
static int dss_get_clock(struct clk **clock, const char *clk_name)
155
155
{
···
396
394
397
395
debugfs_create_file("clk", S_IRUGO, dss_debugfs_dir,
398
396
&dss_debug_dump_clocks, &dss_debug_fops);
397
+
398
+
debugfs_create_file("dispc_irq", S_IRUGO, dss_debugfs_dir,
399
+
&dispc_dump_irqs, &dss_debug_fops);
400
+
401
+
#ifdef CONFIG_OMAP2_DSS_DSI
402
+
debugfs_create_file("dsi_irq", S_IRUGO, dss_debugfs_dir,
403
+
&dsi_dump_irqs, &dss_debug_fops);
404
+
#endif
399
405
400
406
debugfs_create_file("dss", S_IRUGO, dss_debugfs_dir,
401
407
&dss_dump_regs, &dss_debug_fops);
+72
-2
drivers/video/omap2/dss/dispc.c
+72
-2
drivers/video/omap2/dss/dispc.c
···
148
148
DISPC_VID_ATTRIBUTES(0),
149
149
DISPC_VID_ATTRIBUTES(1) };
150
150
151
+
struct dispc_irq_stats {
152
+
unsigned long last_reset;
153
+
unsigned irq_count;
154
+
unsigned irqs[32];
155
+
};
156
+
151
157
static struct {
152
158
void __iomem *base;
153
159
···
166
160
struct work_struct error_work;
167
161
168
162
u32 ctx[DISPC_SZ_REGS / sizeof(u32)];
163
+
164
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
165
+
spinlock_t irq_stats_lock;
166
+
struct dispc_irq_stats irq_stats;
167
+
#endif
169
168
} dispc;
170
169
171
170
static void _omap_dispc_set_irqs(void);
···
1454
1443
do_div(tmp, 2 * out_height * ppl);
1455
1444
fclk = tmp;
1456
1445
1457
-
if (height > 2 * out_height && ppl != out_width) {
1446
+
if (height > 2 * out_height) {
1447
+
if (ppl == out_width)
1448
+
return 0;
1449
+
1458
1450
tmp = pclk * (height - 2 * out_height) * out_width;
1459
1451
do_div(tmp, 2 * out_height * (ppl - out_width));
1460
1452
fclk = max(fclk, (u32) tmp);
···
1637
1623
DSSDBG("required fclk rate = %lu Hz\n", fclk);
1638
1624
DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate());
1639
1625
1640
-
if (fclk > dispc_fclk_rate()) {
1626
+
if (!fclk || fclk > dispc_fclk_rate()) {
1641
1627
DSSERR("failed to set up scaling, "
1642
1628
"required fclk rate = %lu Hz, "
1643
1629
"current fclk rate = %lu Hz\n",
···
2261
2247
enable_clocks(0);
2262
2248
}
2263
2249
2250
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
2251
+
void dispc_dump_irqs(struct seq_file *s)
2252
+
{
2253
+
unsigned long flags;
2254
+
struct dispc_irq_stats stats;
2255
+
2256
+
spin_lock_irqsave(&dispc.irq_stats_lock, flags);
2257
+
2258
+
stats = dispc.irq_stats;
2259
+
memset(&dispc.irq_stats, 0, sizeof(dispc.irq_stats));
2260
+
dispc.irq_stats.last_reset = jiffies;
2261
+
2262
+
spin_unlock_irqrestore(&dispc.irq_stats_lock, flags);
2263
+
2264
+
seq_printf(s, "period %u ms\n",
2265
+
jiffies_to_msecs(jiffies - stats.last_reset));
2266
+
2267
+
seq_printf(s, "irqs %d\n", stats.irq_count);
2268
+
#define PIS(x) \
2269
+
seq_printf(s, "%-20s %10d\n", #x, stats.irqs[ffs(DISPC_IRQ_##x)-1]);
2270
+
2271
+
PIS(FRAMEDONE);
2272
+
PIS(VSYNC);
2273
+
PIS(EVSYNC_EVEN);
2274
+
PIS(EVSYNC_ODD);
2275
+
PIS(ACBIAS_COUNT_STAT);
2276
+
PIS(PROG_LINE_NUM);
2277
+
PIS(GFX_FIFO_UNDERFLOW);
2278
+
PIS(GFX_END_WIN);
2279
+
PIS(PAL_GAMMA_MASK);
2280
+
PIS(OCP_ERR);
2281
+
PIS(VID1_FIFO_UNDERFLOW);
2282
+
PIS(VID1_END_WIN);
2283
+
PIS(VID2_FIFO_UNDERFLOW);
2284
+
PIS(VID2_END_WIN);
2285
+
PIS(SYNC_LOST);
2286
+
PIS(SYNC_LOST_DIGIT);
2287
+
PIS(WAKEUP);
2288
+
#undef PIS
2289
+
}
2290
+
#else
2291
+
void dispc_dump_irqs(struct seq_file *s) { }
2292
+
#endif
2293
+
2264
2294
void dispc_dump_regs(struct seq_file *s)
2265
2295
{
2266
2296
#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dispc_read_reg(r))
···
2723
2665
2724
2666
irqstatus = dispc_read_reg(DISPC_IRQSTATUS);
2725
2667
2668
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
2669
+
spin_lock(&dispc.irq_stats_lock);
2670
+
dispc.irq_stats.irq_count++;
2671
+
dss_collect_irq_stats(irqstatus, dispc.irq_stats.irqs);
2672
+
spin_unlock(&dispc.irq_stats_lock);
2673
+
#endif
2674
+
2726
2675
#ifdef DEBUG
2727
2676
if (dss_debug)
2728
2677
print_irq_status(irqstatus);
···
3076
3011
u32 rev;
3077
3012
3078
3013
spin_lock_init(&dispc.irq_lock);
3014
+
3015
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
3016
+
spin_lock_init(&dispc.irq_stats_lock);
3017
+
dispc.irq_stats.last_reset = jiffies;
3018
+
#endif
3079
3019
3080
3020
INIT_WORK(&dispc.error_work, dispc_error_worker);
3081
3021
+144
-15
drivers/video/omap2/dss/dsi.c
+144
-15
drivers/video/omap2/dss/dsi.c
···
204
204
struct omap_dss_device *device;
205
205
};
206
206
207
+
struct dsi_irq_stats {
208
+
unsigned long last_reset;
209
+
unsigned irq_count;
210
+
unsigned dsi_irqs[32];
211
+
unsigned vc_irqs[4][32];
212
+
unsigned cio_irqs[32];
213
+
};
214
+
207
215
static struct
208
216
{
209
217
void __iomem *base;
···
266
258
#endif
267
259
int debug_read;
268
260
int debug_write;
261
+
262
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
263
+
spinlock_t irq_stats_lock;
264
+
struct dsi_irq_stats irq_stats;
265
+
#endif
269
266
} dsi;
270
267
271
268
#ifdef DEBUG
···
541
528
542
529
irqstatus = dsi_read_reg(DSI_IRQSTATUS);
543
530
531
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
532
+
spin_lock(&dsi.irq_stats_lock);
533
+
dsi.irq_stats.irq_count++;
534
+
dss_collect_irq_stats(irqstatus, dsi.irq_stats.dsi_irqs);
535
+
#endif
536
+
544
537
if (irqstatus & DSI_IRQ_ERROR_MASK) {
545
538
DSSERR("DSI error, irqstatus %x\n", irqstatus);
546
539
print_irq_status(irqstatus);
···
568
549
569
550
vcstatus = dsi_read_reg(DSI_VC_IRQSTATUS(i));
570
551
552
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
553
+
dss_collect_irq_stats(vcstatus, dsi.irq_stats.vc_irqs[i]);
554
+
#endif
555
+
571
556
if (vcstatus & DSI_VC_IRQ_BTA)
572
557
complete(&dsi.bta_completion);
573
558
···
591
568
if (irqstatus & DSI_IRQ_COMPLEXIO_ERR) {
592
569
ciostatus = dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS);
593
570
571
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
572
+
dss_collect_irq_stats(ciostatus, dsi.irq_stats.cio_irqs);
573
+
#endif
574
+
594
575
dsi_write_reg(DSI_COMPLEXIO_IRQ_STATUS, ciostatus);
595
576
/* flush posted write */
596
577
dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS);
···
606
579
dsi_write_reg(DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK);
607
580
/* flush posted write */
608
581
dsi_read_reg(DSI_IRQSTATUS);
582
+
583
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
584
+
spin_unlock(&dsi.irq_stats_lock);
585
+
#endif
609
586
}
610
587
611
588
···
828
797
829
798
/* PLL_PWR_STATUS */
830
799
while (FLD_GET(dsi_read_reg(DSI_CLK_CTRL), 29, 28) != state) {
831
-
udelay(1);
832
-
if (t++ > 1000) {
800
+
if (++t > 1000) {
833
801
DSSERR("Failed to set DSI PLL power mode to %d\n",
834
802
state);
835
803
return -ENODEV;
836
804
}
805
+
udelay(1);
837
806
}
838
807
839
808
return 0;
···
1257
1226
enable_clocks(0);
1258
1227
}
1259
1228
1229
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
1230
+
void dsi_dump_irqs(struct seq_file *s)
1231
+
{
1232
+
unsigned long flags;
1233
+
struct dsi_irq_stats stats;
1234
+
1235
+
spin_lock_irqsave(&dsi.irq_stats_lock, flags);
1236
+
1237
+
stats = dsi.irq_stats;
1238
+
memset(&dsi.irq_stats, 0, sizeof(dsi.irq_stats));
1239
+
dsi.irq_stats.last_reset = jiffies;
1240
+
1241
+
spin_unlock_irqrestore(&dsi.irq_stats_lock, flags);
1242
+
1243
+
seq_printf(s, "period %u ms\n",
1244
+
jiffies_to_msecs(jiffies - stats.last_reset));
1245
+
1246
+
seq_printf(s, "irqs %d\n", stats.irq_count);
1247
+
#define PIS(x) \
1248
+
seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]);
1249
+
1250
+
seq_printf(s, "-- DSI interrupts --\n");
1251
+
PIS(VC0);
1252
+
PIS(VC1);
1253
+
PIS(VC2);
1254
+
PIS(VC3);
1255
+
PIS(WAKEUP);
1256
+
PIS(RESYNC);
1257
+
PIS(PLL_LOCK);
1258
+
PIS(PLL_UNLOCK);
1259
+
PIS(PLL_RECALL);
1260
+
PIS(COMPLEXIO_ERR);
1261
+
PIS(HS_TX_TIMEOUT);
1262
+
PIS(LP_RX_TIMEOUT);
1263
+
PIS(TE_TRIGGER);
1264
+
PIS(ACK_TRIGGER);
1265
+
PIS(SYNC_LOST);
1266
+
PIS(LDO_POWER_GOOD);
1267
+
PIS(TA_TIMEOUT);
1268
+
#undef PIS
1269
+
1270
+
#define PIS(x) \
1271
+
seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \
1272
+
stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \
1273
+
stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \
1274
+
stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \
1275
+
stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]);
1276
+
1277
+
seq_printf(s, "-- VC interrupts --\n");
1278
+
PIS(CS);
1279
+
PIS(ECC_CORR);
1280
+
PIS(PACKET_SENT);
1281
+
PIS(FIFO_TX_OVF);
1282
+
PIS(FIFO_RX_OVF);
1283
+
PIS(BTA);
1284
+
PIS(ECC_NO_CORR);
1285
+
PIS(FIFO_TX_UDF);
1286
+
PIS(PP_BUSY_CHANGE);
1287
+
#undef PIS
1288
+
1289
+
#define PIS(x) \
1290
+
seq_printf(s, "%-20s %10d\n", #x, \
1291
+
stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]);
1292
+
1293
+
seq_printf(s, "-- CIO interrupts --\n");
1294
+
PIS(ERRSYNCESC1);
1295
+
PIS(ERRSYNCESC2);
1296
+
PIS(ERRSYNCESC3);
1297
+
PIS(ERRESC1);
1298
+
PIS(ERRESC2);
1299
+
PIS(ERRESC3);
1300
+
PIS(ERRCONTROL1);
1301
+
PIS(ERRCONTROL2);
1302
+
PIS(ERRCONTROL3);
1303
+
PIS(STATEULPS1);
1304
+
PIS(STATEULPS2);
1305
+
PIS(STATEULPS3);
1306
+
PIS(ERRCONTENTIONLP0_1);
1307
+
PIS(ERRCONTENTIONLP1_1);
1308
+
PIS(ERRCONTENTIONLP0_2);
1309
+
PIS(ERRCONTENTIONLP1_2);
1310
+
PIS(ERRCONTENTIONLP0_3);
1311
+
PIS(ERRCONTENTIONLP1_3);
1312
+
PIS(ULPSACTIVENOT_ALL0);
1313
+
PIS(ULPSACTIVENOT_ALL1);
1314
+
#undef PIS
1315
+
}
1316
+
#endif
1317
+
1260
1318
void dsi_dump_regs(struct seq_file *s)
1261
1319
{
1262
1320
#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(r))
···
1441
1321
1442
1322
/* PWR_STATUS */
1443
1323
while (FLD_GET(dsi_read_reg(DSI_COMPLEXIO_CFG1), 26, 25) != state) {
1444
-
udelay(1);
1445
-
if (t++ > 1000) {
1324
+
if (++t > 1000) {
1446
1325
DSSERR("failed to set complexio power state to "
1447
1326
"%d\n", state);
1448
1327
return -ENODEV;
1449
1328
}
1329
+
udelay(1);
1450
1330
}
1451
1331
1452
1332
return 0;
···
1646
1526
1647
1527
static int _dsi_wait_reset(void)
1648
1528
{
1649
-
int i = 0;
1529
+
int t = 0;
1650
1530
1651
1531
while (REG_GET(DSI_SYSSTATUS, 0, 0) == 0) {
1652
-
if (i++ > 5) {
1532
+
if (++t > 5) {
1653
1533
DSSERR("soft reset failed\n");
1654
1534
return -ENODEV;
1655
1535
}
···
2119
1999
return -EINVAL;
2120
2000
}
2121
2001
2122
-
data_id = data_type | channel << 6;
2002
+
data_id = data_type | dsi.vc[channel].dest_per << 6;
2123
2003
2124
2004
r = (data_id << 0) | (data << 8) | (ecc << 24);
2125
2005
···
2131
2011
int dsi_vc_send_null(int channel)
2132
2012
{
2133
2013
u8 nullpkg[] = {0, 0, 0, 0};
2134
-
return dsi_vc_send_long(0, DSI_DT_NULL_PACKET, nullpkg, 4, 0);
2014
+
return dsi_vc_send_long(channel, DSI_DT_NULL_PACKET, nullpkg, 4, 0);
2135
2015
}
2136
2016
EXPORT_SYMBOL(dsi_vc_send_null);
2137
2017
···
2178
2058
int r;
2179
2059
2180
2060
if (dsi.debug_read)
2181
-
DSSDBG("dsi_vc_dcs_read(ch%d, dcs_cmd %u)\n", channel, dcs_cmd);
2061
+
DSSDBG("dsi_vc_dcs_read(ch%d, dcs_cmd %x)\n", channel, dcs_cmd);
2182
2062
2183
2063
r = dsi_vc_send_short(channel, DSI_DT_DCS_READ, dcs_cmd, 0);
2184
2064
if (r)
···
2706
2586
/* using fifo not empty */
2707
2587
/* TX_FIFO_NOT_EMPTY */
2708
2588
while (FLD_GET(dsi_read_reg(DSI_VC_CTRL(0)), 5, 5)) {
2709
-
udelay(1);
2710
2589
fifo_stalls++;
2711
2590
if (fifo_stalls > 0xfffff) {
2712
2591
DSSERR("fifo stalls overflow, pixels left %d\n",
···
2713
2594
dsi_if_enable(0);
2714
2595
return -EIO;
2715
2596
}
2597
+
udelay(1);
2716
2598
}
2717
2599
#elif 1
2718
2600
/* using fifo emptiness */
···
2932
2812
2933
2813
static int dsi_set_te(struct omap_dss_device *dssdev, bool enable)
2934
2814
{
2935
-
int r;
2936
-
r = dssdev->driver->enable_te(dssdev, enable);
2937
-
/* XXX for some reason, DSI TE breaks if we don't wait here.
2938
-
* Panel bug? Needs more studying */
2939
-
msleep(100);
2815
+
int r = 0;
2816
+
2817
+
if (dssdev->driver->enable_te) {
2818
+
r = dssdev->driver->enable_te(dssdev, enable);
2819
+
/* XXX for some reason, DSI TE breaks if we don't wait here.
2820
+
* Panel bug? Needs more studying */
2821
+
msleep(100);
2822
+
}
2823
+
2940
2824
return r;
2941
2825
}
2942
2826
···
3760
3636
3761
3637
spin_lock_init(&dsi.errors_lock);
3762
3638
dsi.errors = 0;
3639
+
3640
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
3641
+
spin_lock_init(&dsi.irq_stats_lock);
3642
+
dsi.irq_stats.last_reset = jiffies;
3643
+
#endif
3763
3644
3764
3645
init_completion(&dsi.bta_completion);
3765
3646
init_completion(&dsi.update_completion);
+3
-3
drivers/video/omap2/dss/dss.c
+3
-3
drivers/video/omap2/dss/dss.c
···
467
467
468
468
static int _omap_dss_wait_reset(void)
469
469
{
470
-
unsigned timeout = 1000;
470
+
int t = 0;
471
471
472
472
while (REG_GET(DSS_SYSSTATUS, 0, 0) == 0) {
473
-
udelay(1);
474
-
if (!--timeout) {
473
+
if (++t > 1000) {
475
474
DSSERR("soft reset failed\n");
476
475
return -ENODEV;
477
476
}
477
+
udelay(1);
478
478
}
479
479
480
480
return 0;
+14
drivers/video/omap2/dss/dss.h
+14
drivers/video/omap2/dss/dss.h
···
240
240
void dsi_exit(void);
241
241
242
242
void dsi_dump_clocks(struct seq_file *s);
243
+
void dsi_dump_irqs(struct seq_file *s);
243
244
void dsi_dump_regs(struct seq_file *s);
244
245
245
246
void dsi_save_context(void);
···
269
268
int dispc_init(void);
270
269
void dispc_exit(void);
271
270
void dispc_dump_clocks(struct seq_file *s);
271
+
void dispc_dump_irqs(struct seq_file *s);
272
272
void dispc_dump_regs(struct seq_file *s);
273
273
void dispc_irq_handler(void);
274
274
void dispc_fake_vsync_irq(void);
···
368
366
void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t);
369
367
unsigned long rfbi_get_max_tx_rate(void);
370
368
int rfbi_init_display(struct omap_dss_device *display);
369
+
370
+
371
+
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
372
+
static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
373
+
{
374
+
int b;
375
+
for (b = 0; b < 32; ++b) {
376
+
if (irqstatus & (1 << b))
377
+
irq_arr[b]++;
378
+
}
379
+
}
380
+
#endif
371
381
372
382
#endif
+15
-15
drivers/video/omap2/dss/rfbi.c
+15
-15
drivers/video/omap2/dss/rfbi.c
···
120
120
121
121
struct omap_dss_device *dssdev[2];
122
122
123
-
struct kfifo *cmd_fifo;
123
+
struct kfifo cmd_fifo;
124
124
spinlock_t cmd_lock;
125
125
struct completion cmd_done;
126
126
atomic_t cmd_fifo_full;
···
1011
1011
return;
1012
1012
1013
1013
while (true) {
1014
-
spin_lock_irqsave(rfbi.cmd_fifo->lock, flags);
1014
+
spin_lock_irqsave(&rfbi.cmd_lock, flags);
1015
1015
1016
-
len = __kfifo_get(rfbi.cmd_fifo, (unsigned char *)&p,
1016
+
len = kfifo_out(&rfbi.cmd_fifo, (unsigned char *)&p,
1017
1017
sizeof(struct update_param));
1018
1018
if (len == 0) {
1019
1019
DSSDBG("nothing more in fifo\n");
1020
1020
atomic_set(&rfbi.cmd_pending, 0);
1021
-
spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1021
+
spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
1022
1022
break;
1023
1023
}
1024
1024
1025
1025
/* DSSDBG("fifo full %d\n", rfbi.cmd_fifo_full.counter);*/
1026
1026
1027
-
spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1027
+
spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
1028
1028
1029
1029
BUG_ON(len != sizeof(struct update_param));
1030
1030
BUG_ON(p.rfbi_module > 1);
···
1052
1052
unsigned long flags;
1053
1053
int available;
1054
1054
1055
-
spin_lock_irqsave(rfbi.cmd_fifo->lock, flags);
1055
+
spin_lock_irqsave(&rfbi.cmd_lock, flags);
1056
1056
available = RFBI_CMD_FIFO_LEN_BYTES -
1057
-
__kfifo_len(rfbi.cmd_fifo);
1057
+
kfifo_len(&rfbi.cmd_fifo);
1058
1058
1059
1059
/* DSSDBG("%d bytes left in fifo\n", available); */
1060
1060
if (available < sizeof(struct update_param)) {
1061
1061
DSSDBG("Going to wait because FIFO FULL..\n");
1062
-
spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1062
+
spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
1063
1063
atomic_inc(&rfbi.cmd_fifo_full);
1064
1064
wait_for_completion(&rfbi.cmd_done);
1065
1065
/*DSSDBG("Woke up because fifo not full anymore\n");*/
1066
1066
continue;
1067
1067
}
1068
1068
1069
-
ret = __kfifo_put(rfbi.cmd_fifo, (unsigned char *)p,
1069
+
ret = kfifo_in(&rfbi.cmd_fifo, (unsigned char *)p,
1070
1070
sizeof(struct update_param));
1071
1071
/* DSSDBG("pushed %d bytes\n", ret);*/
1072
1072
1073
-
spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1073
+
spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
1074
1074
1075
1075
BUG_ON(ret != sizeof(struct update_param));
1076
1076
···
1155
1155
{
1156
1156
u32 rev;
1157
1157
u32 l;
1158
+
int r;
1158
1159
1159
1160
spin_lock_init(&rfbi.cmd_lock);
1160
-
rfbi.cmd_fifo = kfifo_alloc(RFBI_CMD_FIFO_LEN_BYTES, GFP_KERNEL,
1161
-
&rfbi.cmd_lock);
1162
-
if (IS_ERR(rfbi.cmd_fifo))
1163
-
return -ENOMEM;
1161
+
r = kfifo_alloc(&rfbi.cmd_fifo, RFBI_CMD_FIFO_LEN_BYTES, GFP_KERNEL);
1162
+
if (r)
1163
+
return r;
1164
1164
1165
1165
init_completion(&rfbi.cmd_done);
1166
1166
atomic_set(&rfbi.cmd_fifo_full, 0);
···
1196
1196
{
1197
1197
DSSDBG("rfbi_exit\n");
1198
1198
1199
-
kfifo_free(rfbi.cmd_fifo);
1199
+
kfifo_free(&rfbi.cmd_fifo);
1200
1200
1201
1201
iounmap(rfbi.base);
1202
1202
}
+6
drivers/video/omap2/omapfb/omapfb-main.c
+6
drivers/video/omap2/omapfb/omapfb-main.c
···
1311
1311
if (rg->vrfb.vaddr[0]) {
1312
1312
iounmap(rg->vrfb.vaddr[0]);
1313
1313
omap_vrfb_release_ctx(&rg->vrfb);
1314
+
rg->vrfb.vaddr[0] = NULL;
1314
1315
}
1315
1316
}
1316
1317
···
2115
2114
dssdev = NULL;
2116
2115
for_each_dss_dev(dssdev) {
2117
2116
omap_dss_get_device(dssdev);
2117
+
if (!dssdev->driver) {
2118
+
dev_err(&pdev->dev, "no driver for display\n");
2119
+
r = -EINVAL;
2120
+
goto cleanup;
2121
+
}
2118
2122
fbdev->displays[fbdev->num_displays++] = dssdev;
2119
2123
}
2120
2124