Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: dts: rockchip: Add Radxa CM3J
The Radxa CM3J is a feature rich industrial compute module based on
the Rockchip RK3568J SoC. [1]
Specification:
- Quad-core Cortex-A55 CPU
- Mali-G52 2EE GPU
- 1TOPS NPU
- Up to 8GB LPDDR4x RAM
- Up to 32GB eMMC (optional)
- 16MB SPI flash (optional)
- Wi-Fi 5 / BT 5.0 with external antenna connector
- Gigabit Ethernet PHY
- RK809 PMIC
- Green (power) LED
[1] https://dl.radxa.com/cm3j/docs/hw/radxa_cm3j_schematic_v1.2_20250115.pdf
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://patch.msgid.link/20260108113341.14037-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
authored by
FUKAUMI Naoki
and committed by
Heiko Stuebner
9103e21e
90d88da8
+558
+558
arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3j.dtsi
+558
arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3j.dtsi
···
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+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2025 Radxa Computer (Shenzhen) Co., Ltd.
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*/
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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#include "rk3568.dtsi"
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/ {
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aliases {
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mmc0 = &sdhci;
15
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mmc2 = &sdmmc2;
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};
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gmac1_clkin: clock-125m {
19
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "gmac1_clkin";
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#clock-cells = <0>;
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};
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+
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leds-0 {
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compatible = "gpio-leds";
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+
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led-0 {
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color = <LED_COLOR_ID_GREEN>;
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default-state = "on";
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function = LED_FUNCTION_POWER;
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gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
33
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pinctrl-names = "default";
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pinctrl-0 = <&gpio0_b4_led>;
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};
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};
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+
38
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vcc3v3_sys: regulator-3v3-0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
42
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
44
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regulator-max-microvolt = <3300000>;
45
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vin-supply = <&dc5v>;
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};
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+
48
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vcc_3v3_1: regulator-3v3-1 {
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compatible = "regulator-fixed";
50
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regulator-name = "vcc_3v3_1";
51
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regulator-always-on;
52
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc3v3_sys>;
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};
57
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58
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk809 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_reg_on_h_gpio3_d4>;
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reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
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};
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};
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68
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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+
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&cpu1 {
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cpu-supply = <&vdd_cpu>;
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};
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+
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&cpu2 {
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cpu-supply = <&vdd_cpu>;
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};
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+
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&cpu3 {
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cpu-supply = <&vdd_cpu>;
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};
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+
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&gmac1 {
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
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clock_in_out = "input";
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phy-handle = <&rgmii_phy1>;
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phy-mode = "rgmii-id";
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phy-supply = <&vcc_3v3_1>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_clkinout
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&gmac1m1_rx_bus2
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&gmac1m1_tx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_rgmii_bus>;
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};
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+
100
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&gpu {
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mali-supply = <&vdd_gpu>;
102
+
status = "okay";
103
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};
104
+
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&hdmi {
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avdd-0v9-supply = <&vdda0v9_image>;
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avdd-1v8-supply = <&vcca1v8_image>;
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};
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+
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&hdmi_in {
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hdmi_in_vp0: endpoint {
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remote-endpoint = <&vp0_out_hdmi>;
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};
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};
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+
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&hdmi_out {
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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+
122
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&i2c0 {
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status = "okay";
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+
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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#clock-cells = <1>;
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clock-output-names = "rk809-clkout1", "rk809-clkout2";
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l>;
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system-power-controller;
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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+
vcc7-supply = <&vcc3v3_sys>;
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+
vcc8-supply = <&vcc3v3_sys>;
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+
vcc9-supply = <&vcc3v3_sys>;
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wakeup-source;
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+
146
+
regulators {
147
+
vdd_logic: DCDC_REG1 {
148
+
regulator-name = "vdd_logic";
149
+
regulator-always-on;
150
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regulator-boot-on;
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+
regulator-initial-mode = <0x2>;
152
+
regulator-min-microvolt = <500000>;
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+
regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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+
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regulator-state-mem {
157
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regulator-off-in-suspend;
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};
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};
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+
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vdd_gpu: DCDC_REG2 {
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regulator-name = "vdd_gpu";
163
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regulator-initial-mode = <0x2>;
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+
regulator-min-microvolt = <500000>;
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+
regulator-max-microvolt = <1350000>;
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+
regulator-ramp-delay = <6001>;
167
+
168
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regulator-state-mem {
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regulator-off-in-suspend;
170
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};
171
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};
172
+
173
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vcc_ddr: DCDC_REG3 {
174
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regulator-name = "vcc_ddr";
175
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regulator-always-on;
176
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regulator-boot-on;
177
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regulator-initial-mode = <0x2>;
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+
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regulator-state-mem {
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regulator-on-in-suspend;
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};
182
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};
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+
184
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vdd_npu: DCDC_REG4 {
185
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regulator-name = "vdd_npu";
186
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regulator-initial-mode = <0x2>;
187
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regulator-min-microvolt = <500000>;
188
+
regulator-max-microvolt = <1350000>;
189
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regulator-ramp-delay = <6001>;
190
+
191
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regulator-state-mem {
192
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regulator-off-in-suspend;
193
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};
194
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};
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+
196
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dc1v8: vccio_flash: vcc_1v8: DCDC_REG5 {
197
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regulator-name = "vcc_1v8";
198
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regulator-always-on;
199
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regulator-boot-on;
200
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regulator-min-microvolt = <1800000>;
201
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regulator-max-microvolt = <1800000>;
202
+
203
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regulator-state-mem {
204
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regulator-off-in-suspend;
205
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};
206
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};
207
+
208
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vdda0v9_image: LDO_REG1 {
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regulator-name = "vdda0v9_image";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
212
+
213
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regulator-state-mem {
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regulator-off-in-suspend;
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};
216
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};
217
+
218
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vdda_0v9: LDO_REG2 {
219
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regulator-name = "vdda_0v9";
220
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regulator-always-on;
221
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regulator-boot-on;
222
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regulator-min-microvolt = <900000>;
223
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regulator-max-microvolt = <900000>;
224
+
225
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regulator-state-mem {
226
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regulator-off-in-suspend;
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};
228
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};
229
+
230
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vdda0v9_pmu: LDO_REG3 {
231
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regulator-name = "vdda0v9_pmu";
232
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regulator-always-on;
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regulator-boot-on;
234
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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+
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <900000>;
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};
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};
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+
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vccio_acodec: LDO_REG4 {
244
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regulator-name = "vccio_acodec";
245
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regulator-min-microvolt = <3300000>;
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+
regulator-max-microvolt = <3300000>;
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+
248
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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+
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vccio_sd: LDO_REG5 {
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regulator-name = "vccio_sd";
255
+
regulator-always-on;
256
+
regulator-boot-on;
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+
regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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+
260
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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+
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vcc3v3_pmu: LDO_REG6 {
266
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regulator-name = "vcc3v3_pmu";
267
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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+
272
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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+
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vcca_1v8: LDO_REG7 {
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regulator-name = "vcca_1v8";
280
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regulator-always-on;
281
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
283
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regulator-max-microvolt = <1800000>;
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+
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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+
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vcca1v8_pmu: LDO_REG8 {
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regulator-name = "vcca1v8_pmu";
292
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regulator-always-on;
293
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regulator-boot-on;
294
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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+
297
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regulator-state-mem {
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regulator-on-in-suspend;
299
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regulator-suspend-microvolt = <1800000>;
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};
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};
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+
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vcca1v8_image: LDO_REG9 {
304
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regulator-name = "vcca1v8_image";
305
+
regulator-min-microvolt = <1800000>;
306
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regulator-max-microvolt = <1800000>;
307
+
308
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regulator-state-mem {
309
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regulator-off-in-suspend;
310
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};
311
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};
312
+
313
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dc3v3: vcc_3v3: SWITCH_REG1 {
314
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regulator-name = "vcc_3v3";
315
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regulator-always-on;
316
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regulator-boot-on;
317
+
318
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regulator-state-mem {
319
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regulator-off-in-suspend;
320
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};
321
+
};
322
+
323
+
vcc3v3_sd: SWITCH_REG2 {
324
+
regulator-name = "vcc3v3_sd";
325
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regulator-always-on;
326
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regulator-boot-on;
327
+
328
+
regulator-state-mem {
329
+
regulator-off-in-suspend;
330
+
};
331
+
};
332
+
};
333
+
};
334
+
335
+
vdd_cpu: regulator@40 {
336
+
compatible = "silergy,syr827";
337
+
reg = <0x40>;
338
+
fcs,suspend-voltage-selector = <1>;
339
+
regulator-name = "vdd_cpu";
340
+
regulator-always-on;
341
+
regulator-boot-on;
342
+
regulator-min-microvolt = <712500>;
343
+
regulator-max-microvolt = <1390000>;
344
+
regulator-ramp-delay = <2300>;
345
+
vin-supply = <&dc5v>;
346
+
};
347
+
};
348
+
349
+
&i2c2 {
350
+
status = "okay";
351
+
352
+
eeprom@50 {
353
+
compatible = "belling,bl24c16a", "atmel,24c16";
354
+
reg = <0x50>;
355
+
pagesize = <16>;
356
+
read-only;
357
+
vcc-supply = <&gpio_vref>;
358
+
};
359
+
};
360
+
361
+
&mdio1 {
362
+
rgmii_phy1: ethernet-phy@0 {
363
+
compatible = "ethernet-phy-id001c.c916";
364
+
reg = <0x0>;
365
+
pinctrl-names = "default";
366
+
pinctrl-0 = <&gmac1_rstn_gpio3_b0>; // GPIO4_C3
367
+
reset-assert-us = <20000>;
368
+
reset-deassert-us = <100000>;
369
+
reset-gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>;
370
+
};
371
+
};
372
+
373
+
&pinctrl {
374
+
bluetooth {
375
+
bt_reg_on_h_gpio4_b2: bt-reg-on-h-gpio4-b2 {
376
+
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
377
+
};
378
+
379
+
bt_wake_host_h_gpio4_b4: bt-wake-host-h-gpio4-b4 {
380
+
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
381
+
};
382
+
383
+
host_wake_bt_h_gpio4_b5: host-wake-bt-h-gpio4-b5 {
384
+
rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
385
+
};
386
+
};
387
+
388
+
ethernet {
389
+
gmac1_rstn_gpio3_b0: gmac1-rstn-gpio3-b0 {
390
+
rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
391
+
};
392
+
};
393
+
394
+
leds {
395
+
gpio0_b4_led: gpio0-b4-led {
396
+
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
397
+
};
398
+
};
399
+
400
+
pcie {
401
+
pcie20_clkreqnm2: pcie20_clkreqnm2 {
402
+
rockchip,pins = <1 RK_PB0 4 &pcfg_pull_none>;
403
+
};
404
+
405
+
pcie_nrst: pcie-nrst {
406
+
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
407
+
};
408
+
};
409
+
410
+
pmic {
411
+
pmic_int_l: pmic-int-l {
412
+
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
413
+
};
414
+
};
415
+
416
+
wifi {
417
+
wifi_reg_on_h_gpio3_d4: wifi-reg-on-h-gpio3-d4 {
418
+
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
419
+
};
420
+
};
421
+
};
422
+
423
+
&pcie2x1 {
424
+
pinctrl-names = "default";
425
+
pinctrl-0 = <&pcie20_clkreqnm2 &pcie_nrst>;
426
+
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
427
+
supports-clkreq;
428
+
};
429
+
430
+
&pmu_io_domains {
431
+
pmuio1-supply = <&vcc3v3_pmu>;
432
+
pmuio2-supply = <&vcc_3v3>;
433
+
vccio1-supply = <&vccio_acodec>;
434
+
vccio2-supply = <&vccio_flash>;
435
+
vccio3-supply = <&vccio_sd>;
436
+
vccio4-supply = <&vcc_1v8>;
437
+
vccio5-supply = <&vcc_3v3>;
438
+
vccio6-supply = <&vcc_1v8>;
439
+
vccio7-supply = <&vcc_3v3>;
440
+
status = "okay";
441
+
};
442
+
443
+
&saradc {
444
+
vref-supply = <&vcca_1v8>;
445
+
status = "okay";
446
+
};
447
+
448
+
&sdhci {
449
+
bus-width = <8>;
450
+
cap-mmc-highspeed;
451
+
mmc-hs200-1_8v;
452
+
max-frequency = <200000000>;
453
+
no-sd;
454
+
no-sdio;
455
+
non-removable;
456
+
pinctrl-names = "default";
457
+
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
458
+
vmmc-supply = <&vcc_3v3>;
459
+
vqmmc-supply = <&vccio_flash>;
460
+
status = "okay";
461
+
};
462
+
463
+
&sdmmc2 {
464
+
#address-cells = <1>;
465
+
bus-width = <4>;
466
+
cap-sd-highspeed;
467
+
cap-sdio-irq;
468
+
disable-wp;
469
+
keep-power-in-suspend;
470
+
max-frequency = <200000000>;
471
+
mmc-pwrseq = <&sdio_pwrseq>;
472
+
no-mmc;
473
+
no-sd;
474
+
non-removable;
475
+
pinctrl-names = "default";
476
+
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_clk &sdmmc2m0_cmd>;
477
+
sd-uhs-sdr104;
478
+
#size-cells = <0>;
479
+
status = "okay";
480
+
481
+
wifi@1 {
482
+
compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";
483
+
reg = <1>;
484
+
};
485
+
};
486
+
487
+
&sfc {
488
+
#address-cells = <1>;
489
+
#size-cells = <0>;
490
+
status = "okay";
491
+
492
+
flash@0 {
493
+
compatible = "jedec,spi-nor";
494
+
reg = <0>;
495
+
spi-max-frequency = <104000000>;
496
+
spi-rx-bus-width = <4>;
497
+
spi-tx-bus-width = <1>;
498
+
vcc-supply = <&vccio_flash>;
499
+
};
500
+
};
501
+
502
+
&tsadc {
503
+
rockchip,hw-tshut-mode = <1>;
504
+
rockchip,hw-tshut-polarity = <0>;
505
+
status = "okay";
506
+
};
507
+
508
+
&uart2 {
509
+
status = "okay";
510
+
};
511
+
512
+
&uart8 {
513
+
dma-names = "tx", "rx";
514
+
pinctrl-names = "default";
515
+
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn &uart8m0_rtsn>;
516
+
uart-has-rtscts;
517
+
status = "okay";
518
+
519
+
bluetooth {
520
+
compatible = "brcm,bcm4345c5";
521
+
clocks = <&rk809 1>;
522
+
clock-names = "lpo";
523
+
device-wakeup-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
524
+
host-wakeup-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
525
+
max-speed = <1500000>;
526
+
pinctrl-names = "default";
527
+
pinctrl-0 = <&bt_reg_on_h_gpio4_b2
528
+
&bt_wake_host_h_gpio4_b4
529
+
&host_wake_bt_h_gpio4_b5>;
530
+
shutdown-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
531
+
vbat-supply = <&vcc_3v3_1>;
532
+
vddio-supply = <&vcc_1v8>;
533
+
};
534
+
};
535
+
536
+
&usb_host0_xhci {
537
+
extcon = <&usb2phy0>;
538
+
maximum-speed = "high-speed";
539
+
phys = <&usb2phy0_otg>;
540
+
phy-names = "usb2-phy";
541
+
};
542
+
543
+
&vop {
544
+
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
545
+
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
546
+
status = "okay";
547
+
};
548
+
549
+
&vop_mmu {
550
+
status = "okay";
551
+
};
552
+
553
+
&vp0 {
554
+
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
555
+
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
556
+
remote-endpoint = <&hdmi_in_vp0>;
557
+
};
558
+
};