tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/xe/ptl: Apply Wa_14023061436

Enable WMTP for the BTD kernel to address Wa14023061436 by setting the
proper TDL Chicken Bit.

v2: Apply it on engine_was[] as this register is not part of LRC(Matt)
Apply it for first_render_or_compute in case this gets extended to
compute only platforms(Matt).

Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250108141323.311601-1-nirmoy.das@intel.com
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>

Nirmoy Das 92029e0b 480fb980

+8
+3
drivers/gpu/drm/xe/regs/xe_gt_regs.h
··· 500 500 #define LSC_L1_FLUSH_CTL_3D_DATAPORT_FLUSH_EVENTS_MASK REG_GENMASK(13, 11) 501 501 #define DIS_ATOMIC_CHAINING_TYPED_WRITES REG_BIT(3) 502 502 503 + #define TDL_CHICKEN XE_REG_MCR(0xe5f4, XE_REG_OPTION_MASKED) 504 + #define QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE REG_BIT(12) 505 + 503 506 #define LSC_CHICKEN_BIT_0 XE_REG_MCR(0xe7c8) 504 507 #define DISABLE_D8_D16_COASLESCE REG_BIT(30) 505 508 #define WR_REQ_CHAINING_DIS REG_BIT(26)
+5
drivers/gpu/drm/xe/xe_wa.c
··· 613 613 XE_RTP_ACTIONS(FIELD_SET(SAMPLER_MODE, SMP_WAIT_FETCH_MERGING_COUNTER, 614 614 SMP_FORCE_128B_OVERFETCH)) 615 615 }, 616 + { XE_RTP_NAME("14023061436"), 617 + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001), 618 + FUNC(xe_rtp_match_first_render_or_compute)), 619 + XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE)) 620 + }, 616 621 617 622 {} 618 623 };