crypto: qat - remove access to parity register for QAT GEN4

The firmware already handles parity errors reported by the accelerators
by clearing them through the corresponding SSMSOFTERRORPARITY register.
To ensure consistent behavior and prevent race conditions between the
driver and firmware, remove the logic that checks the SSMSOFTERRORPARITY
registers.

Additionally, change the return type of the function
adf_handle_rf_parr_err() to void, as it consistently returns false.
Parity errors are recoverable and do not necessitate a device reset.

Fixes: 895f7d532c84 ("crypto: qat - add handling of errors from ERRSOU2 for QAT GEN4")
Signed-off-by: Bairavi Alagappan <bairavix.alagappan@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Bairavi Alagappan and committed by

Herbert Xu 1 year ago 92c6a707 f9555d18

+5 -52

1 changed file

expand all

drivers

crypto

intel

qat

qat_common

adf_gen4_ras.c

+5 -52

drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c

··· 1043 1043 return reset_required; 1044 1044 } 1045 1045 1046 - static bool adf_handle_rf_parr_err(struct adf_accel_dev *accel_dev, 1046 + static void adf_handle_rf_parr_err(struct adf_accel_dev *accel_dev, 1047 1047 void __iomem *csr, u32 iastatssm) 1048 1048 { 1049 - struct adf_dev_err_mask *err_mask = GET_ERR_MASK(accel_dev); 1050 - u32 reg; 1051 - 1052 1049 if (!(iastatssm & ADF_GEN4_IAINTSTATSSM_SSMSOFTERRORPARITY_BIT)) 1053 - return false; 1050 + return; 1054 1051 1055 - reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_SRC); 1056 - reg &= ADF_GEN4_SSMSOFTERRORPARITY_SRC_BIT; 1057 - if (reg) { 1058 - ADF_RAS_ERR_CTR_INC(accel_dev->ras_errors, ADF_RAS_UNCORR); 1059 - ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_SRC, reg); 1060 - } 1061 - 1062 - reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_ATH_CPH); 1063 - reg &= err_mask->parerr_ath_cph_mask; 1064 - if (reg) { 1065 - ADF_RAS_ERR_CTR_INC(accel_dev->ras_errors, ADF_RAS_UNCORR); 1066 - ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_ATH_CPH, reg); 1067 - } 1068 - 1069 - reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_CPR_XLT); 1070 - reg &= err_mask->parerr_cpr_xlt_mask; 1071 - if (reg) { 1072 - ADF_RAS_ERR_CTR_INC(accel_dev->ras_errors, ADF_RAS_UNCORR); 1073 - ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_CPR_XLT, reg); 1074 - } 1075 - 1076 - reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_DCPR_UCS); 1077 - reg &= err_mask->parerr_dcpr_ucs_mask; 1078 - if (reg) { 1079 - ADF_RAS_ERR_CTR_INC(accel_dev->ras_errors, ADF_RAS_UNCORR); 1080 - ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_DCPR_UCS, reg); 1081 - } 1082 - 1083 - reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_PKE); 1084 - reg &= err_mask->parerr_pke_mask; 1085 - if (reg) { 1086 - ADF_RAS_ERR_CTR_INC(accel_dev->ras_errors, ADF_RAS_UNCORR); 1087 - ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_PKE, reg); 1088 - } 1089 - 1090 - if (err_mask->parerr_wat_wcp_mask) { 1091 - reg = ADF_CSR_RD(csr, ADF_GEN4_SSMSOFTERRORPARITY_WAT_WCP); 1092 - reg &= err_mask->parerr_wat_wcp_mask; 1093 - if (reg) { 1094 - ADF_RAS_ERR_CTR_INC(accel_dev->ras_errors, ADF_RAS_UNCORR); 1095 - ADF_CSR_WR(csr, ADF_GEN4_SSMSOFTERRORPARITY_WAT_WCP, 1096 - reg); 1097 - } 1098 - } 1099 - 1052 + ADF_RAS_ERR_CTR_INC(accel_dev->ras_errors, ADF_RAS_UNCORR); 1100 1053 dev_err(&GET_DEV(accel_dev), "Slice ssm soft parity error reported"); 1101 1054 1102 - return false; 1055 + return; 1103 1056 } 1104 1057 1105 1058 static bool adf_handle_ser_err_ssmsh(struct adf_accel_dev *accel_dev, ··· 1124 1171 reset_required |= adf_handle_slice_hang_error(accel_dev, csr, iastatssm); 1125 1172 reset_required |= adf_handle_spppar_err(accel_dev, csr, iastatssm); 1126 1173 reset_required |= adf_handle_ssmcpppar_err(accel_dev, csr, iastatssm); 1127 - reset_required |= adf_handle_rf_parr_err(accel_dev, csr, iastatssm); 1128 1174 reset_required |= adf_handle_ser_err_ssmsh(accel_dev, csr, iastatssm); 1175 + adf_handle_rf_parr_err(accel_dev, csr, iastatssm); 1129 1176 1130 1177 ADF_CSR_WR(csr, ADF_GEN4_IAINTSTATSSM, iastatssm); 1131 1178

Configure Feed

Configure Feed