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dt-bindings: arm: Add device Trace Network On Chip definition

Add a new coresight-tnoc.yaml file to describe the bindings required to
define Trace Network On Chip (TNOC) in device trees. TNOC is an
integration hierarchy which is a hardware component that integrates the
functionalities of TPDA and funnels. It collects trace form subsystems
and transfers to coresight sink.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250710-trace-noc-v11-1-f849075c40b8@quicinc.com

authored by

Yuanfang Zhang and committed by
Suzuki K Poulose 931c9311 fd4ed47e

+113
+113
Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Qualcomm Trace Network On Chip - TNOC 8 + 9 + maintainers: 10 + - Yuanfang Zhang <quic_yuanfang@quicinc.com> 11 + 12 + description: > 13 + The Trace Network On Chip (TNOC) is an integration hierarchy hardware 14 + component that integrates the functionalities of TPDA and funnels. 15 + 16 + It sits in the different subsystem of SOC and aggregates the trace and 17 + transports it to Aggregation TNOC or to coresight trace sink eventually. 18 + TNOC embeds bridges for all the interfaces APB, ATB, TPDA and NTS (Narrow 19 + Time Stamp). 20 + 21 + TNOC can take inputs from different trace sources i.e. ATB, TPDM. 22 + 23 + Note this binding is specifically intended for Aggregator TNOC instances. 24 + 25 + # Need a custom select here or 'arm,primecell' will match on lots of nodes 26 + select: 27 + properties: 28 + compatible: 29 + contains: 30 + enum: 31 + - qcom,coresight-tnoc 32 + required: 33 + - compatible 34 + 35 + properties: 36 + $nodename: 37 + pattern: "^tn(@[0-9a-f]+)$" 38 + 39 + compatible: 40 + items: 41 + - const: qcom,coresight-tnoc 42 + - const: arm,primecell 43 + 44 + reg: 45 + maxItems: 1 46 + 47 + clock-names: 48 + items: 49 + - const: apb_pclk 50 + 51 + clocks: 52 + items: 53 + - description: APB register access clock 54 + 55 + in-ports: 56 + $ref: /schemas/graph.yaml#/properties/ports 57 + 58 + patternProperties: 59 + '^port(@[0-9a-f]{1,2})?$': 60 + description: Input connections from CoreSight Trace Bus 61 + $ref: /schemas/graph.yaml#/properties/port 62 + 63 + out-ports: 64 + $ref: /schemas/graph.yaml#/properties/ports 65 + additionalProperties: false 66 + 67 + properties: 68 + port: 69 + description: 70 + Output connection to CoreSight Trace Bus 71 + $ref: /schemas/graph.yaml#/properties/port 72 + 73 + required: 74 + - compatible 75 + - reg 76 + - clocks 77 + - clock-names 78 + - in-ports 79 + - out-ports 80 + 81 + additionalProperties: false 82 + 83 + examples: 84 + - | 85 + tn@109ab000 { 86 + compatible = "qcom,coresight-tnoc", "arm,primecell"; 87 + reg = <0x109ab000 0x4200>; 88 + 89 + clocks = <&aoss_qmp>; 90 + clock-names = "apb_pclk"; 91 + 92 + in-ports { 93 + #address-cells = <1>; 94 + #size-cells = <0>; 95 + 96 + port@0 { 97 + reg = <0>; 98 + 99 + tn_ag_in_tpdm_gcc: endpoint { 100 + remote-endpoint = <&tpdm_gcc_out_tn_ag>; 101 + }; 102 + }; 103 + }; 104 + 105 + out-ports { 106 + port { 107 + tn_ag_out_funnel_in1: endpoint { 108 + remote-endpoint = <&funnel_in1_in_tn_ag>; 109 + }; 110 + }; 111 + }; 112 + }; 113 + ...