Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: rt712-sdca: add the function for version B
The version B will support the multi-lane function and integrate the DMIC function
in one SoundWire interface.
Due to some registers having different default values between version A and B,
this patch also removes the redundant default registers to avoid confusion.
Signed-off-by: Shuming Fan <shumingf@realtek.com>
Link: https://patch.msgid.link/20240620103237.2124196-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Shuming Fan
and committed by
Mark Brown
936abb09
f2177731
+660
-100
+22
-2
sound/soc/codecs/rt712-sdca-sdw.c
+22
-2
sound/soc/codecs/rt712-sdca-sdw.c
···
34
34
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_GE49, RT712_SDCA_CTL_DETECTED_MODE, 0):
35
35
case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ...
36
36
SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
37
+
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
38
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
39
+
case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
40
+
case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
37
41
case RT712_BUF_ADDR_HID1 ... RT712_BUF_ADDR_HID2:
38
42
return true;
39
43
default:
···
60
56
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_GE49, RT712_SDCA_CTL_DETECTED_MODE, 0):
61
57
case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_CURRENT_OWNER, 0) ...
62
58
SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01, RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH, 0):
59
+
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
60
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
61
+
case SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
62
+
case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0):
63
63
case RT712_BUF_ADDR_HID1 ... RT712_BUF_ADDR_HID2:
64
64
return true;
65
65
default:
···
86
78
case 0x5c00000 ... 0x5c0009a:
87
79
case 0x5d00000 ... 0x5d00009:
88
80
case 0x5f00000 ... 0x5f00030:
89
-
case 0x6100000 ... 0x6100068:
81
+
case 0x6100000 ... 0x61000f1:
90
82
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_VOLUME, CH_01):
91
83
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_VOLUME, CH_02):
92
84
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_VOLUME, CH_01):
93
85
case SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_VOLUME, CH_02):
94
86
case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_01):
95
87
case SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_02):
88
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01):
89
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02):
90
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03):
91
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04):
92
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01):
93
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02):
94
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03):
95
+
case SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04):
96
96
return true;
97
97
default:
98
98
return false;
···
112
96
switch (reg) {
113
97
case 0x2000000:
114
98
case 0x200001a:
99
+
case 0x2000020:
115
100
case 0x2000024:
101
+
case 0x2000030:
116
102
case 0x2000046:
117
103
case 0x200008a:
118
104
case 0x5800000:
···
196
178
unsigned long addr;
197
179
struct sdw_dpn_prop *dpn;
198
180
181
+
sdw_slave_read_prop(slave);
182
+
199
183
prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
200
184
prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
201
185
202
186
prop->paging_support = true;
203
187
204
188
/* first we need to allocate memory for set bits in port lists */
205
-
prop->source_ports = BIT(4); /* BITMAP: 00010000 */
189
+
prop->source_ports = BIT(8) | BIT(4); /* BITMAP: 100010000 */
206
190
prop->sink_ports = BIT(3) | BIT(1); /* BITMAP: 00001010 */
207
191
208
192
nval = hweight32(prop->source_ports);
+18
-51
sound/soc/codecs/rt712-sdca-sdw.h
+18
-51
sound/soc/codecs/rt712-sdca-sdw.h
···
12
12
#include <linux/soundwire/sdw_registers.h>
13
13
14
14
static const struct reg_default rt712_sdca_reg_defaults[] = {
15
-
{ 0x201a, 0x00 },
16
-
{ 0x201b, 0x00 },
17
-
{ 0x201c, 0x00 },
18
-
{ 0x201d, 0x00 },
19
-
{ 0x201e, 0x00 },
20
-
{ 0x201f, 0x00 },
21
-
{ 0x2029, 0x00 },
22
-
{ 0x202a, 0x00 },
23
-
{ 0x202d, 0x00 },
24
-
{ 0x202e, 0x00 },
25
-
{ 0x202f, 0x00 },
26
-
{ 0x2030, 0x00 },
27
-
{ 0x2031, 0x00 },
28
-
{ 0x2032, 0x00 },
29
-
{ 0x2033, 0x00 },
30
-
{ 0x2034, 0x00 },
31
-
{ 0x2230, 0x00 },
32
-
{ 0x2231, 0x2f },
33
-
{ 0x2232, 0x80 },
34
-
{ 0x2f01, 0x00 },
35
-
{ 0x2f02, 0x09 },
36
-
{ 0x2f03, 0x00 },
37
-
{ 0x2f04, 0x00 },
38
-
{ 0x2f05, 0x0b },
39
-
{ 0x2f06, 0x01 },
40
-
{ 0x2f08, 0x00 },
41
-
{ 0x2f09, 0x00 },
42
-
{ 0x2f0a, 0x01 },
43
-
{ 0x2f35, 0x01 },
44
-
{ 0x2f36, 0xcf },
45
-
{ 0x2f50, 0x0f },
46
-
{ 0x2f54, 0x01 },
47
-
{ 0x2f58, 0x07 },
48
-
{ 0x2f59, 0x09 },
49
-
{ 0x2f5a, 0x01 },
50
-
{ 0x2f5b, 0x07 },
51
-
{ 0x2f5c, 0x05 },
52
-
{ 0x2f5d, 0x05 },
53
-
{ 0x3201, 0x01 },
54
-
{ 0x320c, 0x00 },
55
-
{ 0x3301, 0x01 },
56
-
{ 0x3302, 0x00 },
57
-
{ 0x3303, 0x1f },
15
+
58
16
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_CS01, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
59
17
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_CS11, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
60
18
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU05, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
···
21
63
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
22
64
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PDE40, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
23
65
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PDE12, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
24
-
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_CS31, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
25
-
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_PDE23, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
66
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
67
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
68
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
69
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_03), 0x01 },
70
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_04), 0x01 },
71
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
26
72
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
27
73
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
74
+
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_PDE23, RT712_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
75
+
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_CS31, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
28
76
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_OT23, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x00 },
29
77
};
30
78
31
79
static const struct reg_default rt712_sdca_mbq_defaults[] = {
32
80
{ 0x2000004, 0xaa01 },
33
81
{ 0x200000e, 0x21e0 },
34
-
{ 0x2000024, 0x01ba },
35
82
{ 0x200004a, 0x8830 },
36
83
{ 0x2000067, 0xf100 },
37
84
{ 0x5800000, 0x1893 },
···
44
81
{ 0x5b00005, 0x0000 },
45
82
{ 0x5b00029, 0x3fff },
46
83
{ 0x5b0002a, 0xf000 },
47
-
{ 0x5f00008, 0x7000 },
84
+
{ 0x6100000, 0x04e4 },
48
85
{ 0x610000e, 0x0007 },
49
-
{ 0x6100022, 0x2828 },
50
-
{ 0x6100023, 0x2929 },
51
-
{ 0x6100026, 0x2c29 },
52
-
{ 0x610002c, 0x4150 },
53
86
{ 0x6100045, 0x0860 },
54
87
{ 0x6100046, 0x0029 },
55
88
{ 0x6100053, 0x3fff },
···
60
101
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_USER_FU0F, RT712_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
61
102
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PLATFORM_FU44, RT712_SDCA_CTL_FU_CH_GAIN, CH_01), 0x0000 },
62
103
{ SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_PLATFORM_FU44, RT712_SDCA_CTL_FU_CH_GAIN, CH_02), 0x0000 },
104
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01), 0x0000 },
105
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_02), 0x0000 },
106
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_03), 0x0000 },
107
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_04), 0x0000 },
108
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01), 0x0000 },
109
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
110
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_03), 0x0000 },
111
+
{ SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_04), 0x0000 },
63
112
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_01), 0x0000 },
64
113
{ SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
65
114
};
+580
-47
sound/soc/codecs/rt712-sdca.c
+580
-47
sound/soc/codecs/rt712-sdca.c
···
82
82
dev = regmap_get_device(regmap);
83
83
84
84
/* Set HP-JD source from JD1 */
85
-
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_CC_DET1, 0x043a);
85
+
if (rt712->version_id == RT712_VA)
86
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_CC_DET1, 0x043a);
86
87
87
88
/* FSM switch to calibration manual mode */
88
89
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_FSM_CTL, 0x4100);
···
199
198
200
199
_end_btn_det_:
201
200
/* Host is owner, so set back to device */
202
-
if (owner == 0)
201
+
if (owner == 0) {
203
202
/* set owner to device */
204
-
regmap_write(rt712->regmap,
205
-
SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01,
206
-
RT712_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE, 0), 0x01);
203
+
if (rt712->version_id == RT712_VA)
204
+
regmap_write(rt712->regmap,
205
+
SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01,
206
+
RT712_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE, 0), 0x01);
207
+
else
208
+
regmap_write(rt712->regmap,
209
+
SDW_SDCA_CTL(FUNC_NUM_HID, RT712_SDCA_ENT_HID01,
210
+
RT712_SDCA_CTL_HIDTX_CURRENT_OWNER, 0), 0x01);
211
+
}
207
212
208
213
return btn_type;
209
214
}
···
422
415
423
416
switch (rt712->jd_src) {
424
417
case RT712_JD1:
425
-
/* Set HP-JD source from JD1 */
426
-
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_CC_DET1, 0x043a);
418
+
/* Set HP-JD source from JD1, VB uses JD1 in default */
419
+
if (rt712->version_id == RT712_VA)
420
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_CC_DET1, 0x043a);
427
421
break;
428
422
default:
429
423
dev_warn(rt712->component->dev, "Wrong JD source\n");
···
862
854
return 0;
863
855
}
864
856
865
-
static int rt712_sdca_classd_event(struct snd_soc_dapm_widget *w,
857
+
static int rt712_sdca_pde23_event(struct snd_soc_dapm_widget *w,
866
858
struct snd_kcontrol *kcontrol, int event)
867
859
{
868
860
struct snd_soc_component *component =
···
891
883
return 0;
892
884
}
893
885
894
-
static const struct snd_kcontrol_new rt712_spk_sto_dac =
895
-
SOC_DAPM_DOUBLE_R("Switch",
886
+
static const struct snd_kcontrol_new rt712_spk_l_dac =
887
+
SOC_DAPM_SINGLE_AUTODISABLE("Switch",
896
888
SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_MUTE, CH_01),
889
+
0, 1, 1);
890
+
static const struct snd_kcontrol_new rt712_spk_r_dac =
891
+
SOC_DAPM_SINGLE_AUTODISABLE("Switch",
897
892
SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_USER_FU06, RT712_SDCA_CTL_FU_MUTE, CH_02),
898
893
0, 1, 1);
899
894
···
942
931
SND_SOC_DAPM_AIF_IN("DP3RX", "DP3 Playback", 0, SND_SOC_NOPM, 0, 0),
943
932
944
933
/* Digital Interface */
945
-
SND_SOC_DAPM_SWITCH("FU06", SND_SOC_NOPM, 0, 0, &rt712_spk_sto_dac),
934
+
SND_SOC_DAPM_PGA("FU06", SND_SOC_NOPM, 0, 0, NULL, 0),
935
+
936
+
SND_SOC_DAPM_SUPPLY("PDE 23", SND_SOC_NOPM, 0, 0,
937
+
rt712_sdca_pde23_event,
938
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
946
939
947
940
/* Output */
948
-
SND_SOC_DAPM_PGA_E("CLASS D", SND_SOC_NOPM, 0, 0, NULL, 0,
949
-
rt712_sdca_classd_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
941
+
SND_SOC_DAPM_SWITCH("OT23 L", SND_SOC_NOPM, 0, 0, &rt712_spk_l_dac),
942
+
SND_SOC_DAPM_SWITCH("OT23 R", SND_SOC_NOPM, 0, 0, &rt712_spk_r_dac),
950
943
SND_SOC_DAPM_OUTPUT("SPOL"),
951
944
SND_SOC_DAPM_OUTPUT("SPOR"),
952
945
};
953
946
954
947
static const struct snd_soc_dapm_route rt712_sdca_spk_dapm_routes[] = {
955
-
{ "FU06", "Switch", "DP3RX" },
956
-
{ "CLASS D", NULL, "FU06" },
957
-
{ "SPOL", NULL, "CLASS D" },
958
-
{ "SPOR", NULL, "CLASS D" },
948
+
{ "FU06", NULL, "DP3RX" },
949
+
{ "FU06", NULL, "PDE 23" },
950
+
{ "OT23 L", "Switch", "FU06" },
951
+
{ "OT23 R", "Switch", "FU06" },
952
+
{ "SPOL", NULL, "OT23 L" },
953
+
{ "SPOR", NULL, "OT23 R" },
959
954
};
960
955
961
956
static int rt712_sdca_parse_dt(struct rt712_sdca_priv *rt712, struct device *dev)
···
1000
983
return 0;
1001
984
}
1002
985
986
+
static int rt712_sdca_dmic_set_gain_get(struct snd_kcontrol *kcontrol,
987
+
struct snd_ctl_elem_value *ucontrol)
988
+
{
989
+
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
990
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
991
+
struct rt712_dmic_kctrl_priv *p =
992
+
(struct rt712_dmic_kctrl_priv *)kcontrol->private_value;
993
+
unsigned int regvalue, ctl, i;
994
+
unsigned int adc_vol_flag = 0;
995
+
const unsigned int interval_offset = 0xc0;
996
+
997
+
if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
998
+
adc_vol_flag = 1;
999
+
1000
+
/* check all channels */
1001
+
for (i = 0; i < p->count; i++) {
1002
+
regmap_read(rt712->mbq_regmap, p->reg_base + i, ®value);
1003
+
1004
+
if (!adc_vol_flag) /* boost gain */
1005
+
ctl = regvalue / 0x0a00;
1006
+
else { /* ADC gain */
1007
+
if (adc_vol_flag)
1008
+
ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset);
1009
+
else
1010
+
ctl = p->max - (((0 - regvalue) & 0xffff) / interval_offset);
1011
+
}
1012
+
1013
+
ucontrol->value.integer.value[i] = ctl;
1014
+
}
1015
+
1016
+
return 0;
1017
+
}
1018
+
1019
+
static int rt712_sdca_dmic_set_gain_put(struct snd_kcontrol *kcontrol,
1020
+
struct snd_ctl_elem_value *ucontrol)
1021
+
{
1022
+
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
1023
+
struct rt712_dmic_kctrl_priv *p =
1024
+
(struct rt712_dmic_kctrl_priv *)kcontrol->private_value;
1025
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
1026
+
unsigned int gain_val[4];
1027
+
unsigned int i, adc_vol_flag = 0, changed = 0;
1028
+
unsigned int regvalue[4];
1029
+
const unsigned int interval_offset = 0xc0;
1030
+
int err;
1031
+
1032
+
if (strstr(ucontrol->id.name, "FU1E Capture Volume"))
1033
+
adc_vol_flag = 1;
1034
+
1035
+
/* check all channels */
1036
+
for (i = 0; i < p->count; i++) {
1037
+
regmap_read(rt712->mbq_regmap, p->reg_base + i, ®value[i]);
1038
+
1039
+
gain_val[i] = ucontrol->value.integer.value[i];
1040
+
if (gain_val[i] > p->max)
1041
+
gain_val[i] = p->max;
1042
+
1043
+
if (!adc_vol_flag) /* boost gain */
1044
+
gain_val[i] = gain_val[i] * 0x0a00;
1045
+
else { /* ADC gain */
1046
+
gain_val[i] = 0x1e00 - ((p->max - gain_val[i]) * interval_offset);
1047
+
gain_val[i] &= 0xffff;
1048
+
}
1049
+
1050
+
if (regvalue[i] != gain_val[i])
1051
+
changed = 1;
1052
+
}
1053
+
1054
+
if (!changed)
1055
+
return 0;
1056
+
1057
+
for (i = 0; i < p->count; i++) {
1058
+
err = regmap_write(rt712->mbq_regmap, p->reg_base + i, gain_val[i]);
1059
+
if (err < 0)
1060
+
dev_err(&rt712->slave->dev, "0x%08x can't be set\n", p->reg_base + i);
1061
+
}
1062
+
1063
+
return changed;
1064
+
}
1065
+
1066
+
static int rt712_sdca_set_fu1e_capture_ctl(struct rt712_sdca_priv *rt712)
1067
+
{
1068
+
int err, i;
1069
+
unsigned int ch_mute;
1070
+
1071
+
for (i = 0; i < ARRAY_SIZE(rt712->fu1e_mixer_mute); i++) {
1072
+
ch_mute = (rt712->fu1e_dapm_mute || rt712->fu1e_mixer_mute[i]) ? 0x01 : 0x00;
1073
+
err = regmap_write(rt712->regmap,
1074
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E,
1075
+
RT712_SDCA_CTL_FU_MUTE, CH_01) + i, ch_mute);
1076
+
if (err < 0)
1077
+
return err;
1078
+
}
1079
+
1080
+
return 0;
1081
+
}
1082
+
1083
+
static int rt712_sdca_dmic_fu1e_capture_get(struct snd_kcontrol *kcontrol,
1084
+
struct snd_ctl_elem_value *ucontrol)
1085
+
{
1086
+
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
1087
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
1088
+
struct rt712_dmic_kctrl_priv *p =
1089
+
(struct rt712_dmic_kctrl_priv *)kcontrol->private_value;
1090
+
unsigned int i;
1091
+
1092
+
for (i = 0; i < p->count; i++)
1093
+
ucontrol->value.integer.value[i] = !rt712->fu1e_mixer_mute[i];
1094
+
1095
+
return 0;
1096
+
}
1097
+
1098
+
static int rt712_sdca_dmic_fu1e_capture_put(struct snd_kcontrol *kcontrol,
1099
+
struct snd_ctl_elem_value *ucontrol)
1100
+
{
1101
+
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
1102
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
1103
+
struct rt712_dmic_kctrl_priv *p =
1104
+
(struct rt712_dmic_kctrl_priv *)kcontrol->private_value;
1105
+
int err, changed = 0, i;
1106
+
1107
+
for (i = 0; i < p->count; i++) {
1108
+
if (rt712->fu1e_mixer_mute[i] != !ucontrol->value.integer.value[i])
1109
+
changed = 1;
1110
+
rt712->fu1e_mixer_mute[i] = !ucontrol->value.integer.value[i];
1111
+
}
1112
+
1113
+
err = rt712_sdca_set_fu1e_capture_ctl(rt712);
1114
+
if (err < 0)
1115
+
return err;
1116
+
1117
+
return changed;
1118
+
}
1119
+
1120
+
static int rt712_sdca_fu_info(struct snd_kcontrol *kcontrol,
1121
+
struct snd_ctl_elem_info *uinfo)
1122
+
{
1123
+
struct rt712_dmic_kctrl_priv *p =
1124
+
(struct rt712_dmic_kctrl_priv *)kcontrol->private_value;
1125
+
1126
+
if (p->max == 1)
1127
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1128
+
else
1129
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1130
+
uinfo->count = p->count;
1131
+
uinfo->value.integer.min = 0;
1132
+
uinfo->value.integer.max = p->max;
1133
+
return 0;
1134
+
}
1135
+
1136
+
#define RT712_SDCA_PR_VALUE(xreg_base, xcount, xmax, xinvert) \
1137
+
((unsigned long)&(struct rt712_dmic_kctrl_priv) \
1138
+
{.reg_base = xreg_base, .count = xcount, .max = xmax, \
1139
+
.invert = xinvert})
1140
+
1141
+
#define RT712_SDCA_FU_CTRL(xname, reg_base, xmax, xinvert, xcount) \
1142
+
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
1143
+
.info = rt712_sdca_fu_info, \
1144
+
.get = rt712_sdca_dmic_fu1e_capture_get, \
1145
+
.put = rt712_sdca_dmic_fu1e_capture_put, \
1146
+
.private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, xinvert)}
1147
+
1148
+
#define RT712_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
1149
+
xhandler_put, xcount, xmax, tlv_array) \
1150
+
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
1151
+
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
1152
+
SNDRV_CTL_ELEM_ACCESS_READWRITE, \
1153
+
.tlv.p = (tlv_array), \
1154
+
.info = rt712_sdca_fu_info, \
1155
+
.get = xhandler_get, .put = xhandler_put, \
1156
+
.private_value = RT712_SDCA_PR_VALUE(reg_base, xcount, xmax, 0) }
1157
+
1158
+
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
1159
+
static const DECLARE_TLV_DB_SCALE(dmic_vol_tlv, 0, 1000, 0);
1160
+
1161
+
static const struct snd_kcontrol_new rt712_sdca_dmic_snd_controls[] = {
1162
+
RT712_SDCA_FU_CTRL("FU1E Capture Switch",
1163
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_MUTE, CH_01),
1164
+
1, 1, 4),
1165
+
RT712_SDCA_EXT_TLV("FU1E Capture Volume",
1166
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_USER_FU1E, RT712_SDCA_CTL_FU_VOLUME, CH_01),
1167
+
rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 0x3f, in_vol_tlv),
1168
+
RT712_SDCA_EXT_TLV("FU15 Boost Volume",
1169
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PLATFORM_FU15, RT712_SDCA_CTL_FU_CH_GAIN, CH_01),
1170
+
rt712_sdca_dmic_set_gain_get, rt712_sdca_dmic_set_gain_put, 4, 3, dmic_vol_tlv),
1171
+
};
1172
+
1173
+
static int rt712_sdca_dmic_mux_get(struct snd_kcontrol *kcontrol,
1174
+
struct snd_ctl_elem_value *ucontrol)
1175
+
{
1176
+
struct snd_soc_component *component =
1177
+
snd_soc_dapm_kcontrol_component(kcontrol);
1178
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
1179
+
unsigned int val = 0, mask_sft;
1180
+
1181
+
if (strstr(ucontrol->id.name, "ADC 0A Mux"))
1182
+
mask_sft = 0;
1183
+
else if (strstr(ucontrol->id.name, "ADC 0B Mux"))
1184
+
mask_sft = 4;
1185
+
else
1186
+
return -EINVAL;
1187
+
1188
+
rt712_sdca_index_read(rt712, RT712_VENDOR_HDA_CTL,
1189
+
RT712_HDA_LEGACY_MUX_CTL0, &val);
1190
+
1191
+
ucontrol->value.enumerated.item[0] = (((val >> mask_sft) & 0xf) == 0x4) ? 0 : 1;
1192
+
1193
+
return 0;
1194
+
}
1195
+
1196
+
static int rt712_sdca_dmic_mux_put(struct snd_kcontrol *kcontrol,
1197
+
struct snd_ctl_elem_value *ucontrol)
1198
+
{
1199
+
struct snd_soc_component *component =
1200
+
snd_soc_dapm_kcontrol_component(kcontrol);
1201
+
struct snd_soc_dapm_context *dapm =
1202
+
snd_soc_dapm_kcontrol_dapm(kcontrol);
1203
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
1204
+
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1205
+
unsigned int *item = ucontrol->value.enumerated.item;
1206
+
unsigned int val, val2 = 0, change, mask_sft;
1207
+
1208
+
if (item[0] >= e->items)
1209
+
return -EINVAL;
1210
+
1211
+
if (strstr(ucontrol->id.name, "ADC 0A Mux"))
1212
+
mask_sft = 0;
1213
+
else if (strstr(ucontrol->id.name, "ADC 0B Mux"))
1214
+
mask_sft = 4;
1215
+
else
1216
+
return -EINVAL;
1217
+
1218
+
val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
1219
+
1220
+
rt712_sdca_index_read(rt712, RT712_VENDOR_HDA_CTL,
1221
+
RT712_HDA_LEGACY_MUX_CTL0, &val2);
1222
+
val2 = ((0xf << mask_sft) & val2) >> mask_sft;
1223
+
1224
+
if (val == 0)
1225
+
val = 0x4;
1226
+
else if (val >= 1)
1227
+
val = 0xe;
1228
+
1229
+
if (val == val2)
1230
+
change = 0;
1231
+
else
1232
+
change = 1;
1233
+
1234
+
if (change)
1235
+
rt712_sdca_index_update_bits(rt712, RT712_VENDOR_HDA_CTL,
1236
+
RT712_HDA_LEGACY_MUX_CTL0, 0xf << mask_sft,
1237
+
val << mask_sft);
1238
+
1239
+
snd_soc_dapm_mux_update_power(dapm, kcontrol, item[0], e, NULL);
1240
+
1241
+
return change;
1242
+
}
1243
+
1244
+
static const char * const adc_dmic_mux_text[] = {
1245
+
"DMIC1",
1246
+
"DMIC2",
1247
+
};
1248
+
1249
+
static SOC_ENUM_SINGLE_DECL(
1250
+
rt712_adc0a_enum, SND_SOC_NOPM, 0, adc_dmic_mux_text);
1251
+
1252
+
static SOC_ENUM_SINGLE_DECL(
1253
+
rt712_adc0b_enum, SND_SOC_NOPM, 0, adc_dmic_mux_text);
1254
+
1255
+
static const struct snd_kcontrol_new rt712_sdca_dmic_adc0a_mux =
1256
+
SOC_DAPM_ENUM_EXT("ADC 0A Mux", rt712_adc0a_enum,
1257
+
rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
1258
+
1259
+
static const struct snd_kcontrol_new rt712_sdca_dmic_adc0b_mux =
1260
+
SOC_DAPM_ENUM_EXT("ADC 0B Mux", rt712_adc0b_enum,
1261
+
rt712_sdca_dmic_mux_get, rt712_sdca_dmic_mux_put);
1262
+
1263
+
static int rt712_sdca_dmic_fu1e_event(struct snd_soc_dapm_widget *w,
1264
+
struct snd_kcontrol *kcontrol, int event)
1265
+
{
1266
+
struct snd_soc_component *component =
1267
+
snd_soc_dapm_to_component(w->dapm);
1268
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
1269
+
1270
+
switch (event) {
1271
+
case SND_SOC_DAPM_POST_PMU:
1272
+
rt712->fu1e_dapm_mute = false;
1273
+
rt712_sdca_set_fu1e_capture_ctl(rt712);
1274
+
break;
1275
+
case SND_SOC_DAPM_PRE_PMD:
1276
+
rt712->fu1e_dapm_mute = true;
1277
+
rt712_sdca_set_fu1e_capture_ctl(rt712);
1278
+
break;
1279
+
}
1280
+
return 0;
1281
+
}
1282
+
1283
+
static int rt712_sdca_dmic_pde11_event(struct snd_soc_dapm_widget *w,
1284
+
struct snd_kcontrol *kcontrol, int event)
1285
+
{
1286
+
struct snd_soc_component *component =
1287
+
snd_soc_dapm_to_component(w->dapm);
1288
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
1289
+
unsigned char ps0 = 0x0, ps3 = 0x3;
1290
+
1291
+
switch (event) {
1292
+
case SND_SOC_DAPM_POST_PMU:
1293
+
regmap_write(rt712->regmap,
1294
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
1295
+
RT712_SDCA_CTL_REQ_POWER_STATE, 0),
1296
+
ps0);
1297
+
break;
1298
+
case SND_SOC_DAPM_PRE_PMD:
1299
+
regmap_write(rt712->regmap,
1300
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_PDE11,
1301
+
RT712_SDCA_CTL_REQ_POWER_STATE, 0),
1302
+
ps3);
1303
+
break;
1304
+
}
1305
+
return 0;
1306
+
}
1307
+
1308
+
static const struct snd_soc_dapm_widget rt712_sdca_dmic_dapm_widgets[] = {
1309
+
SND_SOC_DAPM_INPUT("DMIC1"),
1310
+
SND_SOC_DAPM_INPUT("DMIC2"),
1311
+
1312
+
SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
1313
+
rt712_sdca_dmic_pde11_event,
1314
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1315
+
1316
+
SND_SOC_DAPM_ADC_E("FU 1E", NULL, SND_SOC_NOPM, 0, 0,
1317
+
rt712_sdca_dmic_fu1e_event,
1318
+
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
1319
+
SND_SOC_DAPM_MUX("ADC 0A Mux", SND_SOC_NOPM, 0, 0,
1320
+
&rt712_sdca_dmic_adc0a_mux),
1321
+
SND_SOC_DAPM_MUX("ADC 0B Mux", SND_SOC_NOPM, 0, 0,
1322
+
&rt712_sdca_dmic_adc0b_mux),
1323
+
1324
+
SND_SOC_DAPM_AIF_OUT("DP8TX", "DP8 Capture", 0, SND_SOC_NOPM, 0, 0),
1325
+
};
1326
+
1327
+
static const struct snd_soc_dapm_route rt712_sdca_dmic_audio_map[] = {
1328
+
{"DP8TX", NULL, "FU 1E"},
1329
+
1330
+
{"FU 1E", NULL, "PDE 11"},
1331
+
{"FU 1E", NULL, "ADC 0A Mux"},
1332
+
{"FU 1E", NULL, "ADC 0B Mux"},
1333
+
{"ADC 0A Mux", "DMIC1", "DMIC1"},
1334
+
{"ADC 0A Mux", "DMIC2", "DMIC2"},
1335
+
{"ADC 0B Mux", "DMIC1", "DMIC1"},
1336
+
{"ADC 0B Mux", "DMIC2", "DMIC2"},
1337
+
};
1338
+
1339
+
static int rt712_sdca_dmic_probe(struct snd_soc_component *component)
1340
+
{
1341
+
struct rt712_sdca_priv *rt712 = snd_soc_component_get_drvdata(component);
1342
+
int ret;
1343
+
1344
+
rt712->dmic_component = component;
1345
+
1346
+
if (!rt712->first_hw_init)
1347
+
return 0;
1348
+
1349
+
ret = pm_runtime_resume(component->dev);
1350
+
if (ret < 0 && ret != -EACCES)
1351
+
return ret;
1352
+
1353
+
return 0;
1354
+
}
1355
+
1003
1356
static const struct snd_soc_component_driver soc_sdca_dev_rt712 = {
1004
1357
.probe = rt712_sdca_probe,
1005
1358
.controls = rt712_sdca_controls,
···
1380
993
.num_dapm_routes = ARRAY_SIZE(rt712_sdca_audio_map),
1381
994
.set_jack = rt712_sdca_set_jack_detect,
1382
995
.endianness = 1,
996
+
};
997
+
998
+
static const struct snd_soc_component_driver soc_sdca_dev_rt712_dmic = {
999
+
.probe = rt712_sdca_dmic_probe,
1000
+
.controls = rt712_sdca_dmic_snd_controls,
1001
+
.num_controls = ARRAY_SIZE(rt712_sdca_dmic_snd_controls),
1002
+
.dapm_widgets = rt712_sdca_dmic_dapm_widgets,
1003
+
.num_dapm_widgets = ARRAY_SIZE(rt712_sdca_dmic_dapm_widgets),
1004
+
.dapm_routes = rt712_sdca_dmic_audio_map,
1005
+
.num_dapm_routes = ARRAY_SIZE(rt712_sdca_dmic_audio_map),
1006
+
.endianness = 1,
1007
+
#ifdef CONFIG_DEBUG_FS
1008
+
.debugfs_prefix = "dmic",
1009
+
#endif
1383
1010
};
1384
1011
1385
1012
static int rt712_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
···
1423
1022
int retval, port, num_channels;
1424
1023
unsigned int sampling_rate;
1425
1024
1426
-
dev_dbg(dai->dev, "%s %s", __func__, dai->name);
1025
+
dev_dbg(dai->dev, "%s %s id %d", __func__, dai->name, dai->id);
1427
1026
sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
1428
1027
1429
1028
if (!sdw_stream)
1430
1029
return -EINVAL;
1431
1030
1432
1031
if (!rt712->slave)
1032
+
return -EINVAL;
1033
+
1034
+
/* VA doesn't support AIF3 */
1035
+
if (dai->id == RT712_AIF3 && rt712->version_id == RT712_VA)
1433
1036
return -EINVAL;
1434
1037
1435
1038
/* SoundWire specific configuration */
···
1449
1044
direction = SDW_DATA_DIR_TX;
1450
1045
if (dai->id == RT712_AIF1)
1451
1046
port = 4;
1047
+
else if (dai->id == RT712_AIF3)
1048
+
port = 8;
1452
1049
else
1453
1050
return -EINVAL;
1454
1051
}
···
1510
1103
case RT712_AIF2:
1511
1104
regmap_write(rt712->regmap,
1512
1105
SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_CS31, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
1106
+
sampling_rate);
1107
+
break;
1108
+
case RT712_AIF3:
1109
+
regmap_write(rt712->regmap,
1110
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1F, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
1111
+
sampling_rate);
1112
+
regmap_write(rt712->regmap,
1113
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_CS1C, RT712_SDCA_CTL_SAMPLE_FREQ_INDEX, 0),
1513
1114
sampling_rate);
1514
1115
break;
1515
1116
default:
···
1589
1174
}
1590
1175
};
1591
1176
1177
+
static struct snd_soc_dai_driver rt712_sdca_dmic_dai[] = {
1178
+
{
1179
+
.name = "rt712-sdca-aif3",
1180
+
.id = RT712_AIF3,
1181
+
.capture = {
1182
+
.stream_name = "DP8 Capture",
1183
+
.channels_min = 1,
1184
+
.channels_max = 4,
1185
+
.rates = RT712_STEREO_RATES,
1186
+
.formats = RT712_FORMATS,
1187
+
},
1188
+
.ops = &rt712_sdca_ops,
1189
+
}
1190
+
};
1191
+
1592
1192
int rt712_sdca_init(struct device *dev, struct regmap *regmap,
1593
1193
struct regmap *mbq_regmap, struct sdw_slave *slave)
1594
1194
{
···
1636
1206
rt712->first_hw_init = false;
1637
1207
rt712->fu0f_dapm_mute = true;
1638
1208
rt712->fu0f_mixer_l_mute = rt712->fu0f_mixer_r_mute = true;
1209
+
rt712->fu1e_dapm_mute = true;
1210
+
rt712->fu1e_mixer_mute[0] = rt712->fu1e_mixer_mute[1] =
1211
+
rt712->fu1e_mixer_mute[2] = rt712->fu1e_mixer_mute[3] = true;
1639
1212
1640
1213
/* JD source uses JD1 in default */
1641
1214
rt712->jd_src = RT712_JD1;
···
1672
1239
return 0;
1673
1240
}
1674
1241
1675
-
int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave)
1242
+
static void rt712_sdca_va_io_init(struct rt712_sdca_priv *rt712)
1676
1243
{
1677
-
struct rt712_sdca_priv *rt712 = dev_get_drvdata(dev);
1678
1244
int ret = 0;
1679
-
unsigned int val, hibernation_flag;
1680
-
1681
-
rt712->disable_irq = false;
1682
-
1683
-
if (rt712->hw_init)
1684
-
return 0;
1685
-
1686
-
regcache_cache_only(rt712->regmap, false);
1687
-
regcache_cache_only(rt712->mbq_regmap, false);
1688
-
if (rt712->first_hw_init) {
1689
-
regcache_cache_bypass(rt712->regmap, true);
1690
-
regcache_cache_bypass(rt712->mbq_regmap, true);
1691
-
} else {
1692
-
/*
1693
-
* PM runtime status is marked as 'active' only when a Slave reports as Attached
1694
-
*/
1695
-
1696
-
/* update count of parent 'active' children */
1697
-
pm_runtime_set_active(&slave->dev);
1698
-
}
1699
-
1700
-
pm_runtime_get_noresume(&slave->dev);
1701
-
1702
-
rt712_sdca_index_read(rt712, RT712_VENDOR_REG, RT712_JD_PRODUCT_NUM, &val);
1703
-
rt712->hw_id = (val & 0xf000) >> 12;
1245
+
unsigned int hibernation_flag;
1246
+
struct device *dev = &rt712->slave->dev;
1704
1247
1705
1248
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_ANALOG_BIAS_CTL3, 0xaa81);
1706
1249
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_LDO2_3_CTL1, 0xa1e0);
···
1716
1307
regmap_write(rt712->regmap,
1717
1308
SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_OT23, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x04);
1718
1309
}
1310
+
}
1311
+
1312
+
static void rt712_sdca_vb_io_init(struct rt712_sdca_priv *rt712)
1313
+
{
1314
+
int ret = 0;
1315
+
unsigned int jack_func_status, mic_func_status, amp_func_status;
1316
+
struct device *dev = &rt712->slave->dev;
1317
+
1318
+
regmap_read(rt712->regmap,
1319
+
SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0), &jack_func_status);
1320
+
regmap_read(rt712->regmap,
1321
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0), &mic_func_status);
1322
+
regmap_read(rt712->regmap,
1323
+
SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0), &_func_status);
1324
+
dev_dbg(dev, "%s jack/mic/amp func_status=0x%x, 0x%x, 0x%x\n",
1325
+
__func__, jack_func_status, mic_func_status, amp_func_status);
1326
+
1327
+
/* DMIC */
1328
+
if ((mic_func_status & FUNCTION_NEEDS_INITIALIZATION) || (!rt712->first_hw_init)) {
1329
+
rt712_sdca_index_write(rt712, RT712_VENDOR_HDA_CTL, RT712_DMIC2_FU_IT_FLOAT_CTL, 0x1526);
1330
+
rt712_sdca_index_write(rt712, RT712_VENDOR_HDA_CTL, RT712_DMIC2_FU_CH12_FLOAT_CTL, 0x0304);
1331
+
rt712_sdca_index_write(rt712, RT712_VENDOR_HDA_CTL, RT712_ADC0A_CS_ADC0B_FU_FLOAT_CTL, 0x1f1e);
1332
+
rt712_sdca_index_write(rt712, RT712_VENDOR_HDA_CTL, RT712_ADC0B_FU_CH12_FLOAT_CTL, 0x0304);
1333
+
rt712_sdca_index_write(rt712, RT712_VENDOR_HDA_CTL, RT712_HDA_LEGACY_CONFIG_CTL0, 0x8010);
1334
+
regmap_write(rt712->regmap,
1335
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT_IT11, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x01);
1336
+
rt712_sdca_index_write(rt712, RT712_ULTRA_SOUND_DET, RT712_ULTRA_SOUND_DETECTOR6, 0x3200);
1337
+
regmap_write(rt712->regmap, RT712_RC_CAL, 0x23);
1338
+
1339
+
/* clear flag */
1340
+
regmap_write(rt712->regmap,
1341
+
SDW_SDCA_CTL(FUNC_NUM_MIC_ARRAY, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0),
1342
+
FUNCTION_NEEDS_INITIALIZATION);
1343
+
}
1344
+
1345
+
/* Jack */
1346
+
if ((jack_func_status & FUNCTION_NEEDS_INITIALIZATION) || (!rt712->first_hw_init)) {
1347
+
rt712_sdca_index_write(rt712, RT712_VENDOR_IMS_DRE, RT712_SEL_VEE2_HP_CTL1, 0x042a);
1348
+
rt712_sdca_index_write(rt712, RT712_CHARGE_PUMP, RT712_HP_DET_CTL3, 0x1fff);
1349
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_IO_CTL, 0xec67);
1350
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_ANALOG_BIAS_CTL3, 0xaa81);
1351
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_LDO2_3_CTL1, 0xa1e0);
1352
+
rt712_sdca_index_write(rt712, RT712_VENDOR_IMS_DRE, RT712_HP_DETECT_RLDET_CTL1, 0x0000);
1353
+
rt712_sdca_index_write(rt712, RT712_VENDOR_IMS_DRE, RT712_HP_DETECT_RLDET_CTL2, 0x0000);
1354
+
regmap_write(rt712->regmap, RT712_RC_CAL, 0x23);
1355
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_JD_CTL1, 0x2802);
1356
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_CLASSD_AMP_CTL6, 0xf215);
1357
+
1358
+
/* calibration */
1359
+
ret = rt712_sdca_calibration(rt712);
1360
+
if (ret < 0)
1361
+
dev_err(dev, "%s, calibration failed!\n", __func__);
1362
+
1363
+
rt712_sdca_index_update_bits(rt712, RT712_VENDOR_HDA_CTL, RT712_MIXER_CTL1, 0x3000, 0x0000);
1364
+
regmap_write(rt712->regmap,
1365
+
SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT_IT09, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x01);
1366
+
rt712_sdca_index_write(rt712, RT712_VENDOR_HDA_CTL, RT712_MISC_CTL_FOR_UAJ, 0x0003);
1367
+
1368
+
/* clear flag */
1369
+
regmap_write(rt712->regmap,
1370
+
SDW_SDCA_CTL(FUNC_NUM_JACK_CODEC, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0),
1371
+
FUNCTION_NEEDS_INITIALIZATION);
1372
+
}
1373
+
1374
+
/* SPK */
1375
+
if ((amp_func_status & FUNCTION_NEEDS_INITIALIZATION) || (!rt712->first_hw_init)) {
1376
+
if (rt712->hw_id != RT712_DEV_ID_713) {
1377
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_IO_CTL, 0xec63);
1378
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_CLASSD_AMP_CTL1, 0xfff5);
1379
+
rt712_sdca_index_write(rt712, RT712_VENDOR_HDA_CTL, RT712_EAPD_CTL, 0x0002);
1380
+
regmap_write(rt712->regmap,
1381
+
SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT_OT23, RT712_SDCA_CTL_VENDOR_DEF, 0), 0x04);
1382
+
}
1383
+
/* clear flag */
1384
+
regmap_write(rt712->regmap,
1385
+
SDW_SDCA_CTL(FUNC_NUM_AMP, RT712_SDCA_ENT0, RT712_SDCA_CTL_FUNC_STATUS, 0),
1386
+
FUNCTION_NEEDS_INITIALIZATION);
1387
+
}
1388
+
}
1389
+
1390
+
int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave)
1391
+
{
1392
+
struct rt712_sdca_priv *rt712 = dev_get_drvdata(dev);
1393
+
int ret = 0;
1394
+
unsigned int val;
1395
+
struct sdw_slave_prop *prop = &slave->prop;
1396
+
1397
+
rt712->disable_irq = false;
1398
+
1399
+
if (rt712->hw_init)
1400
+
return 0;
1401
+
1402
+
regcache_cache_only(rt712->regmap, false);
1403
+
regcache_cache_only(rt712->mbq_regmap, false);
1404
+
if (rt712->first_hw_init) {
1405
+
regcache_cache_bypass(rt712->regmap, true);
1406
+
regcache_cache_bypass(rt712->mbq_regmap, true);
1407
+
} else {
1408
+
/*
1409
+
* PM runtime status is marked as 'active' only when a Slave reports as Attached
1410
+
*/
1411
+
1412
+
/* update count of parent 'active' children */
1413
+
pm_runtime_set_active(&slave->dev);
1414
+
}
1415
+
1416
+
pm_runtime_get_noresume(&slave->dev);
1417
+
1418
+
rt712_sdca_index_read(rt712, RT712_VENDOR_REG, RT712_JD_PRODUCT_NUM, &val);
1419
+
rt712->hw_id = (val & 0xf000) >> 12;
1420
+
rt712->version_id = (val & 0x0f00) >> 8;
1421
+
dev_dbg(&slave->dev, "%s hw_id=0x%x, version_id=0x%x\n", __func__, rt712->hw_id, rt712->version_id);
1422
+
1423
+
if (rt712->version_id == RT712_VA)
1424
+
rt712_sdca_va_io_init(rt712);
1425
+
else {
1426
+
/* multilanes and DMIC are supported by rt712vb */
1427
+
ret = devm_snd_soc_register_component(dev,
1428
+
&soc_sdca_dev_rt712_dmic, rt712_sdca_dmic_dai, ARRAY_SIZE(rt712_sdca_dmic_dai));
1429
+
if (ret < 0)
1430
+
return ret;
1431
+
1432
+
prop->lane_control_support = true;
1433
+
rt712_sdca_vb_io_init(rt712);
1434
+
}
1719
1435
1720
1436
/*
1721
1437
* if set_jack callback occurred early than io_init,
···
1849
1315
if (rt712->hs_jack)
1850
1316
rt712_sdca_jack_init(rt712);
1851
1317
1852
-
if (!hibernation_flag)
1853
-
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_SW_CONFIG1, 0x0001);
1318
+
rt712_sdca_index_write(rt712, RT712_VENDOR_REG, RT712_SW_CONFIG1, 0x0001);
1854
1319
1855
1320
if (rt712->first_hw_init) {
1856
1321
regcache_cache_bypass(rt712->regmap, false);
+40
sound/soc/codecs/rt712-sdca.h
+40
sound/soc/codecs/rt712-sdca.h
···
19
19
struct regmap *regmap;
20
20
struct regmap *mbq_regmap;
21
21
struct snd_soc_component *component;
22
+
struct snd_soc_component *dmic_component;
22
23
struct sdw_slave *slave;
23
24
struct sdw_bus_params params;
24
25
bool hw_init;
···
35
34
unsigned int scp_sdca_stat1;
36
35
unsigned int scp_sdca_stat2;
37
36
unsigned int hw_id;
37
+
unsigned int version_id;
38
38
bool fu0f_dapm_mute;
39
39
bool fu0f_mixer_l_mute;
40
40
bool fu0f_mixer_r_mute;
41
+
bool fu1e_dapm_mute;
42
+
bool fu1e_mixer_mute[4];
43
+
};
44
+
45
+
struct rt712_dmic_kctrl_priv {
46
+
unsigned int reg_base;
47
+
unsigned int count;
48
+
unsigned int max;
49
+
unsigned int invert;
41
50
};
42
51
43
52
/* SDCA (Channel) */
···
58
47
59
48
/* NID */
60
49
#define RT712_VENDOR_REG 0x20
50
+
#define RT712_EQ_CTRL 0x53
51
+
#define RT712_CHARGE_PUMP 0x57
61
52
#define RT712_VENDOR_CALI 0x58
62
53
#define RT712_ULTRA_SOUND_DET 0x59
63
54
#define RT712_VENDOR_IMS_DRE 0x5b
···
69
56
/* Index (NID:20h) */
70
57
#define RT712_JD_PRODUCT_NUM 0x00
71
58
#define RT712_ANALOG_BIAS_CTL3 0x04
59
+
#define RT712_JD_CTL1 0x09
60
+
#define RT712_IO_CTL 0x0c
72
61
#define RT712_LDO2_3_CTL1 0x0e
73
62
#define RT712_PARA_VERB_CTL 0x1a
74
63
#define RT712_CC_DET1 0x24
64
+
#define RT712_CLASSD_AMP_CTL1 0x37
65
+
#define RT712_CLASSD_AMP_CTL6 0x3c
75
66
#define RT712_COMBO_JACK_AUTO_CTL1 0x45
76
67
#define RT712_COMBO_JACK_AUTO_CTL2 0x46
77
68
#define RT712_COMBO_JACK_AUTO_CTL3 0x47
···
83
66
#define RT712_FSM_CTL 0x67
84
67
#define RT712_SW_CONFIG1 0x8a
85
68
#define RT712_SW_CONFIG2 0x8b
69
+
70
+
/* Index (NID:57h) */
71
+
#define RT712_HP_DET_CTL3 0x0c
86
72
87
73
/* Index (NID:58h) */
88
74
#define RT712_DAC_DC_CALI_CTL1 0x00
···
97
77
/* Index (NID:5bh) */
98
78
#define RT712_IMS_DIGITAL_CTL1 0x00
99
79
#define RT712_IMS_DIGITAL_CTL5 0x05
80
+
#define RT712_SEL_VEE2_HP_CTL1 0x23
100
81
#define RT712_HP_DETECT_RLDET_CTL1 0x29
101
82
#define RT712_HP_DETECT_RLDET_CTL2 0x2a
102
83
···
136
115
#define RT712_UMP_HID_CTL6 0x66
137
116
#define RT712_UMP_HID_CTL7 0x67
138
117
#define RT712_UMP_HID_CTL8 0x68
118
+
#define RT712_MISC_CTL_FOR_UAJ 0x72
119
+
#define RT712_ADC0A_CS_ADC0B_FU_FLOAT_CTL 0xa2
120
+
#define RT712_DMIC2_FU_IT_FLOAT_CTL 0xa6
121
+
#define RT712_ADC0B_FU_CH12_FLOAT_CTL 0xb0
122
+
#define RT712_DMIC2_FU_CH12_FLOAT_CTL 0xb1
139
123
140
124
/* Parameter & Verb control 01 (0x1a)(NID:20h) */
141
125
#define RT712_HIDDEN_REG_SW_RESET (0x1 << 14)
···
171
145
#define FUNC_NUM_AMP 0x04
172
146
173
147
/* RT712 SDCA entity */
148
+
#define RT712_SDCA_ENT0 0x00
174
149
#define RT712_SDCA_ENT_HID01 0x01
175
150
#define RT712_SDCA_ENT_GE49 0x49
176
151
#define RT712_SDCA_ENT_USER_FU05 0x05
···
190
163
#define RT712_SDCA_ENT_CS1C 0x1c
191
164
#define RT712_SDCA_ENT_CS31 0x31
192
165
#define RT712_SDCA_ENT_OT23 0x42
166
+
#define RT712_SDCA_ENT_IT11 0x26
193
167
#define RT712_SDCA_ENT_IT26 0x26
194
168
#define RT712_SDCA_ENT_IT09 0x09
195
169
#define RT712_SDCA_ENT_PLATFORM_FU15 0x15
···
209
181
#define RT712_SDCA_CTL_REQ_POWER_STATE 0x01
210
182
#define RT712_SDCA_CTL_VENDOR_DEF 0x30
211
183
#define RT712_SDCA_CTL_FU_CH_GAIN 0x0b
184
+
#define RT712_SDCA_CTL_FUNC_STATUS 0x10
185
+
186
+
/* Function_Status */
187
+
#define FUNCTION_NEEDS_INITIALIZATION BIT(5)
188
+
#define FUNCTION_HAS_BEEN_RESET BIT(6)
189
+
#define FUNCTION_BUSY BIT(7)
212
190
213
191
/* sample frequency index */
214
192
#define RT712_SDCA_RATE_16000HZ 0x04
···
227
193
enum {
228
194
RT712_AIF1,
229
195
RT712_AIF2,
196
+
RT712_AIF3,
230
197
};
231
198
232
199
enum rt712_sdca_jd_src {
···
243
208
};
244
209
245
210
#define RT712_PART_ID_713 0x713
211
+
212
+
enum rt712_sdca_version {
213
+
RT712_VA,
214
+
RT712_VB,
215
+
};
246
216
247
217
int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave);
248
218
int rt712_sdca_init(struct device *dev, struct regmap *regmap,