Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
dt-bindings: clock: Add Qcom SM6375 GPUCC
Add device tree bindings for graphics clock controller for Qualcomm
Technology Inc's SM6375 SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-8-konrad.dybcio@linaro.org
authored by
Konrad Dybcio
and committed by
Bjorn Andersson
94329ce6
a5b9c5c5
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Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml
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Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Graphics Clock & Reset Controller on SM6375
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maintainers:
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- Konrad Dybcio <konrad.dybcio@linaro.org>
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description: |
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Qualcomm graphics clock control module provides clocks, resets and power
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domains on Qualcomm SoCs.
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See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h
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properties:
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compatible:
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enum:
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- qcom,sm6375-gpucc
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clocks:
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items:
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- description: Board XO source
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- description: GPLL0 main branch source
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- description: GPLL0 div branch source
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- description: SNoC DVM GFX source
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required:
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- compatible
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- clocks
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,sm6375-gcc.h>
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#include <dt-bindings/clock/qcom,rpmcc.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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clock-controller@5990000 {
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compatible = "qcom,sm6375-gpucc";
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reg = <0 0x05990000 0 0x9000>;
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
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<&gcc GCC_GPU_GPLL0_CLK_SRC>,
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<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>,
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<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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};
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...
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include/dt-bindings/clock/qcom,sm6375-gpucc.h
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include/dt-bindings/clock/qcom,sm6375-gpucc.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2023, Linaro Limited
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_BLAIR_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_BLAIR_H
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/* GPU CC clocks */
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#define GPU_CC_PLL0 0
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#define GPU_CC_PLL1 1
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#define GPU_CC_AHB_CLK 2
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#define GPU_CC_CX_GFX3D_CLK 3
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#define GPU_CC_CX_GFX3D_SLV_CLK 4
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#define GPU_CC_CX_GMU_CLK 5
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#define GPU_CC_CX_SNOC_DVM_CLK 6
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#define GPU_CC_CXO_AON_CLK 7
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#define GPU_CC_CXO_CLK 8
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#define GPU_CC_GMU_CLK_SRC 9
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#define GPU_CC_GX_CXO_CLK 10
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#define GPU_CC_GX_GFX3D_CLK 11
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#define GPU_CC_GX_GFX3D_CLK_SRC 12
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#define GPU_CC_GX_GMU_CLK 13
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#define GPU_CC_SLEEP_CLK 14
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/* GDSCs */
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#define GPU_CX_GDSC 0
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#define GPU_GX_GDSC 1
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/* Resets */
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#define GPU_GX_BCR 0
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#define GPU_ACD_BCR 1
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#define GPU_GX_ACD_MISC_BCR 2
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#endif