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drm/i915: Do not handle backlight combination mode specially

The current code does not follow Intel documentation: It misses some things
and does other, undocumented things. This causes wrong backlight values in
certain conditions. Instead of adding tricky code handling badly documented
and rare corner cases, don't handle combination mode specially at all. This
way PCI_LBPC is never touched and weird things shouldn't happen.

If combination mode is enabled, then the only downside is that changing the
brightness has a greater granularity (the LBPC value), but LBPC is at most
254 and the maximum is in the thousands, so this is no real functional loss.

A potential problem with not handling combined mode is that a brightness of
max * PCI_LBPC is not bright enough. However, this is very unlikely because
from the documentation LBPC seems to act as a scaling factor and doesn't look
like it's supposed to be changed after boot. The value at boot should always
result in a bright enough screen.

IMPORTANT: However, although usually the above is true, it may not be when
people ran an older (2.6.37) kernel which messed up the LBPC register, and
they are unlucky enough to have a BIOS that saves and restores the LBPC value.
Then a good kernel may seem to not work: Max brightness isn't bright enough.
If this happens people should boot back into the old kernel, set brightness
to the maximum, and then reboot. After that everything should be fine.

For more information see the below links. This fixes bugs:

http://bugzilla.kernel.org/show_bug.cgi?id=23472
http://bugzilla.kernel.org/show_bug.cgi?id=25072

Signed-off-by: Indan Zupancic <indan@nul.nu>
Tested-by: Alex Riesen <raa.lkml@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Indan Zupancic and committed by
Linus Torvalds 951f3512 98562ad8

-47
-10
drivers/gpu/drm/i915/i915_reg.h
··· 1553 1553 1554 1554 /* Backlight control */ 1555 1555 #define BLC_PWM_CTL 0x61254 1556 - #define BACKLIGHT_MODULATION_FREQ_SHIFT (17) 1557 1556 #define BLC_PWM_CTL2 0x61250 /* 965+ only */ 1558 - #define BLM_COMBINATION_MODE (1 << 30) 1559 - /* 1560 - * This is the most significant 15 bits of the number of backlight cycles in a 1561 - * complete cycle of the modulated backlight control. 1562 - * 1563 - * The actual value is this field multiplied by two. 1564 - */ 1565 - #define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) 1566 - #define BLM_LEGACY_MODE (1 << 16) 1567 1557 /* 1568 1558 * This is the number of cycles out of the backlight modulation cycle for which 1569 1559 * the backlight is on.
-37
drivers/gpu/drm/i915/intel_panel.c
··· 30 30 31 31 #include "intel_drv.h" 32 32 33 - #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ 34 - 35 33 void 36 34 intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 37 35 struct drm_display_mode *adjusted_mode) ··· 110 112 dev_priv->pch_pf_size = (width << 16) | height; 111 113 } 112 114 113 - static int is_backlight_combination_mode(struct drm_device *dev) 114 - { 115 - struct drm_i915_private *dev_priv = dev->dev_private; 116 - 117 - if (INTEL_INFO(dev)->gen >= 4) 118 - return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; 119 - 120 - if (IS_GEN2(dev)) 121 - return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; 122 - 123 - return 0; 124 - } 125 - 126 115 static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) 127 116 { 128 117 u32 val; ··· 166 181 if (INTEL_INFO(dev)->gen < 4) 167 182 max &= ~1; 168 183 } 169 - 170 - if (is_backlight_combination_mode(dev)) 171 - max *= 0xff; 172 184 } 173 185 174 186 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); ··· 183 201 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 184 202 if (IS_PINEVIEW(dev)) 185 203 val >>= 1; 186 - 187 - if (is_backlight_combination_mode(dev)){ 188 - u8 lbpc; 189 - 190 - val &= ~1; 191 - pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); 192 - val *= lbpc; 193 - val >>= 1; 194 - } 195 204 } 196 205 197 206 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); ··· 205 232 206 233 if (HAS_PCH_SPLIT(dev)) 207 234 return intel_pch_panel_set_backlight(dev, level); 208 - 209 - if (is_backlight_combination_mode(dev)){ 210 - u32 max = intel_panel_get_max_backlight(dev); 211 - u8 lpbc; 212 - 213 - lpbc = level * 0xfe / max + 1; 214 - level /= lpbc; 215 - pci_write_config_byte(dev->pdev, PCI_LBPC, lpbc); 216 - } 217 - 218 235 tmp = I915_READ(BLC_PWM_CTL); 219 236 if (IS_PINEVIEW(dev)) { 220 237 tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);