Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd/display: Remove update_planes_and_stream_v1 sequence
[Why]/How]
Remove the update_planes_and_stream_v1 sequence to make the logic the same.
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Chiang, Richard <Richard.Chiang@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Chiang, Richard
and committed by
Alex Deucher
9571dbaf
0352e5fa
+2
-127
+2
-127
drivers/gpu/drm/amd/display/dc/core/dc.c
+2
-127
drivers/gpu/drm/amd/display/dc/core/dc.c
···
5102
5102
&& !full_update_required(dc, srf_updates, surface_count, stream_update, stream);
5103
5103
}
5104
5104
5105
-
static bool update_planes_and_stream_v1(struct dc *dc,
5106
-
struct dc_surface_update *srf_updates, int surface_count,
5107
-
struct dc_stream_state *stream,
5108
-
struct dc_stream_update *stream_update,
5109
-
struct dc_state *state)
5110
-
{
5111
-
const struct dc_stream_status *stream_status;
5112
-
enum surface_update_type update_type;
5113
-
struct dc_state *context;
5114
-
struct dc_context *dc_ctx = dc->ctx;
5115
-
int i, j;
5116
-
struct dc_fast_update fast_update[MAX_SURFACES] = {0};
5117
-
5118
-
dc_exit_ips_for_hw_access(dc);
5119
-
5120
-
populate_fast_updates(fast_update, srf_updates, surface_count, stream_update);
5121
-
stream_status = dc_stream_get_status(stream);
5122
-
context = dc->current_state;
5123
-
5124
-
update_type = dc_check_update_surfaces_for_stream(
5125
-
dc, srf_updates, surface_count, stream_update, stream_status);
5126
-
/* It is possible to receive a flip for one plane while there are multiple flip_immediate planes in the same stream.
5127
-
* E.g. Desktop and MPO plane are flip_immediate but only the MPO plane received a flip
5128
-
* Force the other flip_immediate planes to flip so GSL doesn't wait for a flip that won't come.
5129
-
*/
5130
-
force_immediate_gsl_plane_flip(dc, srf_updates, surface_count);
5131
-
5132
-
if (update_type >= UPDATE_TYPE_FULL) {
5133
-
5134
-
/* initialize scratch memory for building context */
5135
-
context = dc_state_create_copy(state);
5136
-
if (context == NULL) {
5137
-
DC_ERROR("Failed to allocate new validate context!\n");
5138
-
return false;
5139
-
}
5140
-
5141
-
for (i = 0; i < dc->res_pool->pipe_count; i++) {
5142
-
struct pipe_ctx *new_pipe = &context->res_ctx.pipe_ctx[i];
5143
-
struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i];
5144
-
5145
-
if (new_pipe->plane_state && new_pipe->plane_state != old_pipe->plane_state)
5146
-
new_pipe->plane_state->force_full_update = true;
5147
-
}
5148
-
} else if (update_type == UPDATE_TYPE_FAST) {
5149
-
/*
5150
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* Previous frame finished and HW is ready for optimization.
5151
-
*/
5152
-
dc_post_update_surfaces_to_stream(dc);
5153
-
}
5154
-
5155
-
for (i = 0; i < surface_count; i++) {
5156
-
struct dc_plane_state *surface = srf_updates[i].surface;
5157
-
5158
-
copy_surface_update_to_plane(surface, &srf_updates[i]);
5159
-
5160
-
if (update_type >= UPDATE_TYPE_MED) {
5161
-
for (j = 0; j < dc->res_pool->pipe_count; j++) {
5162
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struct pipe_ctx *pipe_ctx =
5163
-
&context->res_ctx.pipe_ctx[j];
5164
-
5165
-
if (pipe_ctx->plane_state != surface)
5166
-
continue;
5167
-
5168
-
resource_build_scaling_params(pipe_ctx);
5169
-
}
5170
-
}
5171
-
}
5172
-
5173
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copy_stream_update_to_stream(dc, context, stream, stream_update);
5174
-
5175
-
if (update_type >= UPDATE_TYPE_FULL) {
5176
-
if (dc->res_pool->funcs->validate_bandwidth(dc, context, DC_VALIDATE_MODE_AND_PROGRAMMING) != DC_OK) {
5177
-
DC_ERROR("Mode validation failed for stream update!\n");
5178
-
dc_state_release(context);
5179
-
return false;
5180
-
}
5181
-
}
5182
-
5183
-
TRACE_DC_PIPE_STATE(pipe_ctx, i, MAX_PIPES);
5184
-
5185
-
if (fast_update_only(dc, fast_update, srf_updates, surface_count, stream_update, stream) &&
5186
-
!dc->debug.enable_legacy_fast_update) {
5187
-
commit_planes_for_stream_fast(dc,
5188
-
srf_updates,
5189
-
surface_count,
5190
-
stream,
5191
-
stream_update,
5192
-
update_type,
5193
-
context);
5194
-
} else {
5195
-
commit_planes_for_stream(
5196
-
dc,
5197
-
srf_updates,
5198
-
surface_count,
5199
-
stream,
5200
-
stream_update,
5201
-
update_type,
5202
-
context);
5203
-
}
5204
-
/*update current_State*/
5205
-
if (dc->current_state != context) {
5206
-
5207
-
struct dc_state *old = dc->current_state;
5208
-
5209
-
dc->current_state = context;
5210
-
dc_state_release(old);
5211
-
5212
-
for (i = 0; i < dc->res_pool->pipe_count; i++) {
5213
-
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
5214
-
5215
-
if (pipe_ctx->plane_state && pipe_ctx->stream == stream)
5216
-
pipe_ctx->plane_state->force_full_update = false;
5217
-
}
5218
-
}
5219
-
5220
-
/* Legacy optimization path for DCE. */
5221
-
if (update_type >= UPDATE_TYPE_FULL && dc_ctx->dce_version < DCE_VERSION_MAX) {
5222
-
dc_post_update_surfaces_to_stream(dc);
5223
-
TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce);
5224
-
}
5225
-
return true;
5226
-
}
5227
-
5228
5105
static bool update_planes_and_stream_v2(struct dc *dc,
5229
5106
struct dc_surface_update *srf_updates, int surface_count,
5230
5107
struct dc_stream_state *stream,
···
5359
5482
if (dc->ctx->dce_version >= DCN_VERSION_4_01) {
5360
5483
ret = update_planes_and_stream_v3(dc, srf_updates, surface_count,
5361
5484
stream, stream_update);
5362
-
} else if (dc->ctx->dce_version >= DCN_VERSION_3_2) {
5485
+
} else {
5363
5486
ret = update_planes_and_stream_v2(dc, srf_updates, surface_count,
5364
5487
stream, stream_update);
5365
-
} else
5366
-
ret = update_planes_and_stream_v1(dc, srf_updates, surface_count, stream,
5367
-
stream_update, state);
5488
+
}
5368
5489
5369
5490
if (ret && dc->ctx->dce_version >= DCN_VERSION_3_2)
5370
5491
clear_update_flags(srf_updates, surface_count, stream);