Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'powerpc-6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Madhavan Srinivasan:
- Add preempt lazy support
- Deprecate cxl and cxl flash driver
- Fix a possible IOMMU related OOPS at boot on pSeries
- Optimize sched_clock() in ppc32 by replacing mulhdu() by
mul_u64_u64_shr()
Thanks to Andrew Donnellan, Andy Shevchenko, Ankur Arora, Christophe
Leroy, Frederic Barrat, Gaurav Batra, Luis Felipe Hernandez, Michael
Ellerman, Nilay Shroff, Ricardo B. Marliere, Ritesh Harjani (IBM),
Sebastian Andrzej Siewior, Shrikanth Hegde, Sourabh Jain, Thorsten Blum,
and Zhu Jun.
* tag 'powerpc-6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
selftests/powerpc: Fix argument order to timer_sub()
powerpc/prom_init: Use IS_ENABLED()
powerpc/pseries/iommu: IOMMU incorrectly marks MMIO range in DDW
powerpc: Use str_on_off() helper in check_cache_coherency()
powerpc: Large user copy aware of full:rt:lazy preemption
powerpc: Add preempt lazy support
powerpc/book3s64/hugetlb: Fix disabling hugetlb when fadump is active
powerpc/vdso: Mark the vDSO code read-only after init
powerpc/64: Use get_user() in start_thread()
macintosh: declare ctl_table as const
selftest/powerpc/ptrace: Cleanup duplicate macro definitions
selftest/powerpc/ptrace/ptrace-pkey: Remove duplicate macros
selftest/powerpc/ptrace/core-pkey: Remove duplicate macros
powerpc/8xx: Drop legacy-of-mm-gpiochip.h header
scsi/cxlflash: Deprecate driver
cxl: Deprecate driver
selftests/powerpc: Fix typo in test-vphn.c
powerpc/xmon: Use str_yes_no() helper in dump_one_paca()
powerpc/32: Replace mulhdu() by mul_u64_u64_shr()
+142
-194
+3
Documentation/ABI/testing/sysfs-class-cxl
Documentation/ABI/obsolete/sysfs-class-cxl
+3
Documentation/ABI/testing/sysfs-class-cxl
Documentation/ABI/obsolete/sysfs-class-cxl
···
1
+
The cxl driver is no longer maintained, and will be removed from the kernel in
2
+
the near future.
3
+
1
4
Please note that attributes that are shared between devices are stored in
2
5
the directory pointed to by the symlink device/.
3
6
For example, the real path of the attribute /sys/class/cxl/afu0.0s/irqs_max is
+2
-2
MAINTAINERS
+2
-2
MAINTAINERS
···
6226
6226
M: Frederic Barrat <fbarrat@linux.ibm.com>
6227
6227
M: Andrew Donnellan <ajd@linux.ibm.com>
6228
6228
L: linuxppc-dev@lists.ozlabs.org
6229
-
S: Supported
6230
-
F: Documentation/ABI/testing/sysfs-class-cxl
6229
+
S: Obsolete
6230
+
F: Documentation/ABI/obsolete/sysfs-class-cxl
6231
6231
F: Documentation/arch/powerpc/cxl.rst
6232
6232
F: arch/powerpc/platforms/powernv/pci-cxl.c
6233
6233
F: drivers/misc/cxl/
+1
arch/powerpc/Kconfig
+1
arch/powerpc/Kconfig
···
145
145
select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
146
146
select ARCH_HAS_PHYS_TO_DMA
147
147
select ARCH_HAS_PMEM_API
148
+
select ARCH_HAS_PREEMPT_LAZY
148
149
select ARCH_HAS_PTE_DEVMAP if PPC_BOOK3S_64
149
150
select ARCH_HAS_PTE_SPECIAL
150
151
select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE && PPC_BOOK3S_64
+9
arch/powerpc/include/asm/hugetlb.h
+9
arch/powerpc/include/asm/hugetlb.h
···
15
15
16
16
extern bool hugetlb_disabled;
17
17
18
+
static inline bool hugepages_supported(void)
19
+
{
20
+
if (hugetlb_disabled)
21
+
return false;
22
+
23
+
return HPAGE_SHIFT != 0;
24
+
}
25
+
#define hugepages_supported hugepages_supported
26
+
18
27
void __init hugetlbpage_init_defaultsize(void);
19
28
20
29
int slice_is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
+6
-3
arch/powerpc/include/asm/thread_info.h
+6
-3
arch/powerpc/include/asm/thread_info.h
···
103
103
#define TIF_PATCH_PENDING 6 /* pending live patching update */
104
104
#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */
105
105
#define TIF_SINGLESTEP 8 /* singlestepping active */
106
+
#define TIF_NEED_RESCHED_LAZY 9 /* Scheduler driven lazy preemption */
106
107
#define TIF_SECCOMP 10 /* secure computing */
107
108
#define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */
108
109
#define TIF_NOERROR 12 /* Force successful syscall return */
···
123
122
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
124
123
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
125
124
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
125
+
#define _TIF_NEED_RESCHED_LAZY (1<<TIF_NEED_RESCHED_LAZY)
126
126
#define _TIF_NOTIFY_SIGNAL (1<<TIF_NOTIFY_SIGNAL)
127
127
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
128
128
#define _TIF_32BIT (1<<TIF_32BIT)
···
144
142
_TIF_SYSCALL_EMU)
145
143
146
144
#define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
147
-
_TIF_NOTIFY_RESUME | _TIF_UPROBE | \
148
-
_TIF_RESTORE_TM | _TIF_PATCH_PENDING | \
149
-
_TIF_NOTIFY_SIGNAL)
145
+
_TIF_NEED_RESCHED_LAZY | _TIF_NOTIFY_RESUME | \
146
+
_TIF_UPROBE | _TIF_RESTORE_TM | \
147
+
_TIF_PATCH_PENDING | _TIF_NOTIFY_SIGNAL)
148
+
150
149
#define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR)
151
150
152
151
/* Bits in local_flags */
+1
-1
arch/powerpc/include/asm/time.h
+1
-1
arch/powerpc/include/asm/time.h
···
86
86
#define mulhdu(x,y) \
87
87
({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
88
88
#else
89
-
extern u64 mulhdu(u64, u64);
89
+
#define mulhdu(x, y) mul_u64_u64_shr(x, y, 64)
90
90
#endif
91
91
92
92
extern void div128_by_32(u64 dividend_high, u64 dividend_low,
+2
-2
arch/powerpc/kernel/interrupt.c
+2
-2
arch/powerpc/kernel/interrupt.c
···
185
185
ti_flags = read_thread_flags();
186
186
while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
187
187
local_irq_enable();
188
-
if (ti_flags & _TIF_NEED_RESCHED) {
188
+
if (ti_flags & (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY)) {
189
189
schedule();
190
190
} else {
191
191
/*
···
396
396
/* Returning to a kernel context with local irqs enabled. */
397
397
WARN_ON_ONCE(!(regs->msr & MSR_EE));
398
398
again:
399
-
if (IS_ENABLED(CONFIG_PREEMPT)) {
399
+
if (IS_ENABLED(CONFIG_PREEMPTION)) {
400
400
/* Return to preemptible kernel context */
401
401
if (unlikely(read_thread_flags() & _TIF_NEED_RESCHED)) {
402
402
if (preempt_count() == 0)
+1
-1
arch/powerpc/kernel/iommu.c
+1
-1
arch/powerpc/kernel/iommu.c
-26
arch/powerpc/kernel/misc_32.S
-26
arch/powerpc/kernel/misc_32.S
···
28
28
.text
29
29
30
30
/*
31
-
* This returns the high 64 bits of the product of two 64-bit numbers.
32
-
*/
33
-
_GLOBAL(mulhdu)
34
-
cmpwi r6,0
35
-
cmpwi cr1,r3,0
36
-
mr r10,r4
37
-
mulhwu r4,r4,r5
38
-
beq 1f
39
-
mulhwu r0,r10,r6
40
-
mullw r7,r10,r5
41
-
addc r7,r0,r7
42
-
addze r4,r4
43
-
1: beqlr cr1 /* all done if high part of A is 0 */
44
-
mullw r9,r3,r5
45
-
mulhwu r10,r3,r5
46
-
beq 2f
47
-
mullw r0,r3,r6
48
-
mulhwu r8,r3,r6
49
-
addc r7,r0,r7
50
-
adde r4,r4,r8
51
-
addze r10,r10
52
-
2: addc r4,r4,r9
53
-
addze r3,r10
54
-
blr
55
-
56
-
/*
57
31
* reloc_got2 runs through the .got2 section adding an offset
58
32
* to each entry.
59
33
*/
+2
-2
arch/powerpc/kernel/process.c
+2
-2
arch/powerpc/kernel/process.c
···
1960
1960
* address of _start and the second entry is the TOC
1961
1961
* value we need to use.
1962
1962
*/
1963
-
__get_user(entry, (unsigned long __user *)start);
1964
-
__get_user(toc, (unsigned long __user *)start+1);
1963
+
get_user(entry, (unsigned long __user *)start);
1964
+
get_user(toc, (unsigned long __user *)start+1);
1965
1965
1966
1966
/* Check whether the e_entry function descriptor entries
1967
1967
* need to be relocated before we can use them.
+14
-25
arch/powerpc/kernel/prom_init.c
+14
-25
arch/powerpc/kernel/prom_init.c
···
2792
2792
dt_struct_start, dt_struct_end);
2793
2793
}
2794
2794
2795
-
#ifdef CONFIG_PPC_CHRP
2796
2795
/*
2797
2796
* Pegasos and BriQ lacks the "ranges" property in the isa node
2798
2797
* Pegasos needs decimal IRQ 14/15, not hexadecimal
···
2842
2843
}
2843
2844
}
2844
2845
}
2845
-
#else
2846
-
#define fixup_device_tree_chrp()
2847
-
#endif
2848
2846
2849
-
#if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC)
2850
2847
static void __init fixup_device_tree_pmac64(void)
2851
2848
{
2852
2849
phandle u3, i2c, mpic;
···
2882
2887
prom_setprop(i2c, "/u3@0,f8000000/i2c@f8001000", "interrupt-parent",
2883
2888
&parent, sizeof(parent));
2884
2889
}
2885
-
#else
2886
-
#define fixup_device_tree_pmac64()
2887
-
#endif
2888
2890
2889
-
#ifdef CONFIG_PPC_PMAC
2890
2891
static void __init fixup_device_tree_pmac(void)
2891
2892
{
2892
2893
__be32 val = 1;
···
2902
2911
prom_setprop(node, NULL, "#size-cells", &val, sizeof(val));
2903
2912
}
2904
2913
}
2905
-
#else
2906
-
static inline void fixup_device_tree_pmac(void) { }
2907
-
#endif
2908
2914
2909
-
#ifdef CONFIG_PPC_EFIKA
2910
2915
/*
2911
2916
* The MPC5200 FEC driver requires an phy-handle property to tell it how
2912
2917
* to talk to the phy. If the phy-handle property is missing, then this
···
3034
3047
/* Make sure ethernet phy-handle property exists */
3035
3048
fixup_device_tree_efika_add_phy();
3036
3049
}
3037
-
#else
3038
-
#define fixup_device_tree_efika()
3039
-
#endif
3040
3050
3041
-
#ifdef CONFIG_PPC_PASEMI_NEMO
3042
3051
/*
3043
3052
* CFE supplied on Nemo is broken in several ways, biggest
3044
3053
* problem is that it reassigns ISA interrupts to unused mpic ints.
···
3110
3127
3111
3128
prom_setprop(iob, name, "device_type", "isa", sizeof("isa"));
3112
3129
}
3113
-
#else /* !CONFIG_PPC_PASEMI_NEMO */
3114
-
static inline void fixup_device_tree_pasemi(void) { }
3115
-
#endif
3116
3130
3117
3131
static void __init fixup_device_tree(void)
3118
3132
{
3119
-
fixup_device_tree_chrp();
3120
-
fixup_device_tree_pmac();
3121
-
fixup_device_tree_pmac64();
3122
-
fixup_device_tree_efika();
3123
-
fixup_device_tree_pasemi();
3133
+
if (IS_ENABLED(CONFIG_PPC_CHRP))
3134
+
fixup_device_tree_chrp();
3135
+
3136
+
if (IS_ENABLED(CONFIG_PPC_PMAC))
3137
+
fixup_device_tree_pmac();
3138
+
3139
+
if (IS_ENABLED(CONFIG_PPC_PMAC) && IS_ENABLED(CONFIG_PPC64))
3140
+
fixup_device_tree_pmac64();
3141
+
3142
+
if (IS_ENABLED(CONFIG_PPC_EFIKA))
3143
+
fixup_device_tree_efika();
3144
+
3145
+
if (IS_ENABLED(CONFIG_PPC_PASEMI_NEMO))
3146
+
fixup_device_tree_pasemi();
3124
3147
}
3125
3148
3126
3149
static void __init prom_find_boot_cpu(void)
+2
-2
arch/powerpc/kernel/setup-common.c
+2
-2
arch/powerpc/kernel/setup-common.c
···
834
834
if (devtree_coherency != KERNEL_COHERENCY) {
835
835
printk(KERN_ERR
836
836
"kernel coherency:%s != device tree_coherency:%s\n",
837
-
KERNEL_COHERENCY ? "on" : "off",
838
-
devtree_coherency ? "on" : "off");
837
+
str_on_off(KERNEL_COHERENCY),
838
+
str_on_off(devtree_coherency));
839
839
BUG();
840
840
}
841
841
+1
-1
arch/powerpc/kernel/vdso32_wrapper.S
+1
-1
arch/powerpc/kernel/vdso32_wrapper.S
+1
-1
arch/powerpc/kernel/vdso64_wrapper.S
+1
-1
arch/powerpc/kernel/vdso64_wrapper.S
+1
-1
arch/powerpc/lib/vmx-helper.c
+1
-1
arch/powerpc/lib/vmx-helper.c
···
45
45
* set and we are preemptible. The hack here is to schedule a
46
46
* decrementer to fire here and reschedule for us if necessary.
47
47
*/
48
-
if (IS_ENABLED(CONFIG_PREEMPT) && need_resched())
48
+
if (IS_ENABLED(CONFIG_PREEMPTION) && need_resched())
49
49
set_dec(1);
50
50
return 0;
51
51
}
+60
-59
arch/powerpc/platforms/8xx/cpm1.c
+60
-59
arch/powerpc/platforms/8xx/cpm1.c
···
45
45
#include <sysdev/fsl_soc.h>
46
46
47
47
#ifdef CONFIG_8xx_GPIO
48
-
#include <linux/gpio/legacy-of-mm-gpiochip.h>
48
+
#include <linux/gpio/driver.h>
49
49
#endif
50
50
51
51
#define CPM_MAP_SIZE (0x4000)
···
376
376
#ifdef CONFIG_8xx_GPIO
377
377
378
378
struct cpm1_gpio16_chip {
379
-
struct of_mm_gpio_chip mm_gc;
379
+
struct gpio_chip gc;
380
+
void __iomem *regs;
380
381
spinlock_t lock;
381
382
382
383
/* shadowed data register to clear/set bits safely */
···
387
386
int irq[16];
388
387
};
389
388
390
-
static void cpm1_gpio16_save_regs(struct of_mm_gpio_chip *mm_gc)
389
+
static void cpm1_gpio16_save_regs(struct cpm1_gpio16_chip *cpm1_gc)
391
390
{
392
-
struct cpm1_gpio16_chip *cpm1_gc =
393
-
container_of(mm_gc, struct cpm1_gpio16_chip, mm_gc);
394
-
struct cpm_ioport16 __iomem *iop = mm_gc->regs;
391
+
struct cpm_ioport16 __iomem *iop = cpm1_gc->regs;
395
392
396
393
cpm1_gc->cpdata = in_be16(&iop->dat);
397
394
}
398
395
399
396
static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio)
400
397
{
401
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
402
-
struct cpm_ioport16 __iomem *iop = mm_gc->regs;
398
+
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);
399
+
struct cpm_ioport16 __iomem *iop = cpm1_gc->regs;
403
400
u16 pin_mask;
404
401
405
402
pin_mask = 1 << (15 - gpio);
···
405
406
return !!(in_be16(&iop->dat) & pin_mask);
406
407
}
407
408
408
-
static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask,
409
-
int value)
409
+
static void __cpm1_gpio16_set(struct cpm1_gpio16_chip *cpm1_gc, u16 pin_mask, int value)
410
410
{
411
-
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
412
-
struct cpm_ioport16 __iomem *iop = mm_gc->regs;
411
+
struct cpm_ioport16 __iomem *iop = cpm1_gc->regs;
413
412
414
413
if (value)
415
414
cpm1_gc->cpdata |= pin_mask;
···
419
422
420
423
static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)
421
424
{
422
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
423
-
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
425
+
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);
424
426
unsigned long flags;
425
427
u16 pin_mask = 1 << (15 - gpio);
426
428
427
429
spin_lock_irqsave(&cpm1_gc->lock, flags);
428
430
429
-
__cpm1_gpio16_set(mm_gc, pin_mask, value);
431
+
__cpm1_gpio16_set(cpm1_gc, pin_mask, value);
430
432
431
433
spin_unlock_irqrestore(&cpm1_gc->lock, flags);
432
434
}
433
435
434
436
static int cpm1_gpio16_to_irq(struct gpio_chip *gc, unsigned int gpio)
435
437
{
436
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
437
-
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
438
+
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);
438
439
439
440
return cpm1_gc->irq[gpio] ? : -ENXIO;
440
441
}
441
442
442
443
static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
443
444
{
444
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
445
-
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
446
-
struct cpm_ioport16 __iomem *iop = mm_gc->regs;
445
+
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);
446
+
struct cpm_ioport16 __iomem *iop = cpm1_gc->regs;
447
447
unsigned long flags;
448
448
u16 pin_mask = 1 << (15 - gpio);
449
449
450
450
spin_lock_irqsave(&cpm1_gc->lock, flags);
451
451
452
452
setbits16(&iop->dir, pin_mask);
453
-
__cpm1_gpio16_set(mm_gc, pin_mask, val);
453
+
__cpm1_gpio16_set(cpm1_gc, pin_mask, val);
454
454
455
455
spin_unlock_irqrestore(&cpm1_gc->lock, flags);
456
456
···
456
462
457
463
static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio)
458
464
{
459
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
460
-
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
461
-
struct cpm_ioport16 __iomem *iop = mm_gc->regs;
465
+
struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);
466
+
struct cpm_ioport16 __iomem *iop = cpm1_gc->regs;
462
467
unsigned long flags;
463
468
u16 pin_mask = 1 << (15 - gpio);
464
469
···
474
481
{
475
482
struct device_node *np = dev->of_node;
476
483
struct cpm1_gpio16_chip *cpm1_gc;
477
-
struct of_mm_gpio_chip *mm_gc;
478
484
struct gpio_chip *gc;
479
485
u16 mask;
480
486
481
-
cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);
487
+
cpm1_gc = devm_kzalloc(dev, sizeof(*cpm1_gc), GFP_KERNEL);
482
488
if (!cpm1_gc)
483
489
return -ENOMEM;
484
490
···
491
499
cpm1_gc->irq[i] = irq_of_parse_and_map(np, j++);
492
500
}
493
501
494
-
mm_gc = &cpm1_gc->mm_gc;
495
-
gc = &mm_gc->gc;
496
-
497
-
mm_gc->save_regs = cpm1_gpio16_save_regs;
502
+
gc = &cpm1_gc->gc;
503
+
gc->base = -1;
498
504
gc->ngpio = 16;
499
505
gc->direction_input = cpm1_gpio16_dir_in;
500
506
gc->direction_output = cpm1_gpio16_dir_out;
···
502
512
gc->parent = dev;
503
513
gc->owner = THIS_MODULE;
504
514
505
-
return of_mm_gpiochip_add_data(np, mm_gc, cpm1_gc);
515
+
gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np);
516
+
if (!gc->label)
517
+
return -ENOMEM;
518
+
519
+
cpm1_gc->regs = devm_of_iomap(dev, np, 0, NULL);
520
+
if (IS_ERR(cpm1_gc->regs))
521
+
return PTR_ERR(cpm1_gc->regs);
522
+
523
+
cpm1_gpio16_save_regs(cpm1_gc);
524
+
525
+
return devm_gpiochip_add_data(dev, gc, cpm1_gc);
506
526
}
507
527
508
528
struct cpm1_gpio32_chip {
509
-
struct of_mm_gpio_chip mm_gc;
529
+
struct gpio_chip gc;
530
+
void __iomem *regs;
510
531
spinlock_t lock;
511
532
512
533
/* shadowed data register to clear/set bits safely */
513
534
u32 cpdata;
514
535
};
515
536
516
-
static void cpm1_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
537
+
static void cpm1_gpio32_save_regs(struct cpm1_gpio32_chip *cpm1_gc)
517
538
{
518
-
struct cpm1_gpio32_chip *cpm1_gc =
519
-
container_of(mm_gc, struct cpm1_gpio32_chip, mm_gc);
520
-
struct cpm_ioport32b __iomem *iop = mm_gc->regs;
539
+
struct cpm_ioport32b __iomem *iop = cpm1_gc->regs;
521
540
522
541
cpm1_gc->cpdata = in_be32(&iop->dat);
523
542
}
524
543
525
544
static int cpm1_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
526
545
{
527
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
528
-
struct cpm_ioport32b __iomem *iop = mm_gc->regs;
546
+
struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);
547
+
struct cpm_ioport32b __iomem *iop = cpm1_gc->regs;
529
548
u32 pin_mask;
530
549
531
550
pin_mask = 1 << (31 - gpio);
···
542
543
return !!(in_be32(&iop->dat) & pin_mask);
543
544
}
544
545
545
-
static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
546
-
int value)
546
+
static void __cpm1_gpio32_set(struct cpm1_gpio32_chip *cpm1_gc, u32 pin_mask, int value)
547
547
{
548
-
struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
549
-
struct cpm_ioport32b __iomem *iop = mm_gc->regs;
548
+
struct cpm_ioport32b __iomem *iop = cpm1_gc->regs;
550
549
551
550
if (value)
552
551
cpm1_gc->cpdata |= pin_mask;
···
556
559
557
560
static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
558
561
{
559
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
560
-
struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
562
+
struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);
561
563
unsigned long flags;
562
564
u32 pin_mask = 1 << (31 - gpio);
563
565
564
566
spin_lock_irqsave(&cpm1_gc->lock, flags);
565
567
566
-
__cpm1_gpio32_set(mm_gc, pin_mask, value);
568
+
__cpm1_gpio32_set(cpm1_gc, pin_mask, value);
567
569
568
570
spin_unlock_irqrestore(&cpm1_gc->lock, flags);
569
571
}
570
572
571
573
static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
572
574
{
573
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
574
-
struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
575
-
struct cpm_ioport32b __iomem *iop = mm_gc->regs;
575
+
struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);
576
+
struct cpm_ioport32b __iomem *iop = cpm1_gc->regs;
576
577
unsigned long flags;
577
578
u32 pin_mask = 1 << (31 - gpio);
578
579
579
580
spin_lock_irqsave(&cpm1_gc->lock, flags);
580
581
581
582
setbits32(&iop->dir, pin_mask);
582
-
__cpm1_gpio32_set(mm_gc, pin_mask, val);
583
+
__cpm1_gpio32_set(cpm1_gc, pin_mask, val);
583
584
584
585
spin_unlock_irqrestore(&cpm1_gc->lock, flags);
585
586
···
586
591
587
592
static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
588
593
{
589
-
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
590
-
struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(&mm_gc->gc);
591
-
struct cpm_ioport32b __iomem *iop = mm_gc->regs;
594
+
struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);
595
+
struct cpm_ioport32b __iomem *iop = cpm1_gc->regs;
592
596
unsigned long flags;
593
597
u32 pin_mask = 1 << (31 - gpio);
594
598
···
604
610
{
605
611
struct device_node *np = dev->of_node;
606
612
struct cpm1_gpio32_chip *cpm1_gc;
607
-
struct of_mm_gpio_chip *mm_gc;
608
613
struct gpio_chip *gc;
609
614
610
-
cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);
615
+
cpm1_gc = devm_kzalloc(dev, sizeof(*cpm1_gc), GFP_KERNEL);
611
616
if (!cpm1_gc)
612
617
return -ENOMEM;
613
618
614
619
spin_lock_init(&cpm1_gc->lock);
615
620
616
-
mm_gc = &cpm1_gc->mm_gc;
617
-
gc = &mm_gc->gc;
618
-
619
-
mm_gc->save_regs = cpm1_gpio32_save_regs;
621
+
gc = &cpm1_gc->gc;
622
+
gc->base = -1;
620
623
gc->ngpio = 32;
621
624
gc->direction_input = cpm1_gpio32_dir_in;
622
625
gc->direction_output = cpm1_gpio32_dir_out;
···
622
631
gc->parent = dev;
623
632
gc->owner = THIS_MODULE;
624
633
625
-
return of_mm_gpiochip_add_data(np, mm_gc, cpm1_gc);
634
+
gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np);
635
+
if (!gc->label)
636
+
return -ENOMEM;
637
+
638
+
cpm1_gc->regs = devm_of_iomap(dev, np, 0, NULL);
639
+
if (IS_ERR(cpm1_gc->regs))
640
+
return PTR_ERR(cpm1_gc->regs);
641
+
642
+
cpm1_gpio32_save_regs(cpm1_gc);
643
+
644
+
return devm_gpiochip_add_data(dev, gc, cpm1_gc);
626
645
}
627
646
628
647
#endif /* CONFIG_8xx_GPIO */
+6
-3
arch/powerpc/platforms/pseries/iommu.c
+6
-3
arch/powerpc/platforms/pseries/iommu.c
···
1650
1650
iommu_table_setparms_common(newtbl, pci->phb->bus->number, create.liobn,
1651
1651
dynamic_addr, dynamic_len, page_shift, NULL,
1652
1652
&iommu_table_lpar_multi_ops);
1653
-
iommu_init_table(newtbl, pci->phb->node, start, end);
1653
+
iommu_init_table(newtbl, pci->phb->node,
1654
+
start >> page_shift, end >> page_shift);
1654
1655
1655
1656
pci->table_group->tables[default_win_removed ? 0 : 1] = newtbl;
1656
1657
···
2066
2065
offset, 1UL << window_shift,
2067
2066
IOMMU_PAGE_SHIFT_4K, NULL,
2068
2067
&iommu_table_lpar_multi_ops);
2069
-
iommu_init_table(tbl, pci->phb->node, start, end);
2068
+
iommu_init_table(tbl, pci->phb->node,
2069
+
start >> IOMMU_PAGE_SHIFT_4K,
2070
+
end >> IOMMU_PAGE_SHIFT_4K);
2070
2071
2071
2072
table_group->tables[0] = tbl;
2072
2073
···
2139
2136
/* New table for using DDW instead of the default DMA window */
2140
2137
iommu_table_setparms_common(tbl, pci->phb->bus->number, create.liobn, win_addr,
2141
2138
1UL << len, page_shift, NULL, &iommu_table_lpar_multi_ops);
2142
-
iommu_init_table(tbl, pci->phb->node, start, end);
2139
+
iommu_init_table(tbl, pci->phb->node, start >> page_shift, end >> page_shift);
2143
2140
2144
2141
pci->table_group->tables[num] = tbl;
2145
2142
set_iommu_table_base(&pdev->dev, tbl);
+3
-3
arch/powerpc/xmon/xmon.c
+3
-3
arch/powerpc/xmon/xmon.c
···
2623
2623
2624
2624
printf("paca for cpu 0x%x @ %px:\n", cpu, p);
2625
2625
2626
-
printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no");
2627
-
printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no");
2628
-
printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no");
2626
+
printf(" %-*s = %s\n", 25, "possible", str_yes_no(cpu_possible(cpu)));
2627
+
printf(" %-*s = %s\n", 25, "present", str_yes_no(cpu_present(cpu)));
2628
+
printf(" %-*s = %s\n", 25, "online", str_yes_no(cpu_online(cpu)));
2629
2629
2630
2630
#define DUMP(paca, name, format) \
2631
2631
printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \
+1
-1
drivers/macintosh/mac_hid.c
+1
-1
drivers/macintosh/mac_hid.c
+4
-2
drivers/misc/cxl/Kconfig
+4
-2
drivers/misc/cxl/Kconfig
···
9
9
select PPC_64S_HASH_MMU
10
10
11
11
config CXL
12
-
tristate "Support for IBM Coherent Accelerators (CXL)"
12
+
tristate "Support for IBM Coherent Accelerators (CXL) (DEPRECATED)"
13
13
depends on PPC_POWERNV && PCI_MSI && EEH
14
14
select CXL_BASE
15
-
default m
16
15
help
16
+
The cxl driver is deprecated and will be removed in a future
17
+
kernel release.
18
+
17
19
Select this option to enable driver support for IBM Coherent
18
20
Accelerators (CXL). CXL is otherwise known as Coherent Accelerator
19
21
Processor Interface (CAPI). CAPI allows accelerators in FPGAs to be
+2
drivers/misc/cxl/of.c
+2
drivers/misc/cxl/of.c
+2
drivers/misc/cxl/pci.c
+2
drivers/misc/cxl/pci.c
···
1726
1726
int slice;
1727
1727
int rc;
1728
1728
1729
+
dev_err_once(&dev->dev, "DEPRECATED: cxl is deprecated and will be removed in a future kernel release\n");
1730
+
1729
1731
if (cxl_pci_is_vphb_device(dev)) {
1730
1732
dev_dbg(&dev->dev, "cxl_init_adapter: Ignoring cxl vphb device\n");
1731
1733
return -ENODEV;
+4
-2
drivers/scsi/cxlflash/Kconfig
+4
-2
drivers/scsi/cxlflash/Kconfig
···
4
4
#
5
5
6
6
config CXLFLASH
7
-
tristate "Support for IBM CAPI Flash"
7
+
tristate "Support for IBM CAPI Flash (DEPRECATED)"
8
8
depends on PCI && SCSI && (CXL || OCXL) && EEH
9
9
select IRQ_POLL
10
-
default m
11
10
help
11
+
The cxlflash driver is deprecated and will be removed in a future
12
+
kernel release.
13
+
12
14
Allows CAPI Accelerated IO to Flash
13
15
If unsure, say N.
+2
drivers/scsi/cxlflash/main.c
+2
drivers/scsi/cxlflash/main.c
+1
-1
tools/testing/selftests/powerpc/benchmarks/gettimeofday.c
+1
-1
tools/testing/selftests/powerpc/benchmarks/gettimeofday.c
+8
tools/testing/selftests/powerpc/include/pkeys.h
+8
tools/testing/selftests/powerpc/include/pkeys.h
···
35
35
#define __NR_pkey_alloc 384
36
36
#define __NR_pkey_free 385
37
37
38
+
#ifndef NT_PPC_PKEY
39
+
#define NT_PPC_PKEY 0x110
40
+
#endif
41
+
38
42
#define PKEY_BITS_PER_PKEY 2
39
43
#define NR_PKEYS 32
40
44
#define PKEY_BITS_MASK ((1UL << PKEY_BITS_PER_PKEY) - 1)
45
+
46
+
#define AMR_BITS_PER_PKEY 2
47
+
#define PKEY_REG_BITS (sizeof(u64) * 8)
48
+
#define pkeyshift(pkey) (PKEY_REG_BITS - ((pkey + 1) * AMR_BITS_PER_PKEY))
41
49
42
50
inline unsigned long pkeyreg_get(void)
43
51
{
+1
-30
tools/testing/selftests/powerpc/ptrace/core-pkey.c
+1
-30
tools/testing/selftests/powerpc/ptrace/core-pkey.c
···
16
16
#include <unistd.h>
17
17
#include "ptrace.h"
18
18
#include "child.h"
19
-
20
-
#ifndef __NR_pkey_alloc
21
-
#define __NR_pkey_alloc 384
22
-
#endif
23
-
24
-
#ifndef __NR_pkey_free
25
-
#define __NR_pkey_free 385
26
-
#endif
27
-
28
-
#ifndef NT_PPC_PKEY
29
-
#define NT_PPC_PKEY 0x110
30
-
#endif
31
-
32
-
#ifndef PKEY_DISABLE_EXECUTE
33
-
#define PKEY_DISABLE_EXECUTE 0x4
34
-
#endif
35
-
36
-
#define AMR_BITS_PER_PKEY 2
37
-
#define PKEY_REG_BITS (sizeof(u64) * 8)
38
-
#define pkeyshift(pkey) (PKEY_REG_BITS - ((pkey + 1) * AMR_BITS_PER_PKEY))
19
+
#include "pkeys.h"
39
20
40
21
#define CORE_FILE_LIMIT (5 * 1024 * 1024) /* 5 MB should be enough */
41
22
···
41
60
/* When the child crashed. */
42
61
time_t core_time;
43
62
};
44
-
45
-
static int sys_pkey_alloc(unsigned long flags, unsigned long init_access_rights)
46
-
{
47
-
return syscall(__NR_pkey_alloc, flags, init_access_rights);
48
-
}
49
-
50
-
static int sys_pkey_free(int pkey)
51
-
{
52
-
return syscall(__NR_pkey_free, pkey);
53
-
}
54
63
55
64
static int increase_core_file_limit(void)
56
65
{
+1
-25
tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c
+1
-25
tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c
···
7
7
*/
8
8
#include "ptrace.h"
9
9
#include "child.h"
10
-
11
-
#ifndef __NR_pkey_alloc
12
-
#define __NR_pkey_alloc 384
13
-
#endif
14
-
15
-
#ifndef __NR_pkey_free
16
-
#define __NR_pkey_free 385
17
-
#endif
18
-
19
-
#ifndef NT_PPC_PKEY
20
-
#define NT_PPC_PKEY 0x110
21
-
#endif
22
-
23
-
#ifndef PKEY_DISABLE_EXECUTE
24
-
#define PKEY_DISABLE_EXECUTE 0x4
25
-
#endif
26
-
27
-
#define AMR_BITS_PER_PKEY 2
28
-
#define PKEY_REG_BITS (sizeof(u64) * 8)
29
-
#define pkeyshift(pkey) (PKEY_REG_BITS - ((pkey + 1) * AMR_BITS_PER_PKEY))
10
+
#include "pkeys.h"
30
11
31
12
static const char user_read[] = "[User Read (Running)]";
32
13
static const char user_write[] = "[User Write (Running)]";
···
41
60
unsigned long invalid_iamr;
42
61
unsigned long invalid_uamor;
43
62
};
44
-
45
-
static int sys_pkey_alloc(unsigned long flags, unsigned long init_access_rights)
46
-
{
47
-
return syscall(__NR_pkey_alloc, flags, init_access_rights);
48
-
}
49
63
50
64
static int child(struct shared_info *info)
51
65
{
+1
-1
tools/testing/selftests/powerpc/vphn/test-vphn.c
+1
-1
tools/testing/selftests/powerpc/vphn/test-vphn.c