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drm/xe: Move struct xe_ggtt to xe_ggtt.c

No users left outside of xe_ggtt.c, so we can make the struct private.

This prevents us from accidentally touching it before init.

Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patch.msgid.link/20260206112108.1453809-10-dev@lankhorst.se
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>

+58 -58
+55
drivers/gpu/drm/xe/xe_ggtt.c
··· 84 84 bool invalidate_on_remove; 85 85 }; 86 86 87 + /** 88 + * struct xe_ggtt_pt_ops - GGTT Page table operations 89 + * Which can vary from platform to platform. 90 + */ 91 + struct xe_ggtt_pt_ops { 92 + /** @pte_encode_flags: Encode PTE flags for a given BO */ 93 + u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index); 94 + 95 + /** @ggtt_set_pte: Directly write into GGTT's PTE */ 96 + xe_ggtt_set_pte_fn ggtt_set_pte; 97 + 98 + /** @ggtt_get_pte: Directly read from GGTT's PTE */ 99 + u64 (*ggtt_get_pte)(struct xe_ggtt *ggtt, u64 addr); 100 + }; 101 + 102 + /** 103 + * struct xe_ggtt - Main GGTT struct 104 + * 105 + * In general, each tile can contains its own Global Graphics Translation Table 106 + * (GGTT) instance. 107 + */ 108 + struct xe_ggtt { 109 + /** @tile: Back pointer to tile where this GGTT belongs */ 110 + struct xe_tile *tile; 111 + /** @start: Start offset of GGTT */ 112 + u64 start; 113 + /** @size: Total usable size of this GGTT */ 114 + u64 size; 115 + 116 + #define XE_GGTT_FLAGS_64K BIT(0) 117 + /** 118 + * @flags: Flags for this GGTT 119 + * Acceptable flags: 120 + * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K. 121 + */ 122 + unsigned int flags; 123 + /** @scratch: Internal object allocation used as a scratch page */ 124 + struct xe_bo *scratch; 125 + /** @lock: Mutex lock to protect GGTT data */ 126 + struct mutex lock; 127 + /** 128 + * @gsm: The iomem pointer to the actual location of the translation 129 + * table located in the GSM for easy PTE manipulation 130 + */ 131 + u64 __iomem *gsm; 132 + /** @pt_ops: Page Table operations per platform */ 133 + const struct xe_ggtt_pt_ops *pt_ops; 134 + /** @mm: The memory manager used to manage individual GGTT allocations */ 135 + struct drm_mm mm; 136 + /** @access_count: counts GGTT writes */ 137 + unsigned int access_count; 138 + /** @wq: Dedicated unordered work queue to process node removals */ 139 + struct workqueue_struct *wq; 140 + }; 141 + 87 142 static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index) 88 143 { 89 144 u64 pte = XE_PAGE_PRESENT;
+1
drivers/gpu/drm/xe/xe_ggtt.h
··· 9 9 #include "xe_ggtt_types.h" 10 10 11 11 struct drm_printer; 12 + struct xe_bo; 12 13 struct xe_tile; 13 14 struct drm_exec; 14 15
+2 -58
drivers/gpu/drm/xe/xe_ggtt_types.h
··· 6 6 #ifndef _XE_GGTT_TYPES_H_ 7 7 #define _XE_GGTT_TYPES_H_ 8 8 9 + #include <linux/types.h> 9 10 #include <drm/drm_mm.h> 10 11 11 - #include "xe_pt_types.h" 12 - 13 - struct xe_bo; 12 + struct xe_ggtt; 14 13 struct xe_ggtt_node; 15 - struct xe_gt; 16 - 17 - /** 18 - * struct xe_ggtt - Main GGTT struct 19 - * 20 - * In general, each tile can contains its own Global Graphics Translation Table 21 - * (GGTT) instance. 22 - */ 23 - struct xe_ggtt { 24 - /** @tile: Back pointer to tile where this GGTT belongs */ 25 - struct xe_tile *tile; 26 - /** @start: Start offset of GGTT */ 27 - u64 start; 28 - /** @size: Total usable size of this GGTT */ 29 - u64 size; 30 - 31 - #define XE_GGTT_FLAGS_64K BIT(0) 32 - /** 33 - * @flags: Flags for this GGTT 34 - * Acceptable flags: 35 - * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K. 36 - */ 37 - unsigned int flags; 38 - /** @scratch: Internal object allocation used as a scratch page */ 39 - struct xe_bo *scratch; 40 - /** @lock: Mutex lock to protect GGTT data */ 41 - struct mutex lock; 42 - /** 43 - * @gsm: The iomem pointer to the actual location of the translation 44 - * table located in the GSM for easy PTE manipulation 45 - */ 46 - u64 __iomem *gsm; 47 - /** @pt_ops: Page Table operations per platform */ 48 - const struct xe_ggtt_pt_ops *pt_ops; 49 - /** @mm: The memory manager used to manage individual GGTT allocations */ 50 - struct drm_mm mm; 51 - /** @access_count: counts GGTT writes */ 52 - unsigned int access_count; 53 - /** @wq: Dedicated unordered work queue to process node removals */ 54 - struct workqueue_struct *wq; 55 - }; 56 14 57 15 typedef void (*xe_ggtt_set_pte_fn)(struct xe_ggtt *ggtt, u64 addr, u64 pte); 58 16 typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt, 59 17 struct xe_ggtt_node *node, 60 18 u64 pte_flags, 61 19 xe_ggtt_set_pte_fn set_pte, void *arg); 62 - /** 63 - * struct xe_ggtt_pt_ops - GGTT Page table operations 64 - * Which can vary from platform to platform. 65 - */ 66 - struct xe_ggtt_pt_ops { 67 - /** @pte_encode_flags: Encode PTE flags for a given BO */ 68 - u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index); 69 - 70 - /** @ggtt_set_pte: Directly write into GGTT's PTE */ 71 - xe_ggtt_set_pte_fn ggtt_set_pte; 72 - 73 - /** @ggtt_get_pte: Directly read from GGTT's PTE */ 74 - u64 (*ggtt_get_pte)(struct xe_ggtt *ggtt, u64 addr); 75 - }; 76 20 77 21 #endif