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crypto: stm32/cryp - reorder hw initialization

The CRYP IP checks the written key depending of the configuration, it's
safer to write the whole configuration to hardware then the key to avoid
unexpected key rejection.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Nicolas Toromanoff and committed by
Herbert Xu
95fe2253 4b898d5c

+28 -15
+28 -15
drivers/crypto/stm32/stm32-cryp.c
··· 232 232 !(status & SR_BUSY), 10, 100000); 233 233 } 234 234 235 + static inline void stm32_cryp_enable(struct stm32_cryp *cryp) 236 + { 237 + writel_relaxed(readl_relaxed(cryp->regs + CRYP_CR) | CR_CRYPEN, cryp->regs + CRYP_CR); 238 + } 239 + 235 240 static inline int stm32_cryp_wait_enable(struct stm32_cryp *cryp) 236 241 { 237 242 u32 status; ··· 539 534 /* Disable interrupt */ 540 535 stm32_cryp_write(cryp, CRYP_IMSCR, 0); 541 536 542 - /* Set key */ 543 - stm32_cryp_hw_write_key(cryp); 544 - 545 537 /* Set configuration */ 546 538 cfg = CR_DATA8 | CR_FFLUSH; 547 539 ··· 564 562 /* AES ECB/CBC decrypt: run key preparation first */ 565 563 if (is_decrypt(cryp) && 566 564 ((hw_mode == CR_AES_ECB) || (hw_mode == CR_AES_CBC))) { 567 - stm32_cryp_write(cryp, CRYP_CR, cfg | CR_AES_KP | CR_CRYPEN); 565 + /* Configure in key preparation mode */ 566 + stm32_cryp_write(cryp, CRYP_CR, cfg | CR_AES_KP); 568 567 568 + /* Set key only after full configuration done */ 569 + stm32_cryp_hw_write_key(cryp); 570 + 571 + /* Start prepare key */ 572 + stm32_cryp_enable(cryp); 569 573 /* Wait for end of processing */ 570 574 ret = stm32_cryp_wait_busy(cryp); 571 575 if (ret) { 572 576 dev_err(cryp->dev, "Timeout (key preparation)\n"); 573 577 return ret; 574 578 } 579 + 580 + cfg |= hw_mode | CR_DEC_NOT_ENC; 581 + 582 + /* Apply updated config (Decrypt + algo) and flush */ 583 + stm32_cryp_write(cryp, CRYP_CR, cfg); 584 + } else { 585 + cfg |= hw_mode; 586 + if (is_decrypt(cryp)) 587 + cfg |= CR_DEC_NOT_ENC; 588 + 589 + /* Apply config and flush */ 590 + stm32_cryp_write(cryp, CRYP_CR, cfg); 591 + 592 + /* Set key only after configuration done */ 593 + stm32_cryp_hw_write_key(cryp); 575 594 } 576 - 577 - cfg |= hw_mode; 578 - 579 - if (is_decrypt(cryp)) 580 - cfg |= CR_DEC_NOT_ENC; 581 - 582 - /* Apply config and flush (valid when CRYPEN = 0) */ 583 - stm32_cryp_write(cryp, CRYP_CR, cfg); 584 595 585 596 switch (hw_mode) { 586 597 case CR_AES_GCM: ··· 621 606 } 622 607 623 608 /* Enable now */ 624 - cfg |= CR_CRYPEN; 625 - 626 - stm32_cryp_write(cryp, CRYP_CR, cfg); 609 + stm32_cryp_enable(cryp); 627 610 628 611 return 0; 629 612 }