pinctrl: ocelot: Update alt mode reg addr calculation

Lan9645x is the first chip supported by this driver where the pin stride
is different from the alt mode stride. With 51 pins and up to 7 alt
modes, we have stride = 2 and alt_mode_stride = 3.

The current REG_ALT macro has the implicit assumption that these numbers
are equal, so it does not work for lan9645x.

The pin stride is the 'stride' variable in the driver. It is the size
of certain register groups which depends on the number of pins supported
by the device. Generally we have stride = DIV_ROUND_UP(npins, 32). E.g:

GPIO_OUT_SET0
GPIO_OUT_SET1
...
GPIO_OUT_SETn

The alt mode registers are further replicated by the number of bits
necessary to represent the alt mode. For instance if we need 3 bits to
represent the alt mode:

GPIO_ALT0[0-2]
GPIO_ALT1[0-2]

To set alt mode 3 on pin 12, it is necessary to perform writes

GPIO_ALT0[0] |= BIT(12)
GPIO_ALT0[1] |= BIT(12)
GPIO_ALT0[2] &= ~BIT(12)

The stride and alt mode stride are used by the REG_ALT macro to
calculate the alt mode register address for a given pin.

This adds the option to specify n_alt_modes, which is used to set
info->altm_stride. The default value is info->stride, to make sure
existing devices are unaffected by this change.

Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Reviewed-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>