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mips: drop GENERIC_IOMAP wrapper

All PIO on MIPS platforms is memory mapped, so there is no benefit in
the lib/iomap.c wrappers that switch between inb/outb and readb/writeb
style accessses.

In fact, the '#define PIO_RESERVED 0' setting completely disables
the GENERIC_IOMAP functionality, and the '#define PIO_OFFSET
mips_io_port_base' setting is based on a misunderstanding of what the
offset is meant to do.

MIPS started using GENERIC_IOMAP in 2018 with commit b962aeb02205 ("MIPS:
Use GENERIC_IOMAP") replacing a simple custom implementation of the same
interfaces, but at the time the asm-generic/io.h version was not usable
yet. Since the header is now always included, it's now possible to go
back to the even simpler version.

Use the normal GENERIC_PCI_IOMAP functionality for all mips platforms
without the hacky GENERIC_IOMAP, and provide a custom pci_iounmap()
for the CONFIG_PCI_DRIVERS_LEGACY case to ensure the I/O port base never
gets unmapped.

The readsl() prototype needs an extra 'const' keyword to make it
compatible with the generic ioread32_rep() alias.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Arnd Bergmann 976bf3ae 53a83845

+18 -14
+1 -1
arch/mips/Kconfig
··· 38 38 select GENERIC_CMOS_UPDATE 39 39 select GENERIC_CPU_AUTOPROBE 40 40 select GENERIC_GETTIMEOFDAY 41 - select GENERIC_IOMAP 42 41 select GENERIC_IRQ_PROBE 43 42 select GENERIC_IRQ_SHOW 44 43 select GENERIC_ISA_DMA if EISA ··· 46 47 select GENERIC_LIB_CMPDI2 47 48 select GENERIC_LIB_LSHRDI3 48 49 select GENERIC_LIB_UCMPDI2 50 + select GENERIC_PCI_IOMAP 49 51 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 50 52 select GENERIC_SMP_IDLE_THREAD 51 53 select GENERIC_IDLE_POLL_SETUP
+8 -13
arch/mips/include/asm/io.h
··· 67 67 } 68 68 69 69 /* 70 - * Provide the necessary definitions for generic iomap. We make use of 71 - * mips_io_port_base for iomap(), but we don't reserve any low addresses for 72 - * use with I/O ports. 73 - */ 74 - 75 - #define HAVE_ARCH_PIO_SIZE 76 - #define PIO_OFFSET mips_io_port_base 77 - #define PIO_MASK IO_SPACE_LIMIT 78 - #define PIO_RESERVED 0x0UL 79 - 80 - /* 81 70 * Enforce in-order execution of data I/O. In the MIPS architecture 82 71 * these are equivalent to corresponding platform-specific memory 83 72 * barriers defined in <asm/barrier.h>. API pinched from PowerPC, ··· 386 397 } \ 387 398 } \ 388 399 \ 389 - static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ 390 - unsigned int count) \ 400 + static inline void reads##bwlq(const volatile void __iomem *mem, \ 401 + void *addr, unsigned int count) \ 391 402 { \ 392 403 volatile type *__addr = addr; \ 393 404 \ ··· 543 554 #define outsl outsl 544 555 545 556 void __ioread64_copy(void *to, const void __iomem *from, size_t count); 557 + 558 + #ifdef CONFIG_PCI_DRIVERS_LEGACY 559 + struct pci_dev; 560 + void pci_iounmap(struct pci_dev *dev, void __iomem *addr); 561 + #define pci_iounmap pci_iounmap 562 + #endif 546 563 547 564 #include <asm-generic/io.h> 548 565
+9
arch/mips/lib/iomap-pci.c
··· 43 43 return (void __iomem *) (ctrl->io_map_base + port); 44 44 } 45 45 46 + void pci_iounmap(struct pci_dev *dev, void __iomem *addr) 47 + { 48 + struct pci_controller *ctrl = dev->bus->sysdata; 49 + void __iomem *base = (void __iomem *)ctrl->io_map_base; 50 + 51 + if (addr < base || addr > (base + resource_size(ctrl->io_resource))) 52 + iounmap(addr); 53 + } 54 + 46 55 #endif /* CONFIG_PCI_DRIVERS_LEGACY */