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net: ethernet: ti: am65-cpsw: Enable USXGMII mode for J7200 CPSW5G

TI's J7200 SoC supports USXGMII mode. Add USXGMII mode to the
extra_modes member of the J7200 SoC data.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://patch.msgid.link/20241010150543.2620448-1-s-vadapalli@ti.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

authored by

Siddharth Vadapalli and committed by
Paolo Abeni 97802ffc 1758af47

+2 -1
+2 -1
drivers/net/ethernet/ti/am65-cpsw-nuss.c
··· 3372 3372 .quirks = 0, 3373 3373 .ale_dev_id = "am64-cpswxg", 3374 3374 .fdqring_mode = K3_RINGACC_RING_MODE_RING, 3375 - .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), 3375 + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) | 3376 + BIT(PHY_INTERFACE_MODE_USXGMII), 3376 3377 }; 3377 3378 3378 3379 static const struct am65_cpsw_pdata j721e_cpswxg_pdata = {