Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
regulator: s2mps11: add S2MPG11 regulator
The S2MPG11 PMIC is a Power Management IC for mobile applications with
buck converters, various LDOs, power meters, and additional GPIO
interfaces. It typically complements an S2MPG10 PMIC in a main/sub
configuration as the sub-PMIC.
It has 12 buck, 1 buck-boost, and 15 LDO rails. Several of these can
either be controlled via software (register writes) or via external
signals, in particular by:
* input pins connected to a main processor's:
* GPIO pins
* other pins that are e.g. firmware- or power-domain-controlled
without explicit driver intervention
* a combination of input pins and register writes.
Control via input pins allows PMIC rails to be controlled by firmware,
e.g. during standby/suspend or as part of power domain handling where
otherwise that would not be possible. Additionally toggling a pin is
faster than register writes, and it also allows the PMIC to ensure that
any necessary timing requirements between rails are respected
automatically if multiple rails are to be enabled or disabled quasi
simultaneously.
This commit implements support for all these rails and control
combination.
Note1: For an externally controlled rail, the regulator_ops provide an
empty ::enable() and no ::disable() implementations, even though Linux
can not enable the rail and one might think ::enable could be NULL.
Without ops->enable(), the regulator core will assume enabling such a
rail failed, though, and in turn never add a reference to its parent
(supplier) rail. Once a different (Linux-controlled) sibling (consumer)
rail on that same parent rail gets disabled, the parent gets disabled
(cutting power to the externally controlled rail although it should
stay on), and the system will misbehave.
Note2: While external control via input pins appears to exist on other
versions of this PMIC, there is more flexibility in this version, in
particular there is a selection of input pins to choose from for each
rail (which must therefore be configured accordingly if in use),
whereas other versions don't have this flexibility.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://patch.msgid.link/20260122-s2mpg1x-regulators-v7-19-3b1f9831fffd@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
André Draszik
and committed by
Mark Brown
979dd8da
102dd11f
+301
-1
+301
-1
drivers/regulator/s2mps11.c
+301
-1
drivers/regulator/s2mps11.c
···
18
18
#include <linux/regulator/of_regulator.h>
19
19
#include <linux/mfd/samsung/core.h>
20
20
#include <linux/mfd/samsung/s2mpg10.h>
21
+
#include <linux/mfd/samsung/s2mpg11.h>
21
22
#include <linux/mfd/samsung/s2mps11.h>
22
23
#include <linux/mfd/samsung/s2mps13.h>
23
24
#include <linux/mfd/samsung/s2mps14.h>
···
438
437
[S2MPG10_EXTCTRL_LDO20M_EN2] = S2MPG10_PCTRLSEL_LDO20M_EN2,
439
438
[S2MPG10_EXTCTRL_LDO20M_EN] = S2MPG10_PCTRLSEL_LDO20M_EN,
440
439
};
440
+
static const u32 ext_control_s2mpg11[] = {
441
+
[S2MPG11_EXTCTRL_PWREN] = S2MPG10_PCTRLSEL_PWREN,
442
+
[S2MPG11_EXTCTRL_PWREN_MIF] = S2MPG10_PCTRLSEL_PWREN_MIF,
443
+
[S2MPG11_EXTCTRL_AP_ACTIVE_N] = S2MPG10_PCTRLSEL_AP_ACTIVE_N,
444
+
[S2MPG11_EXTCTRL_G3D_EN] = S2MPG10_PCTRLSEL_CPUCL1_EN,
445
+
[S2MPG11_EXTCTRL_G3D_EN2] = S2MPG10_PCTRLSEL_CPUCL1_EN2,
446
+
[S2MPG11_EXTCTRL_AOC_VDD] = S2MPG10_PCTRLSEL_CPUCL2_EN,
447
+
[S2MPG11_EXTCTRL_AOC_RET] = S2MPG10_PCTRLSEL_CPUCL2_EN2,
448
+
[S2MPG11_EXTCTRL_UFS_EN] = S2MPG10_PCTRLSEL_TPU_EN,
449
+
[S2MPG11_EXTCTRL_LDO13S_EN] = S2MPG10_PCTRLSEL_TPU_EN2,
450
+
};
441
451
u32 ext_control;
442
452
443
-
if (s2mps11->dev_type != S2MPG10)
453
+
if (s2mps11->dev_type != S2MPG10 && s2mps11->dev_type != S2MPG11)
444
454
return 0;
445
455
446
456
if (of_property_read_u32(np, "samsung,ext-control", &ext_control))
···
480
468
if (ext_control > ARRAY_SIZE(ext_control_s2mpg10))
481
469
return -EINVAL;
482
470
ext_control = ext_control_s2mpg10[ext_control];
471
+
break;
472
+
473
+
case S2MPG11:
474
+
switch (desc->id) {
475
+
case S2MPG11_BUCK1 ... S2MPG11_BUCK3:
476
+
case S2MPG11_BUCK5:
477
+
case S2MPG11_BUCK8:
478
+
case S2MPG11_BUCK9:
479
+
case S2MPG11_BUCKD:
480
+
case S2MPG11_BUCKA:
481
+
case S2MPG11_LDO1:
482
+
case S2MPG11_LDO2:
483
+
case S2MPG11_LDO8:
484
+
case S2MPG11_LDO13:
485
+
if (ext_control > S2MPG11_EXTCTRL_LDO13S_EN)
486
+
return -EINVAL;
487
+
break;
488
+
489
+
default:
490
+
return -EINVAL;
491
+
}
492
+
493
+
if (ext_control > ARRAY_SIZE(ext_control_s2mpg11))
494
+
return -EINVAL;
495
+
ext_control = ext_control_s2mpg11[ext_control];
483
496
break;
484
497
485
498
default:
···
544
507
545
508
switch (s2mps11->dev_type) {
546
509
case S2MPG10:
510
+
case S2MPG11:
547
511
s2mpg10_desc = to_s2mpg10_regulator_desc(rdev->desc);
548
512
break;
549
513
···
643
605
return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV,
644
606
ramp_reg,
645
607
rdev->desc->ramp_mask);
608
+
}
609
+
610
+
static int s2mpg11_regulator_buck_set_voltage_time(struct regulator_dev *rdev,
611
+
int old_uV, int new_uV)
612
+
{
613
+
unsigned int ramp_mask;
614
+
615
+
ramp_mask = rdev->desc->ramp_mask;
616
+
if (old_uV > new_uV)
617
+
/* The downwards mask is at a different position. */
618
+
ramp_mask >>= 2;
619
+
620
+
return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV,
621
+
rdev->desc->ramp_reg,
622
+
ramp_mask);
646
623
}
647
624
648
625
/*
···
1018
965
s2mpg10_regulator_desc_ldo(29, "vinl12m", s2mpg10_ldo_vranges2),
1019
966
s2mpg10_regulator_desc_ldo(30, "vinl13m", s2mpg10_ldo_vranges2),
1020
967
s2mpg10_regulator_desc_ldo(31, "vinl11m", s2mpg10_ldo_vranges2)
968
+
};
969
+
970
+
static const struct regulator_ops s2mpg11_reg_buck_ops[] = {
971
+
[S2MPG10_REGULATOR_OPS_STD] = {
972
+
.list_voltage = regulator_list_voltage_linear_range,
973
+
.map_voltage = regulator_map_voltage_linear_range,
974
+
.is_enabled = regulator_is_enabled_regmap,
975
+
.enable = regulator_enable_regmap,
976
+
.disable = regulator_disable_regmap,
977
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
978
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
979
+
.set_voltage_time = s2mpg11_regulator_buck_set_voltage_time,
980
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
981
+
.enable_time = s2mpg10_regulator_buck_enable_time,
982
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
983
+
},
984
+
[S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
985
+
.list_voltage = regulator_list_voltage_linear_range,
986
+
.map_voltage = regulator_map_voltage_linear_range,
987
+
.enable = s2mpg10_regulator_enable_nop,
988
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
989
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
990
+
.set_voltage_time = s2mpg11_regulator_buck_set_voltage_time,
991
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
992
+
.enable_time = s2mpg10_regulator_buck_enable_time,
993
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
994
+
}
995
+
};
996
+
997
+
#define s2mpg11_buck_to_ramp_mask(n) (GENMASK(3, 2) << (((n) % 2) * 4))
998
+
999
+
#define regulator_desc_s2mpg11_buckx(_name, _id, _supply, _vrange, \
1000
+
_vsel_reg, _en_reg, _en_mask, _r_reg) \
1001
+
regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, \
1002
+
s2mpg11_reg_buck_ops, _vrange, \
1003
+
S2MPG11_PMIC_##_vsel_reg, GENMASK(7, 0), \
1004
+
S2MPG11_PMIC_##_en_reg, _en_mask, \
1005
+
S2MPG11_PMIC_##_r_reg, \
1006
+
s2mpg11_buck_to_ramp_mask(_id - S2MPG11_BUCK1), \
1007
+
s2mpg10_buck_ramp_table, \
1008
+
ARRAY_SIZE(s2mpg10_buck_ramp_table), 30)
1009
+
1010
+
#define s2mpg11_regulator_desc_buck_xm(_num, _vrange, _vsel_reg_sfx, \
1011
+
_en_mask, _r_reg, _en_rrate) \
1012
+
.desc = regulator_desc_s2mpg11_buckx(#_num"s", \
1013
+
S2MPG11_BUCK##_num, "vinb"#_num"s", \
1014
+
_vrange, \
1015
+
B##_num##S_##_vsel_reg_sfx, \
1016
+
B##_num##S_CTRL, _en_mask, \
1017
+
_r_reg), \
1018
+
.enable_ramp_rate = _en_rrate
1019
+
1020
+
#define s2mpg11_regulator_desc_buck_cm(_num, _vrange, _vsel_reg_sfx, \
1021
+
_en_mask, _r_reg) \
1022
+
[S2MPG11_BUCK##_num] = { \
1023
+
s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
1024
+
_vsel_reg_sfx, _en_mask, _r_reg, 12500), \
1025
+
}
1026
+
1027
+
#define s2mpg11_regulator_desc_buckn_cm_gpio(_num, _vrange, \
1028
+
_vsel_reg_sfx, _en_mask, _r_reg, _pc_reg, _pc_mask) \
1029
+
[S2MPG11_BUCK##_num] = { \
1030
+
s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
1031
+
_vsel_reg_sfx, _en_mask, _r_reg, 12500), \
1032
+
.pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \
1033
+
.pctrlsel_mask = _pc_mask, \
1034
+
}
1035
+
1036
+
#define s2mpg11_regulator_desc_buck_vm(_num, _vrange, _vsel_reg_sfx, \
1037
+
_en_mask, _r_reg) \
1038
+
[S2MPG11_BUCK##_num] = { \
1039
+
s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
1040
+
_vsel_reg_sfx, _en_mask, _r_reg, 25000), \
1041
+
}
1042
+
1043
+
#define s2mpg11_regulator_desc_bucka(_num, _num_lower, _r_reg, \
1044
+
_pc_reg, _pc_mask) \
1045
+
[S2MPG11_BUCK##_num] = { \
1046
+
.desc = regulator_desc_s2mpg11_buckx(#_num_lower, \
1047
+
S2MPG11_BUCK##_num, "vinb"#_num_lower, \
1048
+
s2mpg11_buck_vranges##_num_lower, \
1049
+
BUCK##_num##_OUT, \
1050
+
BUCK##_num##_CTRL, GENMASK(7, 6), \
1051
+
_r_reg), \
1052
+
.enable_ramp_rate = 25000, \
1053
+
.pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \
1054
+
.pctrlsel_mask = _pc_mask, \
1055
+
}
1056
+
1057
+
#define s2mpg11_regulator_desc_buckboost() \
1058
+
[S2MPG11_BUCKBOOST] = { \
1059
+
.desc = regulator_desc_s2mpg1x_buck_cmn("boost", \
1060
+
S2MPG11_BUCKBOOST, "vinbb", \
1061
+
s2mpg10_reg_ldo_ops, \
1062
+
s2mpg11_buck_vrangesboost, \
1063
+
S2MPG11_PMIC_BB_OUT1, GENMASK(6, 0), \
1064
+
S2MPG11_PMIC_BB_CTRL, BIT(7), \
1065
+
0, 0, NULL, 0, 35), \
1066
+
.enable_ramp_rate = 17500, \
1067
+
}
1068
+
1069
+
#define s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _ops, \
1070
+
_vrange, _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \
1071
+
_ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \
1072
+
_pc_reg, _pc_mask) \
1073
+
[S2MPG11_LDO##_num] = { \
1074
+
.desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "s", \
1075
+
S2MPG11_LDO##_num, _supply, _ops, \
1076
+
_vrange, \
1077
+
S2MPG11_PMIC_L##_num##S_##_vsel_reg_sfx, \
1078
+
_vsel_mask, \
1079
+
S2MPG11_PMIC_##_en_reg, _en_mask, \
1080
+
_ramp_delay, _r_reg, _r_mask, _r_table, \
1081
+
_r_table_sz), \
1082
+
.pctrlsel_reg = _pc_reg, \
1083
+
.pctrlsel_mask = _pc_mask, \
1084
+
}
1085
+
1086
+
/* standard LDO via LxM_CTRL */
1087
+
#define s2mpg11_regulator_desc_ldo(_num, _supply, _vrange) \
1088
+
s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
1089
+
s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
1090
+
L##_num##S_CTRL, BIT(7), \
1091
+
0, 0, 0, NULL, 0, \
1092
+
0, 0)
1093
+
1094
+
/* standard LDO but possibly GPIO controlled */
1095
+
#define s2mpg11_regulator_desc_ldo_gpio(_num, _supply, _vrange, \
1096
+
_pc_reg, _pc_mask) \
1097
+
s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
1098
+
s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
1099
+
L##_num##S_CTRL, GENMASK(7, 6), \
1100
+
0, 0, 0, NULL, 0, \
1101
+
S2MPG11_PMIC_##_pc_reg, _pc_mask)
1102
+
1103
+
/* LDO with ramp support and possibly GPIO controlled */
1104
+
#define s2mpg11_regulator_desc_ldo_ramp(_num, _supply, _vrange, \
1105
+
_en_mask, _r_reg, _pc_reg, _pc_mask) \
1106
+
s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
1107
+
s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \
1108
+
LDO_CTRL1, _en_mask, \
1109
+
6250, S2MPG11_PMIC_##_r_reg, GENMASK(1, 0), \
1110
+
s2mpg10_ldo_ramp_table, \
1111
+
ARRAY_SIZE(s2mpg10_ldo_ramp_table), \
1112
+
S2MPG11_PMIC_##_pc_reg, _pc_mask)
1113
+
1114
+
/* voltage range for s2mpg11 BUCK 1, 2, 3, 4, 8, 9, 10 */
1115
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV);
1116
+
1117
+
/* voltage range for s2mpg11 BUCK 5 */
1118
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 5, 200000, 400000, 1300000, STEP_6_25_MV);
1119
+
1120
+
/* voltage range for s2mpg11 BUCK 6 */
1121
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 6, 200000, 1000000, 1500000, STEP_6_25_MV);
1122
+
1123
+
/* voltage range for s2mpg11 BUCK 7 */
1124
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 7, 600000, 1500000, 2200000, STEP_12_5_MV);
1125
+
1126
+
/* voltage range for s2mpg11 BUCK D */
1127
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, d, 600000, 2400000, 3300000, STEP_12_5_MV);
1128
+
1129
+
/* voltage range for s2mpg11 BUCK A */
1130
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, a, 600000, 1700000, 2100000, STEP_12_5_MV);
1131
+
1132
+
/* voltage range for s2mpg11 BUCK BOOST */
1133
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, boost,
1134
+
2600000, 3000000, 3600000, STEP_12_5_MV);
1135
+
1136
+
/* voltage range for s2mpg11 LDO 1, 2 */
1137
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 1, 300000, 450000, 950000, STEP_12_5_MV);
1138
+
1139
+
/* voltage range for s2mpg11 LDO 3, 7, 10, 11, 12, 14, 15 */
1140
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 3, 700000, 1600000, 1950000, STEP_25_MV);
1141
+
1142
+
/* voltage range for s2mpg11 LDO 4, 6 */
1143
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 4, 1800000, 2500000, 3300000, STEP_25_MV);
1144
+
1145
+
/* voltage range for s2mpg11 LDO 5 */
1146
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 5, 1600000, 1600000, 1950000, STEP_12_5_MV);
1147
+
1148
+
/* voltage range for s2mpg11 LDO 8 */
1149
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 8, 979600, 1130400, 1281200, 5800);
1150
+
1151
+
/* voltage range for s2mpg11 LDO 9 */
1152
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 9, 725000, 725000, 1300000, STEP_12_5_MV);
1153
+
1154
+
/* voltage range for s2mpg11 LDO 13 */
1155
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 13, 1800000, 1800000, 3350000, STEP_25_MV);
1156
+
1157
+
static const struct s2mpg10_regulator_desc s2mpg11_regulators[] = {
1158
+
s2mpg11_regulator_desc_buckboost(),
1159
+
s2mpg11_regulator_desc_buckn_cm_gpio(1, s2mpg11_buck_vranges1,
1160
+
OUT1, GENMASK(7, 6), DVS_RAMP1,
1161
+
PCTRLSEL1, GENMASK(3, 0)),
1162
+
s2mpg11_regulator_desc_buckn_cm_gpio(2, s2mpg11_buck_vranges1,
1163
+
OUT1, GENMASK(7, 6), DVS_RAMP1,
1164
+
PCTRLSEL1, GENMASK(7, 4)),
1165
+
s2mpg11_regulator_desc_buckn_cm_gpio(3, s2mpg11_buck_vranges1,
1166
+
OUT1, GENMASK(7, 6), DVS_RAMP2,
1167
+
PCTRLSEL2, GENMASK(3, 0)),
1168
+
s2mpg11_regulator_desc_buck_cm(4, s2mpg11_buck_vranges1,
1169
+
OUT, BIT(7), DVS_RAMP2),
1170
+
s2mpg11_regulator_desc_buckn_cm_gpio(5, s2mpg11_buck_vranges5,
1171
+
OUT, GENMASK(7, 6), DVS_RAMP3,
1172
+
PCTRLSEL2, GENMASK(7, 4)),
1173
+
s2mpg11_regulator_desc_buck_cm(6, s2mpg11_buck_vranges6,
1174
+
OUT1, BIT(7), DVS_RAMP3),
1175
+
s2mpg11_regulator_desc_buck_vm(7, s2mpg11_buck_vranges7,
1176
+
OUT1, BIT(7), DVS_RAMP4),
1177
+
s2mpg11_regulator_desc_buckn_cm_gpio(8, s2mpg11_buck_vranges1,
1178
+
OUT1, GENMASK(7, 6), DVS_RAMP4,
1179
+
PCTRLSEL3, GENMASK(3, 0)),
1180
+
s2mpg11_regulator_desc_buckn_cm_gpio(9, s2mpg11_buck_vranges1,
1181
+
OUT1, GENMASK(7, 6), DVS_RAMP5,
1182
+
PCTRLSEL3, GENMASK(7, 4)),
1183
+
s2mpg11_regulator_desc_buck_cm(10, s2mpg11_buck_vranges1,
1184
+
OUT, BIT(7), DVS_RAMP5),
1185
+
s2mpg11_regulator_desc_bucka(D, d, DVS_RAMP6, PCTRLSEL4, GENMASK(3, 0)),
1186
+
s2mpg11_regulator_desc_bucka(A, a, DVS_RAMP6, PCTRLSEL4, GENMASK(7, 4)),
1187
+
s2mpg11_regulator_desc_ldo_ramp(1, "vinl1s", s2mpg11_ldo_vranges1,
1188
+
GENMASK(5, 4), DVS_SYNC_CTRL1,
1189
+
PCTRLSEL5, GENMASK(3, 0)),
1190
+
s2mpg11_regulator_desc_ldo_ramp(2, "vinl1s", s2mpg11_ldo_vranges1,
1191
+
GENMASK(7, 6), DVS_SYNC_CTRL2,
1192
+
PCTRLSEL5, GENMASK(7, 4)),
1193
+
s2mpg11_regulator_desc_ldo(3, "vinl3s", s2mpg11_ldo_vranges3),
1194
+
s2mpg11_regulator_desc_ldo(4, "vinl5s", s2mpg11_ldo_vranges4),
1195
+
s2mpg11_regulator_desc_ldo(5, "vinl3s", s2mpg11_ldo_vranges5),
1196
+
s2mpg11_regulator_desc_ldo(6, "vinl5s", s2mpg11_ldo_vranges4),
1197
+
s2mpg11_regulator_desc_ldo(7, "vinl3s", s2mpg11_ldo_vranges3),
1198
+
s2mpg11_regulator_desc_ldo_gpio(8, "vinl2s", s2mpg11_ldo_vranges8,
1199
+
PCTRLSEL6, GENMASK(3, 0)),
1200
+
s2mpg11_regulator_desc_ldo(9, "vinl2s", s2mpg11_ldo_vranges9),
1201
+
s2mpg11_regulator_desc_ldo(10, "vinl4s", s2mpg11_ldo_vranges3),
1202
+
s2mpg11_regulator_desc_ldo(11, "vinl4s", s2mpg11_ldo_vranges3),
1203
+
s2mpg11_regulator_desc_ldo(12, "vinl4s", s2mpg11_ldo_vranges3),
1204
+
s2mpg11_regulator_desc_ldo_gpio(13, "vinl6s", s2mpg11_ldo_vranges13,
1205
+
PCTRLSEL6, GENMASK(7, 4)),
1206
+
s2mpg11_regulator_desc_ldo(14, "vinl4s", s2mpg11_ldo_vranges3),
1207
+
s2mpg11_regulator_desc_ldo(15, "vinl3s", s2mpg11_ldo_vranges3)
1021
1208
};
1022
1209
1023
1210
static const struct regulator_ops s2mps11_ldo_ops = {
···
2144
1851
break;
2145
1852
2146
1853
case S2MPG10:
1854
+
case S2MPG11:
2147
1855
/*
2148
1856
* If desc.enable_val is != 0, then external control was
2149
1857
* requested. We can not test s2mpg10_desc::ext_control,
···
2184
1890
rdev_num = ARRAY_SIZE(s2mpg10_regulators);
2185
1891
s2mpg1x_regulators = s2mpg10_regulators;
2186
1892
BUILD_BUG_ON(ARRAY_SIZE(s2mpg10_regulators) > S2MPS_REGULATOR_MAX);
1893
+
break;
1894
+
case S2MPG11:
1895
+
rdev_num = ARRAY_SIZE(s2mpg11_regulators);
1896
+
s2mpg1x_regulators = s2mpg11_regulators;
1897
+
BUILD_BUG_ON(ARRAY_SIZE(s2mpg11_regulators) > S2MPS_REGULATOR_MAX);
2187
1898
break;
2188
1899
case S2MPS11X:
2189
1900
rdev_num = ARRAY_SIZE(s2mps11_regulators);
···
2270
1971
2271
1972
static const struct platform_device_id s2mps11_pmic_id[] = {
2272
1973
{ "s2mpg10-regulator", S2MPG10},
1974
+
{ "s2mpg11-regulator", S2MPG11},
2273
1975
{ "s2mps11-regulator", S2MPS11X},
2274
1976
{ "s2mps13-regulator", S2MPS13X},
2275
1977
{ "s2mps14-regulator", S2MPS14X},