tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/i915/dp_mst: Validate compressed bpp vs. platform restrictions

Atm TGL supports only a fixed set of valid DSC compressed bpps
(6,8,10,12,15), but this is not taken into account while looking for a
bpp in the minimum..maximum compressed bpp range.

This happened to work only by chance since atm from the above min..max
range it's always the maximum bpp that is selected, which is one of the
above valid bpps (see mst_stream_dsc_compute_link_config() ->
intel_dp_dsc_nearest_valid_bpp()). Before selecting a bpp however, the
bpp's BW requirement should be checked wrt. to the MST total link BW;
after doing that - in a follow-up change - the validity of any bpp in
the min..max range must be ensured before the bpp is selected, do that
here.

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250509180340.554867-4-imre.deak@intel.com

Imre Deak 97ae79d3 49a50054

+13 -3
+6 -3
drivers/gpu/drm/i915/display/intel_dp.c
··· 2111 2111 return fxp_q4_from_int(1) / incr; 2112 2112 } 2113 2113 2114 - /* Note: This is not universally usable! */ 2115 - static bool intel_dp_dsc_valid_bpp(struct intel_dp *intel_dp, int bpp_x16) 2114 + /* 2115 + * Note: for bpp_x16 to be valid it must be also within the source/sink's 2116 + * min..max bpp capability range. 2117 + */ 2118 + bool intel_dp_dsc_valid_compressed_bpp(struct intel_dp *intel_dp, int bpp_x16) 2116 2119 { 2117 2120 struct intel_display *display = to_intel_display(intel_dp); 2118 2121 int i; ··· 2179 2176 max_bpp_x16 = min(max_bpp_x16, fxp_q4_from_int(output_bpp) - bpp_step_x16); 2180 2177 2181 2178 for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { 2182 - if (!intel_dp_dsc_valid_bpp(intel_dp, bpp_x16)) 2179 + if (!intel_dp_dsc_valid_compressed_bpp(intel_dp, bpp_x16)) 2183 2180 continue; 2184 2181 2185 2182 ret = dsc_compute_link_config(intel_dp,
+1
drivers/gpu/drm/i915/display/intel_dp.h
··· 147 147 int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector, 148 148 const struct intel_crtc_state *pipe_config, 149 149 int bpc); 150 + bool intel_dp_dsc_valid_compressed_bpp(struct intel_dp *intel_dp, int bpp_x16); 150 151 u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, 151 152 int mode_clock, int mode_hdisplay, 152 153 int num_joined_pipes);
+6
drivers/gpu/drm/i915/display/intel_dp_mst.c
··· 310 310 311 311 drm_dbg_kms(display->drm, "Trying bpp " FXP_Q4_FMT "\n", FXP_Q4_ARGS(bpp_x16)); 312 312 313 + if (dsc && !intel_dp_dsc_valid_compressed_bpp(intel_dp, bpp_x16)) { 314 + /* SST must have validated the single bpp tried here already earlier. */ 315 + drm_WARN_ON(display->drm, !is_mst); 316 + continue; 317 + } 318 + 313 319 link_bpp_x16 = dsc ? bpp_x16 : 314 320 fxp_q4_from_int(intel_dp_output_bpp(crtc_state->output_format, 315 321 fxp_q4_to_int(bpp_x16)));