Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'ux500-dts-for-v6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt
Ux500 DTS file updates for the v6.13 kernel cycle:
- Add touchkeys to the Samsung Codina variants
- Re-work the Codina device tree for eMMC
* tag 'ux500-dts-for-v6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Reconfigure the MC2 eMMC interface
ARM: dts: ux500: Add touchkeys to Codinas
Link: https://lore.kernel.org/r/CACRpkda5rix2JLYpexXTeGqKBcHeWxZx7A49jYCCmDPU7CFLSA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+66
-11
+49
arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi
+49
arch/arm/boot/dts/st/ste-dbx5x0-pinctrl.dtsi
···
454
454
};
455
455
};
456
456
457
+
/* MC2 without feedback clock on A8 */
458
+
mc2_a_2_default: mc2_a_2_default {
459
+
default_mux {
460
+
function = "mc2";
461
+
groups = "mc2_a_2";
462
+
};
463
+
default_cfg1 {
464
+
pins = "GPIO128_A5"; /* CLK */
465
+
ste,config = <&out_lo>;
466
+
};
467
+
default_cfg2 {
468
+
pins =
469
+
"GPIO129_B4", /* CMD */
470
+
"GPIO131_A12", /* DAT0 */
471
+
"GPIO132_C10", /* DAT1 */
472
+
"GPIO133_B10", /* DAT2 */
473
+
"GPIO134_B9", /* DAT3 */
474
+
"GPIO135_A9", /* DAT4 */
475
+
"GPIO136_C7", /* DAT5 */
476
+
"GPIO137_A7", /* DAT6 */
477
+
"GPIO138_C5"; /* DAT7 */
478
+
ste,config = <&in_pu>;
479
+
};
480
+
};
481
+
457
482
mc2_a_1_sleep: mc2_a_1_sleep {
458
483
sleep_cfg1 {
459
484
pins = "GPIO128_A5"; /* CLK */
···
487
462
sleep_cfg2 {
488
463
pins =
489
464
"GPIO130_C8", /* FBCLK */
465
+
"GPIO129_B4"; /* CMD */
466
+
ste,config = <&in_wkup_pdis_en>;
467
+
};
468
+
sleep_cfg3 {
469
+
pins =
470
+
"GPIO131_A12", /* DAT0 */
471
+
"GPIO132_C10", /* DAT1 */
472
+
"GPIO133_B10", /* DAT2 */
473
+
"GPIO134_B9", /* DAT3 */
474
+
"GPIO135_A9", /* DAT4 */
475
+
"GPIO136_C7", /* DAT5 */
476
+
"GPIO137_A7", /* DAT6 */
477
+
"GPIO138_C5"; /* DAT7 */
478
+
ste,config = <&in_wkup_pdis>;
479
+
};
480
+
};
481
+
482
+
mc2_a_2_sleep: mc2_a_2_sleep {
483
+
sleep_cfg1 {
484
+
pins = "GPIO128_A5"; /* CLK */
485
+
ste,config = <&out_lo_wkup_pdis>;
486
+
};
487
+
sleep_cfg2 {
488
+
pins =
490
489
"GPIO129_B4"; /* CMD */
491
490
ste,config = <&in_wkup_pdis_en>;
492
491
};
+1
arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts
+1
arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts
+16
-11
arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts
+16
-11
arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts
···
451
451
no-sdio;
452
452
no-sd;
453
453
vmmc-supply = <&ldo_3v3_reg>;
454
+
vqmmc-supply = <&db8500_vsmps2_reg>;
454
455
pinctrl-names = "default", "sleep";
455
456
/*
456
-
* GPIO130 will be set to input no pull-up resulting in a resistor
457
-
* pulling the reset high and taking the memory out of reset.
457
+
* This muxing excludes the feedback clock on GPIO130
458
+
* which is instead used for reset of the eMMC.
459
+
* GPIO130 will be set to input no pull-up resulting in
460
+
* a resistor pulling the reset high and taking the
461
+
* memory out of reset.
458
462
*/
459
-
pinctrl-0 = <&mc2_a_1_default>;
460
-
pinctrl-1 = <&mc2_a_1_sleep>;
463
+
pinctrl-0 = <&mc2_a_2_default>;
464
+
pinctrl-1 = <&mc2_a_2_sleep>;
461
465
status = "okay";
462
466
};
463
467
···
648
644
touchscreen-size-y = <800>;
649
645
pinctrl-names = "default";
650
646
pinctrl-0 = <&tsp_default>;
647
+
linux,keycodes = <KEY_MENU>, <KEY_BACK>;
651
648
};
652
649
};
653
650
···
682
677
sdi2 {
683
678
/*
684
679
* This will make the resistor mounted in R0.0 pull up
685
-
* the reset line and take the eMMC out of reset. On
686
-
* R0.4 variants, GPIO130 should be set in GPIO mode and
687
-
* pulled down. (Not connected.)
680
+
* the reset line and take the eMMC out of reset so set to
681
+
* GPIO input mode, no pull-up. On R0.4 variants, GPIO130
682
+
* could be set in GPIO mode and pulled down. (Not connected.)
688
683
*/
689
-
mc2_a_1_default {
690
-
default_cfg2 {
691
-
pins = "GPIO130_C8"; /* FBCLK */
692
-
ste,config = <&in_nopull>;
684
+
mc2_a_2_default {
685
+
default_cfg3 {
686
+
pins = "GPIO130_C8"; /* RST_N */
687
+
ste,config = <&gpio_in_nopull>;
693
688
};
694
689
};
695
690
};