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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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perf: arm_pmuv3: Add new Cortex and C1 CPU PMUs

Add CPU PMU compatible strings for Cortex-A320, Cortex-A520AE,
Cortex-A720AE, and C1 Nano/Premium/Pro/Ultra.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>

authored by

Rob Herring (Arm) and committed by
Will Deacon 989b40b7 970e1e41

+14
+14
drivers/perf/arm_pmuv3.c
··· 1475 1475 1476 1476 PMUV3_INIT_SIMPLE(armv8_pmuv3) 1477 1477 1478 + PMUV3_INIT_SIMPLE(armv8_c1_nano) 1479 + PMUV3_INIT_SIMPLE(armv8_c1_premium) 1480 + PMUV3_INIT_SIMPLE(armv8_c1_pro) 1481 + PMUV3_INIT_SIMPLE(armv8_c1_ultra) 1478 1482 PMUV3_INIT_SIMPLE(armv8_cortex_a34) 1479 1483 PMUV3_INIT_SIMPLE(armv8_cortex_a55) 1480 1484 PMUV3_INIT_SIMPLE(armv8_cortex_a65) ··· 1486 1482 PMUV3_INIT_SIMPLE(armv8_cortex_a76) 1487 1483 PMUV3_INIT_SIMPLE(armv8_cortex_a77) 1488 1484 PMUV3_INIT_SIMPLE(armv8_cortex_a78) 1485 + PMUV3_INIT_SIMPLE(armv9_cortex_a320) 1489 1486 PMUV3_INIT_SIMPLE(armv9_cortex_a510) 1490 1487 PMUV3_INIT_SIMPLE(armv9_cortex_a520) 1488 + PMUV3_INIT_SIMPLE(armv9_cortex_a520ae) 1491 1489 PMUV3_INIT_SIMPLE(armv9_cortex_a710) 1492 1490 PMUV3_INIT_SIMPLE(armv9_cortex_a715) 1493 1491 PMUV3_INIT_SIMPLE(armv9_cortex_a720) 1492 + PMUV3_INIT_SIMPLE(armv9_cortex_a720ae) 1494 1493 PMUV3_INIT_SIMPLE(armv9_cortex_a725) 1495 1494 PMUV3_INIT_SIMPLE(armv8_cortex_x1) 1496 1495 PMUV3_INIT_SIMPLE(armv9_cortex_x2) ··· 1525 1518 1526 1519 static const struct of_device_id armv8_pmu_of_device_ids[] = { 1527 1520 {.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_pmu_init}, 1521 + {.compatible = "arm,c1-nano-pmu", .data = armv8_c1_nano_pmu_init}, 1522 + {.compatible = "arm,c1-premium-pmu", .data = armv8_c1_premium_pmu_init}, 1523 + {.compatible = "arm,c1-pro-pmu", .data = armv8_c1_pro_pmu_init}, 1524 + {.compatible = "arm,c1-ultra-pmu", .data = armv8_c1_ultra_pmu_init}, 1528 1525 {.compatible = "arm,cortex-a34-pmu", .data = armv8_cortex_a34_pmu_init}, 1529 1526 {.compatible = "arm,cortex-a35-pmu", .data = armv8_cortex_a35_pmu_init}, 1530 1527 {.compatible = "arm,cortex-a53-pmu", .data = armv8_cortex_a53_pmu_init}, ··· 1541 1530 {.compatible = "arm,cortex-a76-pmu", .data = armv8_cortex_a76_pmu_init}, 1542 1531 {.compatible = "arm,cortex-a77-pmu", .data = armv8_cortex_a77_pmu_init}, 1543 1532 {.compatible = "arm,cortex-a78-pmu", .data = armv8_cortex_a78_pmu_init}, 1533 + {.compatible = "arm,cortex-a320-pmu", .data = armv9_cortex_a320_pmu_init}, 1544 1534 {.compatible = "arm,cortex-a510-pmu", .data = armv9_cortex_a510_pmu_init}, 1545 1535 {.compatible = "arm,cortex-a520-pmu", .data = armv9_cortex_a520_pmu_init}, 1536 + {.compatible = "arm,cortex-a520ae-pmu", .data = armv9_cortex_a520ae_pmu_init}, 1546 1537 {.compatible = "arm,cortex-a710-pmu", .data = armv9_cortex_a710_pmu_init}, 1547 1538 {.compatible = "arm,cortex-a715-pmu", .data = armv9_cortex_a715_pmu_init}, 1548 1539 {.compatible = "arm,cortex-a720-pmu", .data = armv9_cortex_a720_pmu_init}, 1540 + {.compatible = "arm,cortex-a720ae-pmu", .data = armv9_cortex_a720ae_pmu_init}, 1549 1541 {.compatible = "arm,cortex-a725-pmu", .data = armv9_cortex_a725_pmu_init}, 1550 1542 {.compatible = "arm,cortex-x1-pmu", .data = armv8_cortex_x1_pmu_init}, 1551 1543 {.compatible = "arm,cortex-x2-pmu", .data = armv9_cortex_x2_pmu_init},