tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

net: ethernet: mtk_eth_soc: avoid writing to ESW registers on MT7628

The MT7628 has a fixed-link PHY and does not expose MAC control
registers. Writes to these registers only corrupt the ESW VLAN
configuration.

This patch explicitly registers no-op phylink_mac_ops for MT7628, as
after removing the invalid register accesses, the existing
phylink_mac_ops effectively become no-ops.

This code was introduced by commit 296c9120752b
("net: ethernet: mediatek: Add MT7628/88 SoC support")

Signed-off-by: Joris Vaisvila <joey@tinyisr.com>
Reviewed-by: Daniel Golle <daniel@makrotpia.org>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
Link: https://patch.msgid.link/20260226154547.68553-1-joey@tinyisr.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Joris Vaisvila and committed by
Jakub Kicinski 9a04d3b2 da89f2e3

+30 -4
+30 -4
drivers/net/ethernet/mediatek/mtk_eth_soc.c
··· 562 562 int val, ge_mode, err = 0; 563 563 u32 i; 564 564 565 - /* MT76x8 has no hardware settings between for the MAC */ 566 - if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && 567 - mac->interface != state->interface) { 565 + if (mac->interface != state->interface) { 568 566 /* Setup soc pin functions */ 569 567 switch (state->interface) { 570 568 case PHY_INTERFACE_MODE_TRGMII: ··· 952 954 .mac_link_up = mtk_mac_link_up, 953 955 .mac_disable_tx_lpi = mtk_mac_disable_tx_lpi, 954 956 .mac_enable_tx_lpi = mtk_mac_enable_tx_lpi, 957 + }; 958 + 959 + static void rt5350_mac_config(struct phylink_config *config, unsigned int mode, 960 + const struct phylink_link_state *state) 961 + { 962 + } 963 + 964 + static void rt5350_mac_link_down(struct phylink_config *config, unsigned int mode, 965 + phy_interface_t interface) 966 + { 967 + } 968 + 969 + static void rt5350_mac_link_up(struct phylink_config *config, 970 + struct phy_device *phy, 971 + unsigned int mode, phy_interface_t interface, 972 + int speed, int duplex, bool tx_pause, bool rx_pause) 973 + { 974 + } 975 + 976 + /* MT76x8 (rt5350-eth) does not expose any MAC control registers */ 977 + static const struct phylink_mac_ops rt5350_phylink_ops = { 978 + .mac_config = rt5350_mac_config, 979 + .mac_link_down = rt5350_mac_link_down, 980 + .mac_link_up = rt5350_mac_link_up, 955 981 }; 956 982 957 983 static void mtk_mdio_config(struct mtk_eth *eth) ··· 4793 4771 4794 4772 static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) 4795 4773 { 4774 + const struct phylink_mac_ops *mac_ops = &mtk_phylink_ops; 4796 4775 const __be32 *_id = of_get_property(np, "reg", NULL); 4797 4776 phy_interface_t phy_mode; 4798 4777 struct phylink *phylink; ··· 4928 4905 mac->phylink_config.supported_interfaces); 4929 4906 } 4930 4907 4908 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) 4909 + mac_ops = &rt5350_phylink_ops; 4910 + 4931 4911 phylink = phylink_create(&mac->phylink_config, 4932 4912 of_fwnode_handle(mac->of_node), 4933 - phy_mode, &mtk_phylink_ops); 4913 + phy_mode, mac_ops); 4934 4914 if (IS_ERR(phylink)) { 4935 4915 err = PTR_ERR(phylink); 4936 4916 goto free_netdev;