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iommu/amd: Introduce helper function amd_iommu_update_dte()

Which includes DTE update, clone_aliases, DTE flush and completion-wait
commands to avoid code duplication when reuse to setup DTE for nested
translation.

Also, make amd_iommu_update_dte() non-static to reuse in
in a new nested.c file for nested translation.

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

authored by

Suravee Suthikulpanit and committed by
Joerg Roedel 9b467a5a 11cfa782

+22 -6
+4
drivers/iommu/amd/amd_iommu.h
··· 190 190 struct dev_table_entry *get_dev_table(struct amd_iommu *iommu); 191 191 struct iommu_dev_data *search_dev_data(struct amd_iommu *iommu, u16 devid); 192 192 193 + void amd_iommu_update_dte(struct amd_iommu *iommu, 194 + struct iommu_dev_data *dev_data, 195 + struct dev_table_entry *new); 196 + 193 197 static inline void 194 198 amd_iommu_make_clear_dte(struct iommu_dev_data *dev_data, struct dev_table_entry *new) 195 199 {
+18 -6
drivers/iommu/amd/iommu.c
··· 76 76 struct iommu_dev_data *dev_data, 77 77 phys_addr_t top_paddr, unsigned int top_level); 78 78 79 + static int device_flush_dte(struct iommu_dev_data *dev_data); 80 + 79 81 static void amd_iommu_change_top(struct pt_iommu *iommu_table, 80 82 phys_addr_t top_paddr, unsigned int top_level); 81 83 ··· 87 85 static bool amd_iommu_enforce_cache_coherency(struct iommu_domain *domain); 88 86 static int amd_iommu_set_dirty_tracking(struct iommu_domain *domain, 89 87 bool enable); 88 + 89 + static void clone_aliases(struct amd_iommu *iommu, struct device *dev); 90 + 91 + static int iommu_completion_wait(struct amd_iommu *iommu); 90 92 91 93 /**************************************************************************** 92 94 * ··· 207 201 } 208 202 209 203 spin_unlock_irqrestore(&dev_data->dte_lock, flags); 204 + } 205 + 206 + void amd_iommu_update_dte(struct amd_iommu *iommu, 207 + struct iommu_dev_data *dev_data, 208 + struct dev_table_entry *new) 209 + { 210 + update_dte256(iommu, dev_data, new); 211 + clone_aliases(iommu, dev_data->dev); 212 + device_flush_dte(dev_data); 213 + iommu_completion_wait(iommu); 210 214 } 211 215 212 216 static void get_dte256(struct amd_iommu *iommu, struct iommu_dev_data *dev_data, ··· 2143 2127 2144 2128 set_dte_gcr3_table(iommu, dev_data, &new); 2145 2129 2146 - update_dte256(iommu, dev_data, &new); 2130 + amd_iommu_update_dte(iommu, dev_data, &new); 2147 2131 2148 2132 /* 2149 2133 * A kdump kernel might be replacing a domain ID that was copied from ··· 2163 2147 struct dev_table_entry new = {}; 2164 2148 2165 2149 amd_iommu_make_clear_dte(dev_data, &new); 2166 - update_dte256(iommu, dev_data, &new); 2150 + amd_iommu_update_dte(iommu, dev_data, &new); 2167 2151 } 2168 2152 2169 2153 /* Update and flush DTE for the given device */ ··· 2175 2159 set_dte_entry(iommu, dev_data, 0, 0); 2176 2160 else 2177 2161 clear_dte_entry(iommu, dev_data); 2178 - 2179 - clone_aliases(iommu, dev_data->dev); 2180 - device_flush_dte(dev_data); 2181 - iommu_completion_wait(iommu); 2182 2162 } 2183 2163 2184 2164 /*