Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 's390-5.7-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 fixes from Vasily Gorbik:
- Add missing R_390_JMP_SLOT relocation type in KASLR code.
- Fix set_huge_pte_at for empty ptes issue which has been uncovered
with arch page table helper tests.
- Correct initrd location for kdump kernel.
- Fix s390_mmio_read/write with MIO in PCI code.
* tag 's390-5.7-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
s390/kaslr: add support for R_390_JMP_SLOT relocation type
s390/mm: fix set_huge_pte_at() for empty ptes
s390/kexec_file: fix initrd location for kdump kernel
s390/pci: Fix s390_mmio_read/write with MIO
+227
-8
+8
-2
arch/s390/include/asm/pci_io.h
+8
-2
arch/s390/include/asm/pci_io.h
···
8
8
#include <linux/slab.h>
9
9
#include <asm/pci_insn.h>
10
10
11
+
/* I/O size constraints */
12
+
#define ZPCI_MAX_READ_SIZE 8
13
+
#define ZPCI_MAX_WRITE_SIZE 128
14
+
11
15
/* I/O Map */
12
16
#define ZPCI_IOMAP_SHIFT 48
13
17
#define ZPCI_IOMAP_ADDR_BASE 0x8000000000000000UL
···
144
140
145
141
while (n > 0) {
146
142
size = zpci_get_max_write_size((u64 __force) src,
147
-
(u64) dst, n, 8);
143
+
(u64) dst, n,
144
+
ZPCI_MAX_READ_SIZE);
148
145
rc = zpci_read_single(dst, src, size);
149
146
if (rc)
150
147
break;
···
166
161
167
162
while (n > 0) {
168
163
size = zpci_get_max_write_size((u64 __force) dst,
169
-
(u64) src, n, 128);
164
+
(u64) src, n,
165
+
ZPCI_MAX_WRITE_SIZE);
170
166
if (size > 8) /* main path */
171
167
rc = zpci_write_block(dst, src, size);
172
168
else
+1
-1
arch/s390/kernel/machine_kexec_file.c
+1
-1
arch/s390/kernel/machine_kexec_file.c
+1
arch/s390/kernel/machine_kexec_reloc.c
+1
arch/s390/kernel/machine_kexec_reloc.c
+6
-3
arch/s390/mm/hugetlbpage.c
+6
-3
arch/s390/mm/hugetlbpage.c
···
159
159
rste &= ~_SEGMENT_ENTRY_NOEXEC;
160
160
161
161
/* Set correct table type for 2G hugepages */
162
-
if ((pte_val(*ptep) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
163
-
rste |= _REGION_ENTRY_TYPE_R3 | _REGION3_ENTRY_LARGE;
164
-
else
162
+
if ((pte_val(*ptep) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) {
163
+
if (likely(pte_present(pte)))
164
+
rste |= _REGION3_ENTRY_LARGE;
165
+
rste |= _REGION_ENTRY_TYPE_R3;
166
+
} else if (likely(pte_present(pte)))
165
167
rste |= _SEGMENT_ENTRY_LARGE;
168
+
166
169
clear_huge_pte_skeys(mm, rste);
167
170
pte_val(*ptep) = rste;
168
171
}
+211
-2
arch/s390/pci/pci_mmio.c
+211
-2
arch/s390/pci/pci_mmio.c
···
11
11
#include <linux/mm.h>
12
12
#include <linux/errno.h>
13
13
#include <linux/pci.h>
14
+
#include <asm/pci_io.h>
15
+
#include <asm/pci_debug.h>
16
+
17
+
static inline void zpci_err_mmio(u8 cc, u8 status, u64 offset)
18
+
{
19
+
struct {
20
+
u64 offset;
21
+
u8 cc;
22
+
u8 status;
23
+
} data = {offset, cc, status};
24
+
25
+
zpci_err_hex(&data, sizeof(data));
26
+
}
27
+
28
+
static inline int __pcistb_mio_inuser(
29
+
void __iomem *ioaddr, const void __user *src,
30
+
u64 len, u8 *status)
31
+
{
32
+
int cc = -ENXIO;
33
+
34
+
asm volatile (
35
+
" sacf 256\n"
36
+
"0: .insn rsy,0xeb00000000d4,%[len],%[ioaddr],%[src]\n"
37
+
"1: ipm %[cc]\n"
38
+
" srl %[cc],28\n"
39
+
"2: sacf 768\n"
40
+
EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
41
+
: [cc] "+d" (cc), [len] "+d" (len)
42
+
: [ioaddr] "a" (ioaddr), [src] "Q" (*((u8 __force *)src))
43
+
: "cc", "memory");
44
+
*status = len >> 24 & 0xff;
45
+
return cc;
46
+
}
47
+
48
+
static inline int __pcistg_mio_inuser(
49
+
void __iomem *ioaddr, const void __user *src,
50
+
u64 ulen, u8 *status)
51
+
{
52
+
register u64 addr asm("2") = (u64 __force) ioaddr;
53
+
register u64 len asm("3") = ulen;
54
+
int cc = -ENXIO;
55
+
u64 val = 0;
56
+
u64 cnt = ulen;
57
+
u8 tmp;
58
+
59
+
/*
60
+
* copy 0 < @len <= 8 bytes from @src into the right most bytes of
61
+
* a register, then store it to PCI at @ioaddr while in secondary
62
+
* address space. pcistg then uses the user mappings.
63
+
*/
64
+
asm volatile (
65
+
" sacf 256\n"
66
+
"0: llgc %[tmp],0(%[src])\n"
67
+
" sllg %[val],%[val],8\n"
68
+
" aghi %[src],1\n"
69
+
" ogr %[val],%[tmp]\n"
70
+
" brctg %[cnt],0b\n"
71
+
"1: .insn rre,0xb9d40000,%[val],%[ioaddr]\n"
72
+
"2: ipm %[cc]\n"
73
+
" srl %[cc],28\n"
74
+
"3: sacf 768\n"
75
+
EX_TABLE(0b, 3b) EX_TABLE(1b, 3b) EX_TABLE(2b, 3b)
76
+
:
77
+
[src] "+a" (src), [cnt] "+d" (cnt),
78
+
[val] "+d" (val), [tmp] "=d" (tmp),
79
+
[len] "+d" (len), [cc] "+d" (cc),
80
+
[ioaddr] "+a" (addr)
81
+
:: "cc", "memory");
82
+
*status = len >> 24 & 0xff;
83
+
84
+
/* did we read everything from user memory? */
85
+
if (!cc && cnt != 0)
86
+
cc = -EFAULT;
87
+
88
+
return cc;
89
+
}
90
+
91
+
static inline int __memcpy_toio_inuser(void __iomem *dst,
92
+
const void __user *src, size_t n)
93
+
{
94
+
int size, rc = 0;
95
+
u8 status = 0;
96
+
mm_segment_t old_fs;
97
+
98
+
if (!src)
99
+
return -EINVAL;
100
+
101
+
old_fs = enable_sacf_uaccess();
102
+
while (n > 0) {
103
+
size = zpci_get_max_write_size((u64 __force) dst,
104
+
(u64 __force) src, n,
105
+
ZPCI_MAX_WRITE_SIZE);
106
+
if (size > 8) /* main path */
107
+
rc = __pcistb_mio_inuser(dst, src, size, &status);
108
+
else
109
+
rc = __pcistg_mio_inuser(dst, src, size, &status);
110
+
if (rc)
111
+
break;
112
+
src += size;
113
+
dst += size;
114
+
n -= size;
115
+
}
116
+
disable_sacf_uaccess(old_fs);
117
+
if (rc)
118
+
zpci_err_mmio(rc, status, (__force u64) dst);
119
+
return rc;
120
+
}
14
121
15
122
static long get_pfn(unsigned long user_addr, unsigned long access,
16
123
unsigned long *pfn)
···
153
46
154
47
if (length <= 0 || PAGE_SIZE - (mmio_addr & ~PAGE_MASK) < length)
155
48
return -EINVAL;
49
+
50
+
/*
51
+
* Only support read access to MIO capable devices on a MIO enabled
52
+
* system. Otherwise we would have to check for every address if it is
53
+
* a special ZPCI_ADDR and we would have to do a get_pfn() which we
54
+
* don't need for MIO capable devices.
55
+
*/
56
+
if (static_branch_likely(&have_mio)) {
57
+
ret = __memcpy_toio_inuser((void __iomem *) mmio_addr,
58
+
user_buffer,
59
+
length);
60
+
return ret;
61
+
}
62
+
156
63
if (length > 64) {
157
64
buf = kmalloc(length, GFP_KERNEL);
158
65
if (!buf)
···
177
56
ret = get_pfn(mmio_addr, VM_WRITE, &pfn);
178
57
if (ret)
179
58
goto out;
180
-
io_addr = (void __iomem *)((pfn << PAGE_SHIFT) | (mmio_addr & ~PAGE_MASK));
59
+
io_addr = (void __iomem *)((pfn << PAGE_SHIFT) |
60
+
(mmio_addr & ~PAGE_MASK));
181
61
182
62
ret = -EFAULT;
183
63
if ((unsigned long) io_addr < ZPCI_IOMAP_ADDR_BASE)
···
192
70
if (buf != local_buf)
193
71
kfree(buf);
194
72
return ret;
73
+
}
74
+
75
+
static inline int __pcilg_mio_inuser(
76
+
void __user *dst, const void __iomem *ioaddr,
77
+
u64 ulen, u8 *status)
78
+
{
79
+
register u64 addr asm("2") = (u64 __force) ioaddr;
80
+
register u64 len asm("3") = ulen;
81
+
u64 cnt = ulen;
82
+
int shift = ulen * 8;
83
+
int cc = -ENXIO;
84
+
u64 val, tmp;
85
+
86
+
/*
87
+
* read 0 < @len <= 8 bytes from the PCI memory mapped at @ioaddr (in
88
+
* user space) into a register using pcilg then store these bytes at
89
+
* user address @dst
90
+
*/
91
+
asm volatile (
92
+
" sacf 256\n"
93
+
"0: .insn rre,0xb9d60000,%[val],%[ioaddr]\n"
94
+
"1: ipm %[cc]\n"
95
+
" srl %[cc],28\n"
96
+
" ltr %[cc],%[cc]\n"
97
+
" jne 4f\n"
98
+
"2: ahi %[shift],-8\n"
99
+
" srlg %[tmp],%[val],0(%[shift])\n"
100
+
"3: stc %[tmp],0(%[dst])\n"
101
+
" aghi %[dst],1\n"
102
+
" brctg %[cnt],2b\n"
103
+
"4: sacf 768\n"
104
+
EX_TABLE(0b, 4b) EX_TABLE(1b, 4b) EX_TABLE(3b, 4b)
105
+
:
106
+
[cc] "+d" (cc), [val] "=d" (val), [len] "+d" (len),
107
+
[dst] "+a" (dst), [cnt] "+d" (cnt), [tmp] "=d" (tmp),
108
+
[shift] "+d" (shift)
109
+
:
110
+
[ioaddr] "a" (addr)
111
+
: "cc", "memory");
112
+
113
+
/* did we write everything to the user space buffer? */
114
+
if (!cc && cnt != 0)
115
+
cc = -EFAULT;
116
+
117
+
*status = len >> 24 & 0xff;
118
+
return cc;
119
+
}
120
+
121
+
static inline int __memcpy_fromio_inuser(void __user *dst,
122
+
const void __iomem *src,
123
+
unsigned long n)
124
+
{
125
+
int size, rc = 0;
126
+
u8 status;
127
+
mm_segment_t old_fs;
128
+
129
+
old_fs = enable_sacf_uaccess();
130
+
while (n > 0) {
131
+
size = zpci_get_max_write_size((u64 __force) src,
132
+
(u64 __force) dst, n,
133
+
ZPCI_MAX_READ_SIZE);
134
+
rc = __pcilg_mio_inuser(dst, src, size, &status);
135
+
if (rc)
136
+
break;
137
+
src += size;
138
+
dst += size;
139
+
n -= size;
140
+
}
141
+
disable_sacf_uaccess(old_fs);
142
+
if (rc)
143
+
zpci_err_mmio(rc, status, (__force u64) dst);
144
+
return rc;
195
145
}
196
146
197
147
SYSCALL_DEFINE3(s390_pci_mmio_read, unsigned long, mmio_addr,
···
280
86
281
87
if (length <= 0 || PAGE_SIZE - (mmio_addr & ~PAGE_MASK) < length)
282
88
return -EINVAL;
89
+
90
+
/*
91
+
* Only support write access to MIO capable devices on a MIO enabled
92
+
* system. Otherwise we would have to check for every address if it is
93
+
* a special ZPCI_ADDR and we would have to do a get_pfn() which we
94
+
* don't need for MIO capable devices.
95
+
*/
96
+
if (static_branch_likely(&have_mio)) {
97
+
ret = __memcpy_fromio_inuser(
98
+
user_buffer, (const void __iomem *)mmio_addr,
99
+
length);
100
+
return ret;
101
+
}
102
+
283
103
if (length > 64) {
284
104
buf = kmalloc(length, GFP_KERNEL);
285
105
if (!buf)
286
106
return -ENOMEM;
287
-
} else
107
+
} else {
288
108
buf = local_buf;
109
+
}
289
110
290
111
ret = get_pfn(mmio_addr, VM_READ, &pfn);
291
112
if (ret)