Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
- A revert of all SCPI changes from the 4.15 merge window. They had
regressions on the Amlogic platforms, and the submaintainer isn't
around to fix these bugs due to vacation, etc. So we agreed to revert
and revisit in next release cycle.
- A series fixing a number of bugs for ARM CCN interconnect, around
module unload, smp_processor_id() in preemptable context, and fixing
some memory allocation failure checks.
- A handful of devicetree fixes for different platforms, fixing
warnings and errors that were previously ignored by the compiler.
- The usual set of mostly minor fixes for different platforms.
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits)
ARM64: dts: meson-gx: fix UART pclk clock name
ARM: omap2: hide omap3_save_secure_ram on non-OMAP3 builds
arm: dts: nspire: Add missing #phy-cells to usb-nop-xceiv
ARM: dts: Fix dm814x missing phy-cells property
ARM: dts: Fix elm interrupt compiler warning
bus: arm-ccn: fix module unloading Error: Removing state 147 which has instances left.
bus: arm-cci: Fix use of smp_processor_id() in preemptible context
bus: arm-ccn: Fix use of smp_processor_id() in preemptible context
bus: arm-ccn: Simplify code
bus: arm-ccn: Check memory allocation failure
bus: arm-ccn: constify attribute_group structures.
firmware: arm_scpi: Revert updates made during v4.15 merge window
arm: dts: marvell: Add missing #phy-cells to usb-nop-xceiv
arm64: dts: sort vendor subdirectories in Makefile alphabetically
meson-gx-socinfo: Fix package id parsing
ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't"
ARM: dts: meson: fix the memory region of the GPIO interrupt controller
ARM: dts: meson: correct the sort order for the the gpio_intc node
MAINTAINERS: exclude other Socionext SoC DT files from ARM/UNIPHIER entry
arm64: dts: uniphier: remove unnecessary interrupt-parent
...
+276
-208
+2
Documentation/devicetree/bindings/usb/am33xx-usb.txt
+2
Documentation/devicetree/bindings/usb/am33xx-usb.txt
···
95
95
reg = <0x47401300 0x100>;
96
96
reg-names = "phy";
97
97
ti,ctrl_mod = <&ctrl_mod>;
98
+
#phy-cells = <0>;
98
99
};
99
100
100
101
usb0: usb@47401000 {
···
142
141
reg = <0x47401b00 0x100>;
143
142
reg-names = "phy";
144
143
ti,ctrl_mod = <&ctrl_mod>;
144
+
#phy-cells = <0>;
145
145
};
146
146
147
147
usb1: usb@47401800 {
+1
-1
MAINTAINERS
+1
-1
MAINTAINERS
···
2047
2047
F: arch/arm/include/asm/hardware/cache-uniphier.h
2048
2048
F: arch/arm/mach-uniphier/
2049
2049
F: arch/arm/mm/cache-uniphier.c
2050
-
F: arch/arm64/boot/dts/socionext/
2050
+
F: arch/arm64/boot/dts/socionext/uniphier*
2051
2051
F: drivers/bus/uniphier-system-bus.c
2052
2052
F: drivers/clk/uniphier/
2053
2053
F: drivers/gpio/gpio-uniphier.c
+2
arch/arm/boot/dts/am33xx.dtsi
+2
arch/arm/boot/dts/am33xx.dtsi
···
630
630
reg-names = "phy";
631
631
status = "disabled";
632
632
ti,ctrl_mod = <&usb_ctrl_mod>;
633
+
#phy-cells = <0>;
633
634
};
634
635
635
636
usb0: usb@47401000 {
···
679
678
reg-names = "phy";
680
679
status = "disabled";
681
680
ti,ctrl_mod = <&usb_ctrl_mod>;
681
+
#phy-cells = <0>;
682
682
};
683
683
684
684
usb1: usb@47401800 {
+4
-2
arch/arm/boot/dts/am4372.dtsi
+4
-2
arch/arm/boot/dts/am4372.dtsi
···
927
927
reg = <0x48038000 0x2000>,
928
928
<0x46000000 0x400000>;
929
929
reg-names = "mpu", "dat";
930
-
interrupts = <80>, <81>;
930
+
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
931
+
<GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
931
932
interrupt-names = "tx", "rx";
932
933
status = "disabled";
933
934
dmas = <&edma 8 2>,
···
942
941
reg = <0x4803C000 0x2000>,
943
942
<0x46400000 0x400000>;
944
943
reg-names = "mpu", "dat";
945
-
interrupts = <82>, <83>;
944
+
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
945
+
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
946
946
interrupt-names = "tx", "rx";
947
947
status = "disabled";
948
948
dmas = <&edma 10 2>,
+2
-2
arch/arm/boot/dts/am437x-cm-t43.dts
+2
-2
arch/arm/boot/dts/am437x-cm-t43.dts
+1
arch/arm/boot/dts/armada-385-db-ap.dts
+1
arch/arm/boot/dts/armada-385-db-ap.dts
+1
arch/arm/boot/dts/armada-385-linksys.dtsi
+1
arch/arm/boot/dts/armada-385-linksys.dtsi
+2
arch/arm/boot/dts/armada-385-synology-ds116.dts
+2
arch/arm/boot/dts/armada-385-synology-ds116.dts
···
191
191
usb3_0_phy: usb3_0_phy {
192
192
compatible = "usb-nop-xceiv";
193
193
vcc-supply = <®_usb3_0_vbus>;
194
+
#phy-cells = <0>;
194
195
};
195
196
196
197
usb3_1_phy: usb3_1_phy {
197
198
compatible = "usb-nop-xceiv";
198
199
vcc-supply = <®_usb3_1_vbus>;
200
+
#phy-cells = <0>;
199
201
};
200
202
201
203
reg_usb3_0_vbus: usb3-vbus0 {
+2
arch/arm/boot/dts/armada-388-gp.dts
+2
arch/arm/boot/dts/armada-388-gp.dts
···
276
276
usb2_1_phy: usb2_1_phy {
277
277
compatible = "usb-nop-xceiv";
278
278
vcc-supply = <®_usb2_1_vbus>;
279
+
#phy-cells = <0>;
279
280
};
280
281
281
282
usb3_phy: usb3_phy {
282
283
compatible = "usb-nop-xceiv";
283
284
vcc-supply = <®_usb3_vbus>;
285
+
#phy-cells = <0>;
284
286
};
285
287
286
288
reg_usb3_vbus: usb3-vbus {
+2
-2
arch/arm/boot/dts/bcm-nsp.dtsi
+2
-2
arch/arm/boot/dts/bcm-nsp.dtsi
···
85
85
timer@20200 {
86
86
compatible = "arm,cortex-a9-global-timer";
87
87
reg = <0x20200 0x100>;
88
-
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
88
+
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
89
89
clocks = <&periph_clk>;
90
90
};
91
91
···
93
93
compatible = "arm,cortex-a9-twd-timer";
94
94
reg = <0x20600 0x20>;
95
95
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
96
-
IRQ_TYPE_LEVEL_HIGH)>;
96
+
IRQ_TYPE_EDGE_RISING)>;
97
97
clocks = <&periph_clk>;
98
98
};
99
99
+1
arch/arm/boot/dts/bcm283x.dtsi
+1
arch/arm/boot/dts/bcm283x.dtsi
-4
arch/arm/boot/dts/bcm958623hr.dts
-4
arch/arm/boot/dts/bcm958623hr.dts
-4
arch/arm/boot/dts/bcm958625hr.dts
-4
arch/arm/boot/dts/bcm958625hr.dts
+2
arch/arm/boot/dts/dm814x.dtsi
+2
arch/arm/boot/dts/dm814x.dtsi
···
75
75
reg = <0x47401300 0x100>;
76
76
reg-names = "phy";
77
77
ti,ctrl_mod = <&usb_ctrl_mod>;
78
+
#phy-cells = <0>;
78
79
};
79
80
80
81
usb0: usb@47401000 {
···
386
385
reg = <0x1b00 0x100>;
387
386
reg-names = "phy";
388
387
ti,ctrl_mod = <&usb_ctrl_mod>;
388
+
#phy-cells = <0>;
389
389
};
390
390
};
391
391
-9
arch/arm/boot/dts/imx53.dtsi
-9
arch/arm/boot/dts/imx53.dtsi
···
433
433
clock-names = "ipg", "per";
434
434
};
435
435
436
-
srtc: srtc@53fa4000 {
437
-
compatible = "fsl,imx53-rtc", "fsl,imx25-rtc";
438
-
reg = <0x53fa4000 0x4000>;
439
-
interrupts = <24>;
440
-
interrupt-parent = <&tzic>;
441
-
clocks = <&clks IMX5_CLK_SRTC_GATE>;
442
-
clock-names = "ipg";
443
-
};
444
-
445
436
iomuxc: iomuxc@53fa8000 {
446
437
compatible = "fsl,imx53-iomuxc";
447
438
reg = <0x53fa8000 0x4000>;
+2
-1
arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts
+2
-1
arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts
+11
-6
arch/arm/boot/dts/logicpd-som-lv.dtsi
+11
-6
arch/arm/boot/dts/logicpd-som-lv.dtsi
···
33
33
hsusb2_phy: hsusb2_phy {
34
34
compatible = "usb-nop-xceiv";
35
35
reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
36
+
#phy-cells = <0>;
36
37
};
37
38
};
38
39
39
40
&gpmc {
40
-
ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
41
+
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
41
42
42
43
nand@0,0 {
43
44
compatible = "ti,omap2-nand";
···
122
121
123
122
&mmc3 {
124
123
interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
125
-
pinctrl-0 = <&mmc3_pins>;
124
+
pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
126
125
pinctrl-names = "default";
127
126
vmmc-supply = <&wl12xx_vmmc>;
128
127
non-removable;
···
133
132
wlcore: wlcore@2 {
134
133
compatible = "ti,wl1273";
135
134
reg = <2>;
136
-
interrupt-parent = <&gpio5>;
137
-
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
135
+
interrupt-parent = <&gpio1>;
136
+
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */
138
137
ref-clock-frequency = <26000000>;
139
138
};
140
139
};
···
158
157
OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
159
158
OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
160
159
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
161
-
OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
162
-
OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
163
160
OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
164
161
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
165
162
>;
···
225
226
hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
226
227
pinctrl-single,pins = <
227
228
OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
229
+
>;
230
+
};
231
+
wl127x_gpio: pinmux_wl127x_gpio_pin {
232
+
pinctrl-single,pins = <
233
+
OMAP3_WKUP_IOPAD(0x2a0c, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
234
+
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
228
235
>;
229
236
};
230
237
};
+9
-9
arch/arm/boot/dts/meson.dtsi
+9
-9
arch/arm/boot/dts/meson.dtsi
···
85
85
reg = <0x7c00 0x200>;
86
86
};
87
87
88
-
gpio_intc: interrupt-controller@9880 {
89
-
compatible = "amlogic,meson-gpio-intc";
90
-
reg = <0xc1109880 0x10>;
91
-
interrupt-controller;
92
-
#interrupt-cells = <2>;
93
-
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
94
-
status = "disabled";
95
-
};
96
-
97
88
hwrng: rng@8100 {
98
89
compatible = "amlogic,meson-rng";
99
90
reg = <0x8100 0x8>;
···
179
188
reg = <0x8c80 0x80>;
180
189
#address-cells = <1>;
181
190
#size-cells = <0>;
191
+
status = "disabled";
192
+
};
193
+
194
+
gpio_intc: interrupt-controller@9880 {
195
+
compatible = "amlogic,meson-gpio-intc";
196
+
reg = <0x9880 0x10>;
197
+
interrupt-controller;
198
+
#interrupt-cells = <2>;
199
+
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
182
200
status = "disabled";
183
201
};
184
202
+1
arch/arm/boot/dts/nspire.dtsi
+1
arch/arm/boot/dts/nspire.dtsi
+1
arch/arm/boot/dts/omap3-beagle-xm.dts
+1
arch/arm/boot/dts/omap3-beagle-xm.dts
+1
arch/arm/boot/dts/omap3-beagle.dts
+1
arch/arm/boot/dts/omap3-beagle.dts
+2
arch/arm/boot/dts/omap3-cm-t3x.dtsi
+2
arch/arm/boot/dts/omap3-cm-t3x.dtsi
···
43
43
hsusb1_phy: hsusb1_phy {
44
44
compatible = "usb-nop-xceiv";
45
45
vcc-supply = <&hsusb1_power>;
46
+
#phy-cells = <0>;
46
47
};
47
48
48
49
/* HS USB Host PHY on PORT 2 */
49
50
hsusb2_phy: hsusb2_phy {
50
51
compatible = "usb-nop-xceiv";
51
52
vcc-supply = <&hsusb2_power>;
53
+
#phy-cells = <0>;
52
54
};
53
55
54
56
ads7846reg: ads7846-reg {
+1
arch/arm/boot/dts/omap3-evm-common.dtsi
+1
arch/arm/boot/dts/omap3-evm-common.dtsi
+1
arch/arm/boot/dts/omap3-gta04.dtsi
+1
arch/arm/boot/dts/omap3-gta04.dtsi
+1
arch/arm/boot/dts/omap3-igep0020-common.dtsi
+1
arch/arm/boot/dts/omap3-igep0020-common.dtsi
+1
arch/arm/boot/dts/omap3-igep0030-common.dtsi
+1
arch/arm/boot/dts/omap3-igep0030-common.dtsi
+1
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+1
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+1
arch/arm/boot/dts/omap3-overo-base.dtsi
+1
arch/arm/boot/dts/omap3-overo-base.dtsi
+1
arch/arm/boot/dts/omap3-pandora-common.dtsi
+1
arch/arm/boot/dts/omap3-pandora-common.dtsi
+1
arch/arm/boot/dts/omap3-tao3530.dtsi
+1
arch/arm/boot/dts/omap3-tao3530.dtsi
+1
arch/arm/boot/dts/omap3.dtsi
+1
arch/arm/boot/dts/omap3.dtsi
+1
arch/arm/boot/dts/omap4-droid4-xt894.dts
+1
arch/arm/boot/dts/omap4-droid4-xt894.dts
+1
arch/arm/boot/dts/omap4-duovero.dtsi
+1
arch/arm/boot/dts/omap4-duovero.dtsi
+1
arch/arm/boot/dts/omap4-panda-common.dtsi
+1
arch/arm/boot/dts/omap4-panda-common.dtsi
+1
arch/arm/boot/dts/omap4-var-som-om44.dtsi
+1
arch/arm/boot/dts/omap4-var-som-om44.dtsi
+2
-3
arch/arm/boot/dts/omap4.dtsi
+2
-3
arch/arm/boot/dts/omap4.dtsi
···
398
398
elm: elm@48078000 {
399
399
compatible = "ti,am3352-elm";
400
400
reg = <0x48078000 0x2000>;
401
-
interrupts = <4>;
401
+
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
402
402
ti,hwmods = "elm";
403
403
status = "disabled";
404
404
};
···
1081
1081
usbhsohci: ohci@4a064800 {
1082
1082
compatible = "ti,ohci-omap3";
1083
1083
reg = <0x4a064800 0x400>;
1084
-
interrupt-parent = <&gic>;
1085
1084
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
1085
+
remote-wakeup-connected;
1086
1086
};
1087
1087
1088
1088
usbhsehci: ehci@4a064c00 {
1089
1089
compatible = "ti,ehci-omap";
1090
1090
reg = <0x4a064c00 0x400>;
1091
-
interrupt-parent = <&gic>;
1092
1091
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1093
1092
};
1094
1093
};
+2
arch/arm/boot/dts/omap5-board-common.dtsi
+2
arch/arm/boot/dts/omap5-board-common.dtsi
···
73
73
clocks = <&auxclk1_ck>;
74
74
clock-names = "main_clk";
75
75
clock-frequency = <19200000>;
76
+
#phy-cells = <0>;
76
77
};
77
78
78
79
/* HS USB Host PHY on PORT 3 */
79
80
hsusb3_phy: hsusb3_phy {
80
81
compatible = "usb-nop-xceiv";
81
82
reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
83
+
#phy-cells = <0>;
82
84
};
83
85
84
86
tpd12s015: encoder {
+2
arch/arm/boot/dts/omap5-cm-t54.dts
+2
arch/arm/boot/dts/omap5-cm-t54.dts
···
63
63
hsusb2_phy: hsusb2_phy {
64
64
compatible = "usb-nop-xceiv";
65
65
reset-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; /* gpio3_76 HUB_RESET */
66
+
#phy-cells = <0>;
66
67
};
67
68
68
69
/* HS USB Host PHY on PORT 3 */
69
70
hsusb3_phy: hsusb3_phy {
70
71
compatible = "usb-nop-xceiv";
71
72
reset-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; /* gpio3_83 ETH_RESET */
73
+
#phy-cells = <0>;
72
74
};
73
75
74
76
leds {
+1
arch/arm/boot/dts/omap5.dtsi
+1
arch/arm/boot/dts/omap5.dtsi
+1
arch/arm/boot/dts/r8a7790.dtsi
+1
arch/arm/boot/dts/r8a7790.dtsi
+1
arch/arm/boot/dts/r8a7792.dtsi
+1
arch/arm/boot/dts/r8a7792.dtsi
+1
arch/arm/boot/dts/r8a7793.dtsi
+1
arch/arm/boot/dts/r8a7793.dtsi
+1
arch/arm/boot/dts/r8a7794.dtsi
+1
arch/arm/boot/dts/r8a7794.dtsi
+1
-1
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
+1
-1
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
+1
-1
arch/arm/mach-meson/platsmp.c
+1
-1
arch/arm/mach-meson/platsmp.c
+5
-1
arch/arm/mach-omap2/cm_common.c
+5
-1
arch/arm/mach-omap2/cm_common.c
···
68
68
int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
69
69
u8 *idlest_reg_id)
70
70
{
71
+
int ret;
71
72
if (!cm_ll_data->split_idlest_reg) {
72
73
WARN_ONCE(1, "cm: %s: no low-level function defined\n",
73
74
__func__);
74
75
return -EINVAL;
75
76
}
76
77
77
-
return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
78
+
ret = cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
78
79
idlest_reg_id);
80
+
*prcm_inst -= cm_base.offset;
81
+
return ret;
79
82
}
80
83
81
84
/**
···
340
337
if (mem) {
341
338
mem->pa = res.start + data->offset;
342
339
mem->va = data->mem + data->offset;
340
+
mem->offset = data->offset;
343
341
}
344
342
345
343
data->np = np;
+21
arch/arm/mach-omap2/omap-secure.c
+21
arch/arm/mach-omap2/omap-secure.c
···
73
73
return omap_secure_memblock_base;
74
74
}
75
75
76
+
#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
77
+
u32 omap3_save_secure_ram(void __iomem *addr, int size)
78
+
{
79
+
u32 ret;
80
+
u32 param[5];
81
+
82
+
if (size != OMAP3_SAVE_SECURE_RAM_SZ)
83
+
return OMAP3_SAVE_SECURE_RAM_SZ;
84
+
85
+
param[0] = 4; /* Number of arguments */
86
+
param[1] = __pa(addr); /* Physical address for saving */
87
+
param[2] = 0;
88
+
param[3] = 1;
89
+
param[4] = 1;
90
+
91
+
ret = save_secure_ram_context(__pa(param));
92
+
93
+
return ret;
94
+
}
95
+
#endif
96
+
76
97
/**
77
98
* rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
78
99
* @idx: The PPA API index
+4
arch/arm/mach-omap2/omap-secure.h
+4
arch/arm/mach-omap2/omap-secure.h
···
31
31
/* Maximum Secure memory storage size */
32
32
#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
33
33
34
+
#define OMAP3_SAVE_SECURE_RAM_SZ 0x803F
35
+
34
36
/* Secure low power HAL API index */
35
37
#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
36
38
#define OMAP4_HAL_SAVEHW_INDEX 0x1b
···
67
65
extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
68
66
extern phys_addr_t omap_secure_ram_mempool_base(void);
69
67
extern int omap_secure_ram_reserve_memblock(void);
68
+
extern u32 save_secure_ram_context(u32 args_pa);
69
+
extern u32 omap3_save_secure_ram(void __iomem *save_regs, int size);
70
70
71
71
extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
72
72
u32 arg1, u32 arg2, u32 arg3, u32 arg4);
+5
-5
arch/arm/mach-omap2/omap_device.c
+5
-5
arch/arm/mach-omap2/omap_device.c
···
391
391
const char *name;
392
392
int error, irq = 0;
393
393
394
-
if (!oh || !oh->od || !oh->od->pdev) {
395
-
error = -EINVAL;
396
-
goto error;
397
-
}
394
+
if (!oh || !oh->od || !oh->od->pdev)
395
+
return -EINVAL;
398
396
399
397
np = oh->od->pdev->dev.of_node;
400
398
if (!np) {
···
514
516
goto odbs_exit1;
515
517
516
518
od = omap_device_alloc(pdev, &oh, 1);
517
-
if (IS_ERR(od))
519
+
if (IS_ERR(od)) {
520
+
ret = PTR_ERR(od);
518
521
goto odbs_exit1;
522
+
}
519
523
520
524
ret = platform_device_add_data(pdev, pdata, pdata_len);
521
525
if (ret)
+1
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+1
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
-4
arch/arm/mach-omap2/pm.h
-4
arch/arm/mach-omap2/pm.h
···
81
81
/* ... and its pointer from SRAM after copy */
82
82
extern void (*omap3_do_wfi_sram)(void);
83
83
84
-
/* save_secure_ram_context function pointer and size, for copy to SRAM */
85
-
extern int save_secure_ram_context(u32 *addr);
86
-
extern unsigned int save_secure_ram_context_sz;
87
-
88
84
extern void omap3_save_scratchpad_contents(void);
89
85
90
86
#define PM_RTA_ERRATUM_i608 (1 << 0)
+4
-9
arch/arm/mach-omap2/pm34xx.c
+4
-9
arch/arm/mach-omap2/pm34xx.c
···
48
48
#include "prm3xxx.h"
49
49
#include "pm.h"
50
50
#include "sdrc.h"
51
+
#include "omap-secure.h"
51
52
#include "sram.h"
52
53
#include "control.h"
53
54
#include "vc.h"
···
67
66
68
67
static LIST_HEAD(pwrst_list);
69
68
70
-
static int (*_omap_save_secure_sram)(u32 *addr);
71
69
void (*omap3_do_wfi_sram)(void);
72
70
73
71
static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
···
121
121
* will hang the system.
122
122
*/
123
123
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
124
-
ret = _omap_save_secure_sram((u32 *)(unsigned long)
125
-
__pa(omap3_secure_ram_storage));
124
+
ret = omap3_save_secure_ram(omap3_secure_ram_storage,
125
+
OMAP3_SAVE_SECURE_RAM_SZ);
126
126
pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
127
127
/* Following is for error tracking, it should not happen */
128
128
if (ret) {
···
434
434
*
435
435
* The minimum set of functions is pushed to SRAM for execution:
436
436
* - omap3_do_wfi for erratum i581 WA,
437
-
* - save_secure_ram_context for security extensions.
438
437
*/
439
438
void omap_push_sram_idle(void)
440
439
{
441
440
omap3_do_wfi_sram = omap_sram_push(omap3_do_wfi, omap3_do_wfi_sz);
442
-
443
-
if (omap_type() != OMAP2_DEVICE_TYPE_GP)
444
-
_omap_save_secure_sram = omap_sram_push(save_secure_ram_context,
445
-
save_secure_ram_context_sz);
446
441
}
447
442
448
443
static void __init pm_errata_configure(void)
···
548
553
clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
549
554
if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
550
555
omap3_secure_ram_storage =
551
-
kmalloc(0x803F, GFP_KERNEL);
556
+
kmalloc(OMAP3_SAVE_SECURE_RAM_SZ, GFP_KERNEL);
552
557
if (!omap3_secure_ram_storage)
553
558
pr_err("Memory allocation failed when allocating for secure sram context\n");
554
559
+1
arch/arm/mach-omap2/prcm-common.h
+1
arch/arm/mach-omap2/prcm-common.h
-12
arch/arm/mach-omap2/prm33xx.c
-12
arch/arm/mach-omap2/prm33xx.c
···
176
176
return v;
177
177
}
178
178
179
-
static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
180
-
{
181
-
u32 v;
182
-
183
-
v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
184
-
v &= AM33XX_LASTPOWERSTATEENTERED_MASK;
185
-
v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT;
186
-
187
-
return v;
188
-
}
189
-
190
179
static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
191
180
{
192
181
am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
···
346
357
.pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst,
347
358
.pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst,
348
359
.pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst,
349
-
.pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst,
350
360
.pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst,
351
361
.pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst,
352
362
.pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst,
+4
-22
arch/arm/mach-omap2/sleep34xx.S
+4
-22
arch/arm/mach-omap2/sleep34xx.S
···
93
93
ENDPROC(enable_omap3630_toggle_l2_on_restore)
94
94
95
95
/*
96
-
* Function to call rom code to save secure ram context. This gets
97
-
* relocated to SRAM, so it can be all in .data section. Otherwise
98
-
* we need to initialize api_params separately.
96
+
* Function to call rom code to save secure ram context.
97
+
*
98
+
* r0 = physical address of the parameters
99
99
*/
100
-
.data
101
-
.align 3
102
100
ENTRY(save_secure_ram_context)
103
101
stmfd sp!, {r4 - r11, lr} @ save registers on stack
104
-
adr r3, api_params @ r3 points to parameters
105
-
str r0, [r3,#0x4] @ r0 has sdram address
106
-
ldr r12, high_mask
107
-
and r3, r3, r12
108
-
ldr r12, sram_phy_addr_mask
109
-
orr r3, r3, r12
102
+
mov r3, r0 @ physical address of parameters
110
103
mov r0, #25 @ set service ID for PPA
111
104
mov r12, r0 @ copy secure service ID in r12
112
105
mov r1, #0 @ set task id for ROM code in r1
···
113
120
nop
114
121
nop
115
122
ldmfd sp!, {r4 - r11, pc}
116
-
.align
117
-
sram_phy_addr_mask:
118
-
.word SRAM_BASE_P
119
-
high_mask:
120
-
.word 0xffff
121
-
api_params:
122
-
.word 0x4, 0x0, 0x0, 0x1, 0x1
123
123
ENDPROC(save_secure_ram_context)
124
-
ENTRY(save_secure_ram_context_sz)
125
-
.word . - save_secure_ram_context
126
-
127
-
.text
128
124
129
125
/*
130
126
* ======================
+1
-1
arch/arm64/boot/dts/Makefile
+1
-1
arch/arm64/boot/dts/Makefile
···
12
12
subdir-y += exynos
13
13
subdir-y += freescale
14
14
subdir-y += hisilicon
15
+
subdir-y += lg
15
16
subdir-y += marvell
16
17
subdir-y += mediatek
17
18
subdir-y += nvidia
···
23
22
subdir-y += socionext
24
23
subdir-y += sprd
25
24
subdir-y += xilinx
26
-
subdir-y += lg
27
25
subdir-y += zte
+2
-2
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+2
-2
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
···
753
753
754
754
&uart_B {
755
755
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
756
-
clock-names = "xtal", "core", "baud";
756
+
clock-names = "xtal", "pclk", "baud";
757
757
};
758
758
759
759
&uart_C {
760
760
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
761
-
clock-names = "xtal", "core", "baud";
761
+
clock-names = "xtal", "pclk", "baud";
762
762
};
763
763
764
764
&vpu {
+3
-3
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+3
-3
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
···
688
688
689
689
&uart_A {
690
690
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
691
-
clock-names = "xtal", "core", "baud";
691
+
clock-names = "xtal", "pclk", "baud";
692
692
};
693
693
694
694
&uart_AO {
···
703
703
704
704
&uart_B {
705
705
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
706
-
clock-names = "xtal", "core", "baud";
706
+
clock-names = "xtal", "pclk", "baud";
707
707
};
708
708
709
709
&uart_C {
710
710
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
711
-
clock-names = "xtal", "core", "baud";
711
+
clock-names = "xtal", "pclk", "baud";
712
712
};
713
713
714
714
&vpu {
-1
arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
-1
arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
-1
arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
-1
arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
+1
-2
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+1
-2
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+5
-2
drivers/bus/arm-cci.c
+5
-2
drivers/bus/arm-cci.c
···
1755
1755
raw_spin_lock_init(&cci_pmu->hw_events.pmu_lock);
1756
1756
mutex_init(&cci_pmu->reserve_mutex);
1757
1757
atomic_set(&cci_pmu->active_events, 0);
1758
-
cpumask_set_cpu(smp_processor_id(), &cci_pmu->cpus);
1758
+
cpumask_set_cpu(get_cpu(), &cci_pmu->cpus);
1759
1759
1760
1760
ret = cci_pmu_init(cci_pmu, pdev);
1761
-
if (ret)
1761
+
if (ret) {
1762
+
put_cpu();
1762
1763
return ret;
1764
+
}
1763
1765
1764
1766
cpuhp_state_add_instance_nocalls(CPUHP_AP_PERF_ARM_CCI_ONLINE,
1765
1767
&cci_pmu->node);
1768
+
put_cpu();
1766
1769
pr_info("ARM %s PMU driver probed", cci_pmu->model->name);
1767
1770
return 0;
1768
1771
}
+15
-10
drivers/bus/arm-ccn.c
+15
-10
drivers/bus/arm-ccn.c
···
262
262
NULL
263
263
};
264
264
265
-
static struct attribute_group arm_ccn_pmu_format_attr_group = {
265
+
static const struct attribute_group arm_ccn_pmu_format_attr_group = {
266
266
.name = "format",
267
267
.attrs = arm_ccn_pmu_format_attrs,
268
268
};
···
451
451
static struct attribute
452
452
*arm_ccn_pmu_events_attrs[ARRAY_SIZE(arm_ccn_pmu_events) + 1];
453
453
454
-
static struct attribute_group arm_ccn_pmu_events_attr_group = {
454
+
static const struct attribute_group arm_ccn_pmu_events_attr_group = {
455
455
.name = "events",
456
456
.is_visible = arm_ccn_pmu_events_is_visible,
457
457
.attrs = arm_ccn_pmu_events_attrs,
···
548
548
NULL
549
549
};
550
550
551
-
static struct attribute_group arm_ccn_pmu_cmp_mask_attr_group = {
551
+
static const struct attribute_group arm_ccn_pmu_cmp_mask_attr_group = {
552
552
.name = "cmp_mask",
553
553
.attrs = arm_ccn_pmu_cmp_mask_attrs,
554
554
};
···
569
569
NULL,
570
570
};
571
571
572
-
static struct attribute_group arm_ccn_pmu_cpumask_attr_group = {
572
+
static const struct attribute_group arm_ccn_pmu_cpumask_attr_group = {
573
573
.attrs = arm_ccn_pmu_cpumask_attrs,
574
574
};
575
575
···
1268
1268
if (ccn->dt.id == 0) {
1269
1269
name = "ccn";
1270
1270
} else {
1271
-
int len = snprintf(NULL, 0, "ccn_%d", ccn->dt.id);
1272
-
1273
-
name = devm_kzalloc(ccn->dev, len + 1, GFP_KERNEL);
1274
-
snprintf(name, len + 1, "ccn_%d", ccn->dt.id);
1271
+
name = devm_kasprintf(ccn->dev, GFP_KERNEL, "ccn_%d",
1272
+
ccn->dt.id);
1273
+
if (!name) {
1274
+
err = -ENOMEM;
1275
+
goto error_choose_name;
1276
+
}
1275
1277
}
1276
1278
1277
1279
/* Perf driver registration */
···
1300
1298
}
1301
1299
1302
1300
/* Pick one CPU which we will use to collect data from CCN... */
1303
-
cpumask_set_cpu(smp_processor_id(), &ccn->dt.cpu);
1301
+
cpumask_set_cpu(get_cpu(), &ccn->dt.cpu);
1304
1302
1305
1303
/* Also make sure that the overflow interrupt is handled by this CPU */
1306
1304
if (ccn->irq) {
···
1317
1315
1318
1316
cpuhp_state_add_instance_nocalls(CPUHP_AP_PERF_ARM_CCN_ONLINE,
1319
1317
&ccn->dt.node);
1318
+
put_cpu();
1320
1319
return 0;
1321
1320
1322
1321
error_pmu_register:
1323
1322
error_set_affinity:
1323
+
put_cpu();
1324
+
error_choose_name:
1324
1325
ida_simple_remove(&arm_ccn_pmu_ida, ccn->dt.id);
1325
1326
for (i = 0; i < ccn->num_xps; i++)
1326
1327
writel(0, ccn->xp[i].base + CCN_XP_DT_CONTROL);
···
1586
1581
1587
1582
static void __exit arm_ccn_exit(void)
1588
1583
{
1589
-
cpuhp_remove_multi_state(CPUHP_AP_PERF_ARM_CCN_ONLINE);
1590
1584
platform_driver_unregister(&arm_ccn_driver);
1585
+
cpuhp_remove_multi_state(CPUHP_AP_PERF_ARM_CCN_ONLINE);
1591
1586
}
1592
1587
1593
1588
module_init(arm_ccn_init);
+127
-85
drivers/firmware/arm_scpi.c
+127
-85
drivers/firmware/arm_scpi.c
···
28
28
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
29
30
30
#include <linux/bitmap.h>
31
-
#include <linux/bitfield.h>
32
31
#include <linux/device.h>
33
32
#include <linux/err.h>
34
33
#include <linux/export.h>
···
72
73
73
74
#define MAX_DVFS_DOMAINS 8
74
75
#define MAX_DVFS_OPPS 16
76
+
#define DVFS_LATENCY(hdr) (le32_to_cpu(hdr) >> 16)
77
+
#define DVFS_OPP_COUNT(hdr) ((le32_to_cpu(hdr) >> 8) & 0xff)
75
78
76
-
#define PROTO_REV_MAJOR_MASK GENMASK(31, 16)
77
-
#define PROTO_REV_MINOR_MASK GENMASK(15, 0)
79
+
#define PROTOCOL_REV_MINOR_BITS 16
80
+
#define PROTOCOL_REV_MINOR_MASK ((1U << PROTOCOL_REV_MINOR_BITS) - 1)
81
+
#define PROTOCOL_REV_MAJOR(x) ((x) >> PROTOCOL_REV_MINOR_BITS)
82
+
#define PROTOCOL_REV_MINOR(x) ((x) & PROTOCOL_REV_MINOR_MASK)
78
83
79
-
#define FW_REV_MAJOR_MASK GENMASK(31, 24)
80
-
#define FW_REV_MINOR_MASK GENMASK(23, 16)
81
-
#define FW_REV_PATCH_MASK GENMASK(15, 0)
84
+
#define FW_REV_MAJOR_BITS 24
85
+
#define FW_REV_MINOR_BITS 16
86
+
#define FW_REV_PATCH_MASK ((1U << FW_REV_MINOR_BITS) - 1)
87
+
#define FW_REV_MINOR_MASK ((1U << FW_REV_MAJOR_BITS) - 1)
88
+
#define FW_REV_MAJOR(x) ((x) >> FW_REV_MAJOR_BITS)
89
+
#define FW_REV_MINOR(x) (((x) & FW_REV_MINOR_MASK) >> FW_REV_MINOR_BITS)
90
+
#define FW_REV_PATCH(x) ((x) & FW_REV_PATCH_MASK)
82
91
83
92
#define MAX_RX_TIMEOUT (msecs_to_jiffies(30))
84
93
···
311
304
u8 name[20];
312
305
} __packed;
313
306
307
+
struct clk_get_value {
308
+
__le32 rate;
309
+
} __packed;
310
+
314
311
struct clk_set_value {
315
312
__le16 id;
316
313
__le16 reserved;
···
328
317
} __packed;
329
318
330
319
struct dvfs_info {
331
-
u8 domain;
332
-
u8 opp_count;
333
-
__le16 latency;
320
+
__le32 header;
334
321
struct {
335
322
__le32 freq;
336
323
__le32 m_volt;
···
350
341
u8 trigger_type;
351
342
char name[20];
352
343
};
344
+
345
+
struct sensor_value {
346
+
__le32 lo_val;
347
+
__le32 hi_val;
348
+
} __packed;
353
349
354
350
struct dev_pstate_set {
355
351
__le16 dev_id;
···
419
405
unsigned int len;
420
406
421
407
if (scpi_info->is_legacy) {
422
-
struct legacy_scpi_shared_mem __iomem *mem =
423
-
ch->rx_payload;
408
+
struct legacy_scpi_shared_mem *mem = ch->rx_payload;
424
409
425
410
/* RX Length is not replied by the legacy Firmware */
426
411
len = match->rx_len;
427
412
428
-
match->status = ioread32(&mem->status);
413
+
match->status = le32_to_cpu(mem->status);
429
414
memcpy_fromio(match->rx_buf, mem->payload, len);
430
415
} else {
431
-
struct scpi_shared_mem __iomem *mem = ch->rx_payload;
416
+
struct scpi_shared_mem *mem = ch->rx_payload;
432
417
433
418
len = min(match->rx_len, CMD_SIZE(cmd));
434
419
435
-
match->status = ioread32(&mem->status);
420
+
match->status = le32_to_cpu(mem->status);
436
421
memcpy_fromio(match->rx_buf, mem->payload, len);
437
422
}
438
423
···
445
432
static void scpi_handle_remote_msg(struct mbox_client *c, void *msg)
446
433
{
447
434
struct scpi_chan *ch = container_of(c, struct scpi_chan, cl);
448
-
struct scpi_shared_mem __iomem *mem = ch->rx_payload;
435
+
struct scpi_shared_mem *mem = ch->rx_payload;
449
436
u32 cmd = 0;
450
437
451
438
if (!scpi_info->is_legacy)
452
-
cmd = ioread32(&mem->command);
439
+
cmd = le32_to_cpu(mem->command);
453
440
454
441
scpi_process_cmd(ch, cmd);
455
442
}
···
459
446
unsigned long flags;
460
447
struct scpi_xfer *t = msg;
461
448
struct scpi_chan *ch = container_of(c, struct scpi_chan, cl);
462
-
struct scpi_shared_mem __iomem *mem = ch->tx_payload;
449
+
struct scpi_shared_mem *mem = (struct scpi_shared_mem *)ch->tx_payload;
463
450
464
451
if (t->tx_buf) {
465
452
if (scpi_info->is_legacy)
···
478
465
}
479
466
480
467
if (!scpi_info->is_legacy)
481
-
iowrite32(t->cmd, &mem->command);
468
+
mem->command = cpu_to_le32(t->cmd);
482
469
}
483
470
484
471
static struct scpi_xfer *get_scpi_xfer(struct scpi_chan *ch)
···
583
570
static unsigned long scpi_clk_get_val(u16 clk_id)
584
571
{
585
572
int ret;
586
-
__le32 rate;
573
+
struct clk_get_value clk;
587
574
__le16 le_clk_id = cpu_to_le16(clk_id);
588
575
589
576
ret = scpi_send_message(CMD_GET_CLOCK_VALUE, &le_clk_id,
590
-
sizeof(le_clk_id), &rate, sizeof(rate));
577
+
sizeof(le_clk_id), &clk, sizeof(clk));
591
578
592
-
return ret ? ret : le32_to_cpu(rate);
579
+
return ret ? ret : le32_to_cpu(clk.rate);
593
580
}
594
581
595
582
static int scpi_clk_set_val(u16 clk_id, unsigned long rate)
···
645
632
646
633
static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain)
647
634
{
648
-
if (domain >= MAX_DVFS_DOMAINS)
649
-
return ERR_PTR(-EINVAL);
650
-
651
-
return scpi_info->dvfs[domain] ?: ERR_PTR(-EINVAL);
652
-
}
653
-
654
-
static int scpi_dvfs_populate_info(struct device *dev, u8 domain)
655
-
{
656
635
struct scpi_dvfs_info *info;
657
636
struct scpi_opp *opp;
658
637
struct dvfs_info buf;
659
638
int ret, i;
660
639
640
+
if (domain >= MAX_DVFS_DOMAINS)
641
+
return ERR_PTR(-EINVAL);
642
+
643
+
if (scpi_info->dvfs[domain]) /* data already populated */
644
+
return scpi_info->dvfs[domain];
645
+
661
646
ret = scpi_send_message(CMD_GET_DVFS_INFO, &domain, sizeof(domain),
662
647
&buf, sizeof(buf));
663
648
if (ret)
664
-
return ret;
649
+
return ERR_PTR(ret);
665
650
666
-
info = devm_kmalloc(dev, sizeof(*info), GFP_KERNEL);
651
+
info = kmalloc(sizeof(*info), GFP_KERNEL);
667
652
if (!info)
668
-
return -ENOMEM;
653
+
return ERR_PTR(-ENOMEM);
669
654
670
-
info->count = buf.opp_count;
671
-
info->latency = le16_to_cpu(buf.latency) * 1000; /* uS to nS */
655
+
info->count = DVFS_OPP_COUNT(buf.header);
656
+
info->latency = DVFS_LATENCY(buf.header) * 1000; /* uS to nS */
672
657
673
-
info->opps = devm_kcalloc(dev, info->count, sizeof(*opp), GFP_KERNEL);
674
-
if (!info->opps)
675
-
return -ENOMEM;
658
+
info->opps = kcalloc(info->count, sizeof(*opp), GFP_KERNEL);
659
+
if (!info->opps) {
660
+
kfree(info);
661
+
return ERR_PTR(-ENOMEM);
662
+
}
676
663
677
664
for (i = 0, opp = info->opps; i < info->count; i++, opp++) {
678
665
opp->freq = le32_to_cpu(buf.opps[i].freq);
···
682
669
sort(info->opps, info->count, sizeof(*opp), opp_cmp_func, NULL);
683
670
684
671
scpi_info->dvfs[domain] = info;
685
-
return 0;
686
-
}
687
-
688
-
static void scpi_dvfs_populate(struct device *dev)
689
-
{
690
-
int domain;
691
-
692
-
for (domain = 0; domain < MAX_DVFS_DOMAINS; domain++)
693
-
scpi_dvfs_populate_info(dev, domain);
672
+
return info;
694
673
}
695
674
696
675
static int scpi_dev_domain_id(struct device *dev)
···
712
707
713
708
if (IS_ERR(info))
714
709
return PTR_ERR(info);
710
+
711
+
if (!info->latency)
712
+
return 0;
715
713
716
714
return info->latency;
717
715
}
···
776
768
static int scpi_sensor_get_value(u16 sensor, u64 *val)
777
769
{
778
770
__le16 id = cpu_to_le16(sensor);
779
-
__le64 value;
771
+
struct sensor_value buf;
780
772
int ret;
781
773
782
774
ret = scpi_send_message(CMD_SENSOR_VALUE, &id, sizeof(id),
783
-
&value, sizeof(value));
775
+
&buf, sizeof(buf));
784
776
if (ret)
785
777
return ret;
786
778
787
779
if (scpi_info->is_legacy)
788
-
/* only 32-bits supported, upper 32 bits can be junk */
789
-
*val = le32_to_cpup((__le32 *)&value);
780
+
/* only 32-bits supported, hi_val can be junk */
781
+
*val = le32_to_cpu(buf.lo_val);
790
782
else
791
-
*val = le64_to_cpu(value);
783
+
*val = (u64)le32_to_cpu(buf.hi_val) << 32 |
784
+
le32_to_cpu(buf.lo_val);
792
785
793
786
return 0;
794
787
}
···
862
853
static ssize_t protocol_version_show(struct device *dev,
863
854
struct device_attribute *attr, char *buf)
864
855
{
865
-
return sprintf(buf, "%lu.%lu\n",
866
-
FIELD_GET(PROTO_REV_MAJOR_MASK, scpi_info->protocol_version),
867
-
FIELD_GET(PROTO_REV_MINOR_MASK, scpi_info->protocol_version));
856
+
struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev);
857
+
858
+
return sprintf(buf, "%d.%d\n",
859
+
PROTOCOL_REV_MAJOR(scpi_info->protocol_version),
860
+
PROTOCOL_REV_MINOR(scpi_info->protocol_version));
868
861
}
869
862
static DEVICE_ATTR_RO(protocol_version);
870
863
871
864
static ssize_t firmware_version_show(struct device *dev,
872
865
struct device_attribute *attr, char *buf)
873
866
{
874
-
return sprintf(buf, "%lu.%lu.%lu\n",
875
-
FIELD_GET(FW_REV_MAJOR_MASK, scpi_info->firmware_version),
876
-
FIELD_GET(FW_REV_MINOR_MASK, scpi_info->firmware_version),
877
-
FIELD_GET(FW_REV_PATCH_MASK, scpi_info->firmware_version));
867
+
struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev);
868
+
869
+
return sprintf(buf, "%d.%d.%d\n",
870
+
FW_REV_MAJOR(scpi_info->firmware_version),
871
+
FW_REV_MINOR(scpi_info->firmware_version),
872
+
FW_REV_PATCH(scpi_info->firmware_version));
878
873
}
879
874
static DEVICE_ATTR_RO(firmware_version);
880
875
···
889
876
};
890
877
ATTRIBUTE_GROUPS(versions);
891
878
892
-
static void scpi_free_channels(void *data)
879
+
static void
880
+
scpi_free_channels(struct device *dev, struct scpi_chan *pchan, int count)
893
881
{
894
-
struct scpi_drvinfo *info = data;
895
882
int i;
896
883
897
-
for (i = 0; i < info->num_chans; i++)
898
-
mbox_free_channel(info->channels[i].chan);
884
+
for (i = 0; i < count && pchan->chan; i++, pchan++) {
885
+
mbox_free_channel(pchan->chan);
886
+
devm_kfree(dev, pchan->xfers);
887
+
devm_iounmap(dev, pchan->rx_payload);
888
+
}
889
+
}
890
+
891
+
static int scpi_remove(struct platform_device *pdev)
892
+
{
893
+
int i;
894
+
struct device *dev = &pdev->dev;
895
+
struct scpi_drvinfo *info = platform_get_drvdata(pdev);
896
+
897
+
scpi_info = NULL; /* stop exporting SCPI ops through get_scpi_ops */
898
+
899
+
of_platform_depopulate(dev);
900
+
sysfs_remove_groups(&dev->kobj, versions_groups);
901
+
scpi_free_channels(dev, info->channels, info->num_chans);
902
+
platform_set_drvdata(pdev, NULL);
903
+
904
+
for (i = 0; i < MAX_DVFS_DOMAINS && info->dvfs[i]; i++) {
905
+
kfree(info->dvfs[i]->opps);
906
+
kfree(info->dvfs[i]);
907
+
}
908
+
devm_kfree(dev, info->channels);
909
+
devm_kfree(dev, info);
910
+
911
+
return 0;
899
912
}
900
913
901
914
#define MAX_SCPI_XFERS 10
···
952
913
{
953
914
int count, idx, ret;
954
915
struct resource res;
916
+
struct scpi_chan *scpi_chan;
955
917
struct device *dev = &pdev->dev;
956
918
struct device_node *np = dev->of_node;
957
919
···
969
929
return -ENODEV;
970
930
}
971
931
972
-
scpi_info->channels = devm_kcalloc(dev, count, sizeof(struct scpi_chan),
973
-
GFP_KERNEL);
974
-
if (!scpi_info->channels)
932
+
scpi_chan = devm_kcalloc(dev, count, sizeof(*scpi_chan), GFP_KERNEL);
933
+
if (!scpi_chan)
975
934
return -ENOMEM;
976
935
977
-
ret = devm_add_action(dev, scpi_free_channels, scpi_info);
978
-
if (ret)
979
-
return ret;
980
-
981
-
for (; scpi_info->num_chans < count; scpi_info->num_chans++) {
936
+
for (idx = 0; idx < count; idx++) {
982
937
resource_size_t size;
983
-
int idx = scpi_info->num_chans;
984
-
struct scpi_chan *pchan = scpi_info->channels + idx;
938
+
struct scpi_chan *pchan = scpi_chan + idx;
985
939
struct mbox_client *cl = &pchan->cl;
986
940
struct device_node *shmem = of_parse_phandle(np, "shmem", idx);
987
941
···
983
949
of_node_put(shmem);
984
950
if (ret) {
985
951
dev_err(dev, "failed to get SCPI payload mem resource\n");
986
-
return ret;
952
+
goto err;
987
953
}
988
954
989
955
size = resource_size(&res);
990
956
pchan->rx_payload = devm_ioremap(dev, res.start, size);
991
957
if (!pchan->rx_payload) {
992
958
dev_err(dev, "failed to ioremap SCPI payload\n");
993
-
return -EADDRNOTAVAIL;
959
+
ret = -EADDRNOTAVAIL;
960
+
goto err;
994
961
}
995
962
pchan->tx_payload = pchan->rx_payload + (size >> 1);
996
963
···
1017
982
dev_err(dev, "failed to get channel%d err %d\n",
1018
983
idx, ret);
1019
984
}
985
+
err:
986
+
scpi_free_channels(dev, scpi_chan, idx);
987
+
scpi_info = NULL;
1020
988
return ret;
1021
989
}
1022
990
991
+
scpi_info->channels = scpi_chan;
992
+
scpi_info->num_chans = count;
1023
993
scpi_info->commands = scpi_std_commands;
1024
-
scpi_info->scpi_ops = &scpi_ops;
994
+
995
+
platform_set_drvdata(pdev, scpi_info);
1025
996
1026
997
if (scpi_info->is_legacy) {
1027
998
/* Replace with legacy variants */
···
1043
1002
ret = scpi_init_versions(scpi_info);
1044
1003
if (ret) {
1045
1004
dev_err(dev, "incorrect or no SCP firmware found\n");
1005
+
scpi_remove(pdev);
1046
1006
return ret;
1047
1007
}
1048
1008
1049
-
scpi_dvfs_populate(dev);
1009
+
_dev_info(dev, "SCP Protocol %d.%d Firmware %d.%d.%d version\n",
1010
+
PROTOCOL_REV_MAJOR(scpi_info->protocol_version),
1011
+
PROTOCOL_REV_MINOR(scpi_info->protocol_version),
1012
+
FW_REV_MAJOR(scpi_info->firmware_version),
1013
+
FW_REV_MINOR(scpi_info->firmware_version),
1014
+
FW_REV_PATCH(scpi_info->firmware_version));
1015
+
scpi_info->scpi_ops = &scpi_ops;
1050
1016
1051
-
_dev_info(dev, "SCP Protocol %lu.%lu Firmware %lu.%lu.%lu version\n",
1052
-
FIELD_GET(PROTO_REV_MAJOR_MASK, scpi_info->protocol_version),
1053
-
FIELD_GET(PROTO_REV_MINOR_MASK, scpi_info->protocol_version),
1054
-
FIELD_GET(FW_REV_MAJOR_MASK, scpi_info->firmware_version),
1055
-
FIELD_GET(FW_REV_MINOR_MASK, scpi_info->firmware_version),
1056
-
FIELD_GET(FW_REV_PATCH_MASK, scpi_info->firmware_version));
1057
-
1058
-
ret = devm_device_add_groups(dev, versions_groups);
1017
+
ret = sysfs_create_groups(&dev->kobj, versions_groups);
1059
1018
if (ret)
1060
1019
dev_err(dev, "unable to create sysfs version group\n");
1061
1020
1062
-
return devm_of_platform_populate(dev);
1021
+
return of_platform_populate(dev->of_node, NULL, NULL, dev);
1063
1022
}
1064
1023
1065
1024
static const struct of_device_id scpi_of_match[] = {
···
1076
1035
.of_match_table = scpi_of_match,
1077
1036
},
1078
1037
.probe = scpi_probe,
1038
+
.remove = scpi_remove,
1079
1039
};
1080
1040
module_platform_driver(scpi_driver);
1081
1041
+2
-2
drivers/soc/amlogic/meson-gx-socinfo.c
+2
-2
drivers/soc/amlogic/meson-gx-socinfo.c
···
20
20
#define AO_SEC_SOCINFO_OFFSET AO_SEC_SD_CFG8
21
21
22
22
#define SOCINFO_MAJOR GENMASK(31, 24)
23
-
#define SOCINFO_MINOR GENMASK(23, 16)
24
-
#define SOCINFO_PACK GENMASK(15, 8)
23
+
#define SOCINFO_PACK GENMASK(23, 16)
24
+
#define SOCINFO_MINOR GENMASK(15, 8)
25
25
#define SOCINFO_MISC GENMASK(7, 0)
26
26
27
27
static const struct meson_gx_soc_id {