tjh.dev / kernel
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drm/amdgpu: Fix golden register init for GFX 12.1.0

TCP_UTCL0 registers are not per XCD so don't init them on a per
XCD basis.

Fixes: ad5f1ee0a9b0 ("drm/amdgpu: Add initial support for gfx v12_1")
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Mukul Joshi and committed by
Alex Deucher 9c34a4c1 1fee035b

+8 -12
+8 -12
drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
··· 2509 2509 2510 2510 static void gfx_v12_1_init_golden_registers(struct amdgpu_device *adev) 2511 2511 { 2512 - int i, num_xcc; 2513 2512 uint32_t val; 2514 2513 2515 - num_xcc = NUM_XCC(adev->gfx.xcc_mask); 2516 - for (i = 0; i < num_xcc; i++) { 2517 - /* Setup the TCP Thrashing control register */ 2518 - val = RREG32_SOC15(GC, GET_INST(GC, i), regTCP_UTCL0_THRASHING_CTRL); 2514 + /* Setup the TCP Thrashing control register */ 2515 + val = RREG32_SOC15(GC, 0, regTCP_UTCL0_THRASHING_CTRL); 2519 2516 2520 - val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, THRASHING_EN, 0x2); 2521 - val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, 2522 - RETRY_FRAGMENT_THRESHOLD_DOWN_EN, 0x0); 2523 - val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, 2524 - RETRY_FRAGMENT_THRESHOLD_UP_EN, 0x0); 2517 + val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, THRASHING_EN, 0x2); 2518 + val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, 2519 + RETRY_FRAGMENT_THRESHOLD_DOWN_EN, 0x0); 2520 + val = REG_SET_FIELD(val, TCP_UTCL0_THRASHING_CTRL, 2521 + RETRY_FRAGMENT_THRESHOLD_UP_EN, 0x0); 2525 2522 2526 - WREG32_SOC15(GC, GET_INST(GC, i), regTCP_UTCL0_THRASHING_CTRL, val); 2527 - } 2523 + WREG32_SOC15(GC, 0, regTCP_UTCL0_THRASHING_CTRL, val); 2528 2524 } 2529 2525 2530 2526 static int gfx_v12_1_hw_init(struct amdgpu_ip_block *ip_block)