Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- add TLB invalidation for page table tear-down which was missed when
support for CONFIG_HAVE_RCU_TABLE_FREE was added (assuming page table
freeing was always deferred)
- use UEFI for system and reset poweroff if available
- fix asm label placement in relation to the alignment statement
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: put __boot_cpu_mode label after alignment instead of before
efi/arm64: use UEFI for system reset and poweroff
arm64: Invalidate the TLB corresponding to intermediate page table levels
+34
-1
+3
arch/arm64/include/asm/tlb.h
+3
arch/arm64/include/asm/tlb.h
···
48
48
static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
49
49
unsigned long addr)
50
50
{
51
+
__flush_tlb_pgtable(tlb->mm, addr);
51
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pgtable_page_dtor(pte);
52
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tlb_remove_entry(tlb, pte);
53
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}
···
57
56
static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
58
57
unsigned long addr)
59
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{
59
+
__flush_tlb_pgtable(tlb->mm, addr);
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tlb_remove_entry(tlb, virt_to_page(pmdp));
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}
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#endif
···
66
64
static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
67
65
unsigned long addr)
68
66
{
67
+
__flush_tlb_pgtable(tlb->mm, addr);
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tlb_remove_entry(tlb, virt_to_page(pudp));
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69
}
71
70
#endif
+13
arch/arm64/include/asm/tlbflush.h
+13
arch/arm64/include/asm/tlbflush.h
···
144
144
}
145
145
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/*
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+
* Used to invalidate the TLB (walk caches) corresponding to intermediate page
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+
* table levels (pgd/pud/pmd).
149
+
*/
150
+
static inline void __flush_tlb_pgtable(struct mm_struct *mm,
151
+
unsigned long uaddr)
152
+
{
153
+
unsigned long addr = uaddr >> 12 | ((unsigned long)ASID(mm) << 48);
154
+
155
+
dsb(ishst);
156
+
asm("tlbi vae1is, %0" : : "r" (addr));
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+
dsb(ish);
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+
}
159
+
/*
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* On AArch64, the cache coherency is handled via the set_pte_at() function.
148
161
*/
149
162
static inline void update_mmu_cache(struct vm_area_struct *vma,
+9
arch/arm64/kernel/efi.c
+9
arch/arm64/kernel/efi.c
+1
-1
arch/arm64/kernel/head.S
+1
-1
arch/arm64/kernel/head.S
+8
arch/arm64/kernel/process.c
+8
arch/arm64/kernel/process.c
···
21
21
#include <stdarg.h>
22
22
23
23
#include <linux/compat.h>
24
+
#include <linux/efi.h>
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#include <linux/export.h>
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#include <linux/sched.h>
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27
#include <linux/kernel.h>
···
150
149
/* Disable interrupts first */
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local_irq_disable();
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smp_send_stop();
152
+
153
+
/*
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+
* UpdateCapsule() depends on the system being reset via
155
+
* ResetSystem().
156
+
*/
157
+
if (efi_enabled(EFI_RUNTIME_SERVICES))
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+
efi_reboot(reboot_mode, NULL);
153
159
154
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/* Now call the architecture specific reboot code. */
155
161
if (arm_pm_restart)