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Merge tag 'pm-4.15-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management fixes from Rafael Wysocki:
"These fix a regression in the ondemand and conservative cpufreq
governors that was introduced during the 4.13 cycle, a recent
regression in the imx6q cpufreq driver and a regression in the PCI
handling of hibernation from the 4.14 cycle.

Specifics:

- Fix an issue in the PCI handling of the "thaw" transition during
hibernation (after creating an image), introduced by a bug fix from
the 4.13 cycle and exposed by recent changes in the IRQ subsystem,
that caused pci_restore_state() to be called for devices in
low-power states in some cases which is incorrect and breaks MSI
management on some systems (Rafael Wysocki).

- Fix a recent regression in the imx6q cpufreq driver that broke
speed grading on i.MX6 QuadPlus by omitting checks causing invalid
operating performance points (OPPs) to be disabled on that SoC as
appropriate (Lucas Stach).

- Fix a regression introduced during the 4.14 cycle in the ondemand
and conservative cpufreq governors that causes the sampling
interval used by them to be shorter than the tick period in some
cases which leads to incorrect decisions (Rafael Wysocki)"

* tag 'pm-4.15-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
cpufreq: governor: Ensure sufficiently large sampling intervals
cpufreq: imx6q: fix speed grading regression on i.MX6 QuadPlus
PCI / PM: Force devices to D0 in pci_pm_thaw_noirq()

+28 -9
+16 -3
drivers/cpufreq/cpufreq_governor.c
··· 22 22 23 23 #include "cpufreq_governor.h" 24 24 25 + #define CPUFREQ_DBS_MIN_SAMPLING_INTERVAL (2 * TICK_NSEC / NSEC_PER_USEC) 26 + 25 27 static DEFINE_PER_CPU(struct cpu_dbs_info, cpu_dbs); 26 28 27 29 static DEFINE_MUTEX(gov_dbs_data_mutex); ··· 49 47 { 50 48 struct dbs_data *dbs_data = to_dbs_data(attr_set); 51 49 struct policy_dbs_info *policy_dbs; 50 + unsigned int sampling_interval; 52 51 int ret; 53 - ret = sscanf(buf, "%u", &dbs_data->sampling_rate); 54 - if (ret != 1) 52 + 53 + ret = sscanf(buf, "%u", &sampling_interval); 54 + if (ret != 1 || sampling_interval < CPUFREQ_DBS_MIN_SAMPLING_INTERVAL) 55 55 return -EINVAL; 56 + 57 + dbs_data->sampling_rate = sampling_interval; 56 58 57 59 /* 58 60 * We are operating under dbs_data->mutex and so the list and its ··· 436 430 if (ret) 437 431 goto free_policy_dbs_info; 438 432 439 - dbs_data->sampling_rate = cpufreq_policy_transition_delay_us(policy); 433 + /* 434 + * The sampling interval should not be less than the transition latency 435 + * of the CPU and it also cannot be too small for dbs_update() to work 436 + * correctly. 437 + */ 438 + dbs_data->sampling_rate = max_t(unsigned int, 439 + CPUFREQ_DBS_MIN_SAMPLING_INTERVAL, 440 + cpufreq_policy_transition_delay_us(policy)); 440 441 441 442 if (!have_governor_per_policy()) 442 443 gov->gdbs_data = dbs_data;
+6 -5
drivers/cpufreq/imx6q-cpufreq.c
··· 226 226 val >>= OCOTP_CFG3_SPEED_SHIFT; 227 227 val &= 0x3; 228 228 229 - if ((val != OCOTP_CFG3_SPEED_1P2GHZ) && 230 - of_machine_is_compatible("fsl,imx6q")) 231 - if (dev_pm_opp_disable(dev, 1200000000)) 232 - dev_warn(dev, "failed to disable 1.2GHz OPP\n"); 233 229 if (val < OCOTP_CFG3_SPEED_996MHZ) 234 230 if (dev_pm_opp_disable(dev, 996000000)) 235 231 dev_warn(dev, "failed to disable 996MHz OPP\n"); 236 - if (of_machine_is_compatible("fsl,imx6q")) { 232 + 233 + if (of_machine_is_compatible("fsl,imx6q") || 234 + of_machine_is_compatible("fsl,imx6qp")) { 237 235 if (val != OCOTP_CFG3_SPEED_852MHZ) 238 236 if (dev_pm_opp_disable(dev, 852000000)) 239 237 dev_warn(dev, "failed to disable 852MHz OPP\n"); 238 + if (val != OCOTP_CFG3_SPEED_1P2GHZ) 239 + if (dev_pm_opp_disable(dev, 1200000000)) 240 + dev_warn(dev, "failed to disable 1.2GHz OPP\n"); 240 241 } 241 242 iounmap(base); 242 243 put_node:
+6 -1
drivers/pci/pci-driver.c
··· 1012 1012 if (pci_has_legacy_pm_support(pci_dev)) 1013 1013 return pci_legacy_resume_early(dev); 1014 1014 1015 - pci_update_current_state(pci_dev, PCI_D0); 1015 + /* 1016 + * pci_restore_state() requires the device to be in D0 (because of MSI 1017 + * restoration among other things), so force it into D0 in case the 1018 + * driver's "freeze" callbacks put it into a low-power state directly. 1019 + */ 1020 + pci_set_power_state(pci_dev, PCI_D0); 1016 1021 pci_restore_state(pci_dev); 1017 1022 1018 1023 if (drv && drv->pm && drv->pm->thaw_noirq)