Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
KVM: arm64: Convert VTCR_EL2 to config-driven sanitisation
Describe all the VTCR_EL2 fields and their respective configurations,
making sure that we correctly ignore the bits that are not defined
for a given guest configuration.
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Reviewed-by: Fuad Tabba <tabba@google.com>
Tested-by: Fuad Tabba <tabba@google.com>
Link: https://patch.msgid.link/20251210173024.561160-6-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
+70
-2
+69
arch/arm64/kvm/config.c
+69
arch/arm64/kvm/config.c
···
141
141
#define FEAT_AA64EL1 ID_AA64PFR0_EL1, EL1, IMP
142
142
#define FEAT_AA64EL2 ID_AA64PFR0_EL1, EL2, IMP
143
143
#define FEAT_AA64EL3 ID_AA64PFR0_EL1, EL3, IMP
144
+
#define FEAT_SEL2 ID_AA64PFR0_EL1, SEL2, IMP
144
145
#define FEAT_AIE ID_AA64MMFR3_EL1, AIE, IMP
145
146
#define FEAT_S2POE ID_AA64MMFR3_EL1, S2POE, IMP
146
147
#define FEAT_S1POE ID_AA64MMFR3_EL1, S1POE, IMP
···
203
202
#define FEAT_ASID2 ID_AA64MMFR4_EL1, ASID2, IMP
204
203
#define FEAT_MEC ID_AA64MMFR3_EL1, MEC, IMP
205
204
#define FEAT_HAFT ID_AA64MMFR1_EL1, HAFDBS, HAFT
205
+
#define FEAT_HDBSS ID_AA64MMFR1_EL1, HAFDBS, HDBSS
206
+
#define FEAT_HPDS2 ID_AA64MMFR1_EL1, HPDS, HPDS2
206
207
#define FEAT_BTI ID_AA64PFR1_EL1, BT, IMP
207
208
#define FEAT_ExS ID_AA64MMFR0_EL1, EXS, IMP
208
209
#define FEAT_IESB ID_AA64MMFR2_EL1, IESB, IMP
···
222
219
#define FEAT_FGT2 ID_AA64MMFR0_EL1, FGT, FGT2
223
220
#define FEAT_MTPMU ID_AA64DFR0_EL1, MTPMU, IMP
224
221
#define FEAT_HCX ID_AA64MMFR1_EL1, HCX, IMP
222
+
#define FEAT_S2PIE ID_AA64MMFR3_EL1, S2PIE, IMP
225
223
226
224
static bool not_feat_aa64el3(struct kvm *kvm)
227
225
{
···
364
360
static bool feat_pmuv3p9(struct kvm *kvm)
365
361
{
366
362
return check_pmu_revision(kvm, V3P9);
363
+
}
364
+
365
+
#define has_feat_s2tgran(k, s) \
366
+
((kvm_has_feat_enum(kvm, ID_AA64MMFR0_EL1, TGRAN##s##_2, TGRAN##s) && \
367
+
kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN##s, IMP)) || \
368
+
kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN##s##_2, IMP))
369
+
370
+
static bool feat_lpa2(struct kvm *kvm)
371
+
{
372
+
return ((kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN4, 52_BIT) ||
373
+
!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN4, IMP)) &&
374
+
(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN16, 52_BIT) ||
375
+
!kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN16, IMP)) &&
376
+
(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN4_2, 52_BIT) ||
377
+
!has_feat_s2tgran(kvm, 4)) &&
378
+
(kvm_has_feat(kvm, ID_AA64MMFR0_EL1, TGRAN16_2, 52_BIT) ||
379
+
!has_feat_s2tgran(kvm, 16)));
380
+
}
381
+
382
+
static bool feat_vmid16(struct kvm *kvm)
383
+
{
384
+
return kvm_has_feat_enum(kvm, ID_AA64MMFR1_EL1, VMIDBits, 16);
367
385
}
368
386
369
387
static bool compute_hcr_rw(struct kvm *kvm, u64 *bits)
···
1194
1168
static const DECLARE_FEAT_MAP(mdcr_el2_desc, MDCR_EL2,
1195
1169
mdcr_el2_feat_map, FEAT_AA64EL2);
1196
1170
1171
+
static const struct reg_bits_to_feat_map vtcr_el2_feat_map[] = {
1172
+
NEEDS_FEAT(VTCR_EL2_HDBSS, FEAT_HDBSS),
1173
+
NEEDS_FEAT(VTCR_EL2_HAFT, FEAT_HAFT),
1174
+
NEEDS_FEAT(VTCR_EL2_TL0 |
1175
+
VTCR_EL2_TL1 |
1176
+
VTCR_EL2_AssuredOnly |
1177
+
VTCR_EL2_GCSH,
1178
+
FEAT_THE),
1179
+
NEEDS_FEAT(VTCR_EL2_D128, FEAT_D128),
1180
+
NEEDS_FEAT(VTCR_EL2_S2POE, FEAT_S2POE),
1181
+
NEEDS_FEAT(VTCR_EL2_S2PIE, FEAT_S2PIE),
1182
+
NEEDS_FEAT(VTCR_EL2_SL2 |
1183
+
VTCR_EL2_DS,
1184
+
feat_lpa2),
1185
+
NEEDS_FEAT(VTCR_EL2_NSA |
1186
+
VTCR_EL2_NSW,
1187
+
FEAT_SEL2),
1188
+
NEEDS_FEAT(VTCR_EL2_HWU62 |
1189
+
VTCR_EL2_HWU61 |
1190
+
VTCR_EL2_HWU60 |
1191
+
VTCR_EL2_HWU59,
1192
+
FEAT_HPDS2),
1193
+
NEEDS_FEAT(VTCR_EL2_HD, ID_AA64MMFR1_EL1, HAFDBS, DBM),
1194
+
NEEDS_FEAT(VTCR_EL2_HA, ID_AA64MMFR1_EL1, HAFDBS, AF),
1195
+
NEEDS_FEAT(VTCR_EL2_VS, feat_vmid16),
1196
+
NEEDS_FEAT(VTCR_EL2_PS |
1197
+
VTCR_EL2_TG0 |
1198
+
VTCR_EL2_SH0 |
1199
+
VTCR_EL2_ORGN0 |
1200
+
VTCR_EL2_IRGN0 |
1201
+
VTCR_EL2_SL0 |
1202
+
VTCR_EL2_T0SZ,
1203
+
FEAT_AA64EL1),
1204
+
};
1205
+
1206
+
static const DECLARE_FEAT_MAP(vtcr_el2_desc, VTCR_EL2,
1207
+
vtcr_el2_feat_map, FEAT_AA64EL2);
1208
+
1197
1209
static void __init check_feat_map(const struct reg_bits_to_feat_map *map,
1198
1210
int map_size, u64 resx, const char *str)
1199
1211
{
···
1275
1211
check_reg_desc(&tcr2_el2_desc);
1276
1212
check_reg_desc(&sctlr_el1_desc);
1277
1213
check_reg_desc(&mdcr_el2_desc);
1214
+
check_reg_desc(&vtcr_el2_desc);
1278
1215
}
1279
1216
1280
1217
static bool idreg_feat_match(struct kvm *kvm, const struct reg_bits_to_feat_map *map)
···
1489
1424
case MDCR_EL2:
1490
1425
*res0 = compute_reg_res0_bits(kvm, &mdcr_el2_desc, 0, 0);
1491
1426
*res1 = MDCR_EL2_RES1;
1427
+
break;
1428
+
case VTCR_EL2:
1429
+
*res0 = compute_reg_res0_bits(kvm, &vtcr_el2_desc, 0, 0);
1430
+
*res1 = VTCR_EL2_RES1;
1492
1431
break;
1493
1432
default:
1494
1433
WARN_ON_ONCE(1);
+1
-2
arch/arm64/kvm/nested.c
+1
-2
arch/arm64/kvm/nested.c
···
1719
1719
set_sysreg_masks(kvm, VTTBR_EL2, res0, res1);
1720
1720
1721
1721
/* VTCR_EL2 */
1722
-
res0 = GENMASK(63, 32) | GENMASK(30, 20);
1723
-
res1 = BIT(31);
1722
+
get_reg_fixed_bits(kvm, VTCR_EL2, &res0, &res1);
1724
1723
set_sysreg_masks(kvm, VTCR_EL2, res0, res1);
1725
1724
1726
1725
/* VMPIDR_EL2 */